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git-subtree-dir: external/capstone
git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
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iris
2026-05-11 11:55:07 +02:00
commit 802798ce3c
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tests/MC/RISCV/fcompare_riscv64_riscv_v_riscv_f.txt.yaml
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test_cases:
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfeq.vv v8, v4, v20, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x62 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfeq.vv v8, v4, v20"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfeq.vf v8, v4, fa0, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x62 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfeq.vf v8, v4, fa0"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfne.vv v8, v4, v20, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x72 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfne.vv v8, v4, v20"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfne.vf v8, v4, fa0, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x72 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfne.vf v8, v4, fa0"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmflt.vv v8, v4, v20, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x6e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmflt.vv v8, v4, v20"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmflt.vf v8, v4, fa0, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x6e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmflt.vf v8, v4, fa0"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfle.vv v8, v4, v20, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0x66 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfle.vv v8, v4, v20"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfle.vf v8, v4, fa0, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x66 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfle.vf v8, v4, fa0"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfgt.vf v8, v4, fa0, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x76 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfgt.vf v8, v4, fa0"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x7c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfge.vf v8, v4, fa0, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0x7e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfge.vf v8, v4, fa0"
-
input:
bytes: [ 0x57, 0x10, 0x4a, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vmfeq.vv v0, v4, v20, v0.t"