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Squashed 'external/capstone/' content from commit e46f64fa

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git-subtree-dir: external/capstone
git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
This commit is contained in:
iris
2026-05-11 11:55:07 +02:00
commit 802798ce3c
3968 changed files with 2967598 additions and 0 deletions
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tests/MC/Xtensa/arith.s.yaml
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test_cases:
-
input:
bytes: [ 0x60, 0x51, 0x60 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "abs a5, a6"
-
input:
bytes: [ 0x40, 0x39, 0x80 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "add a3, a9, a4"
-
input:
bytes: [ 0x10, 0xf9, 0x80 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "add a15, a9, a1"
-
input:
bytes: [ 0x82, 0xc1, 0x80 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "addi a8, a1, -128"
-
input:
bytes: [ 0x82, 0xc1, 0xf4 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "addi a8, a1, -12"
-
input:
bytes: [ 0x12, 0xd2, 0x7f ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
- asm_text: "addmi a1, a2, 0x7f00"
-
input:
bytes: [ 0x50, 0x21, 0x90 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "addx2 a2, a1, a5"
-
input:
bytes: [ 0x60, 0x31, 0xa0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "addx4 a3, a1, a6"
-
input:
bytes: [ 0x70, 0x41, 0xb0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "addx8 a4, a1, a7"
-
input:
bytes: [ 0x30, 0x10, 0x60 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "neg a1, a3"
-
input:
bytes: [ 0x60, 0x45, 0x20 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "or a4, a5, a6"
-
input:
bytes: [ 0x10, 0x82, 0xc0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "sub a8, a2, a1"
-
input:
bytes: [ 0x50, 0x21, 0xd0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "subx2 a2, a1, a5"
-
input:
bytes: [ 0x60, 0x31, 0xe0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "subx4 a3, a1, a6"
-
input:
bytes: [ 0x70, 0x41, 0xf0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "subx8 a4, a1, a7"
-
input:
bytes: [ 0x50, 0x64, 0x30 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "xor a6, a4, a5"
tests/MC/Xtensa/branch.s.yaml
+311
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test_cases:
-
input:
bytes: [ 0x37, 0x41, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "ball a1, a3, . +4"
-
input:
bytes: [ 0xd7, 0x88, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bany a8, a13, . +4"
-
input:
bytes: [ 0x77, 0x58, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bbc a8, a7, . +4"
-
input:
bytes: [ 0x7, 0x73, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bbci a3, 16, . +4"
-
input:
bytes: [ 0x7, 0x73, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bbci a3, 16, . +4"
-
input:
bytes: [ 0x57, 0xdc, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bbs a12, a5, . +4"
-
input:
bytes: [ 0x7, 0xf3, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bbsi a3, 16, . +4"
-
input:
bytes: [ 0x37, 0xc7, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bnall a7, a3, . +4"
-
input:
bytes: [ 0x47, 0x2, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bnone a2, a4, . +4"
-
input:
bytes: [ 0x27, 0x11, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "beq a1, a2, . +4"
-
input:
bytes: [ 0x57, 0x1b, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "beq a11, a5, . +4"
-
input:
bytes: [ 0x26, 0xf1, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "beqi a1, 256, . +4"
-
input:
bytes: [ 0x26, 0xb, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "beqi a11, -1, . +4"
-
input:
bytes: [ 0x16, 0x8, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "beqz a8, . +4"
-
input:
bytes: [ 0x27, 0xae, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bge a14, a2, . +4"
-
input:
bytes: [ 0xe6, 0xb, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgei a11, -1, . +4"
-
input:
bytes: [ 0xe6, 0xeb, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgei a11, 128, . +4"
-
input:
bytes: [ 0x27, 0xbe, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgeu a14, a2, . +4"
-
input:
bytes: [ 0x17, 0xbd, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgeu a13, a1, . +4"
-
input:
bytes: [ 0xf6, 0x9, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgeui a9, 32768, . +4"
-
input:
bytes: [ 0xf6, 0x17, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgeui a7, 65536, . +4"
-
input:
bytes: [ 0xf6, 0xd7, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgeui a7, 64, . +4"
-
input:
bytes: [ 0xd6, 0x8, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bgez a8, . +4"
-
input:
bytes: [ 0x27, 0x2e, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "blt a14, a2, . +4"
-
input:
bytes: [ 0xa6, 0xc, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "blti a12, -1, . +4"
-
input:
bytes: [ 0xa6, 0xc0, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "blti a0, 32, . +4"
-
input:
bytes: [ 0xb6, 0xb7, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bltui a7, 16, . +4"
-
input:
bytes: [ 0x96, 0x6, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bltz a6, . +4"
-
input:
bytes: [ 0x47, 0x93, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bne a3, a4, . +4"
-
input:
bytes: [ 0x66, 0xa5, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bnei a5, 12, . +4"
-
input:
bytes: [ 0x56, 0x5, 0x0 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "bnez a5, . +4"
tests/MC/Xtensa/call-jump.s.yaml
+30
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test_cases:
-
input:
bytes: [ 0xc0, 0x01, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "callx0 a1"
-
input:
bytes: [ 0xa0, 0x02, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "jx a2"
-
input:
bytes: [ 0x80, 0x00, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "ret"
tests/MC/Xtensa/l32r.yaml
+25
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test_cases:
- input:
bytes: [ 0x01,0x00,0x00 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "l32r a0, . -0x40000"
- input:
bytes: [ 0xf1,0x00,0x00 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "l32r a15, . -0x40000"
- input:
bytes: [ 0x01,0xff,0xff ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "l32r a0, . -0x4"
tests/MC/Xtensa/mac16.s.yaml
+97
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test_cases:
- input:
bytes: [ 0x04,0x01,0x34 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mul.ad.ll a1, m2"
- input:
bytes: [ 0x14,0x02,0x74 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mul.aa.ll a2, a1"
- input:
bytes: [ 0x14,0x00,0x64 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mul.da.ll m0, a1"
- input:
bytes: [ 0x04,0x00,0x24 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mul.dd.ll m0, m2"
- input:
bytes: [ 0x04,0x01,0x38 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.ad.ll a1, m2"
- input:
bytes: [ 0x14,0x02,0x78 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.aa.ll a2, a1"
- input:
bytes: [ 0x14,0x00,0x68 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.da.ll m0, a1"
- input:
bytes: [ 0x04,0x00,0x28 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.dd.ll m0, m2"
- input:
bytes: [ 0x14,0x00,0x58 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.da.ll.lddec m0, a0, m0, a1"
- input:
bytes: [ 0x14,0x00,0x48 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.da.ll.ldinc m0, a0, m0, a1"
- input:
bytes: [ 0x04,0x00,0x18 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.dd.ll.lddec m0, a0, m0, m2"
- input:
bytes: [ 0x04,0x00,0x08 ]
arch: "xtensa"
options: [ ]
address: 0x0
expected:
insns:
- asm_text: "mula.dd.ll.ldinc m0, a0, m0, m2"
tests/MC/Xtensa/memorder.s.yaml
+20
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test_cases:
-
input:
bytes: [ 0xd0, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "extw"
-
input:
bytes: [ 0xc0, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "memw"
tests/MC/Xtensa/memory.s.yaml
+70
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test_cases:
-
input:
bytes: [ 0x22, 0x01, 0x03 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "l8ui a2, a1, 3"
-
input:
bytes: [ 0x32, 0x91, 0x02 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "l16si a3, a1, 4"
-
input:
bytes: [ 0x42, 0x11, 0x03 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "l16ui a4, a1, 6"
-
input:
bytes: [ 0x52, 0x21, 0x02 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "l32i a5, a1, 8"
-
input:
bytes: [ 0x22, 0x41, 0x03 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "s8i a2, a1, 3"
-
input:
bytes: [ 0x32, 0x51, 0x02 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "s16i a3, a1, 4"
-
input:
bytes: [ 0x52, 0x61, 0x02 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "s32i a5, a1, 8"
tests/MC/Xtensa/move.s.yaml
+50
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@@ -0,0 +1,50 @@
test_cases:
-
input:
bytes: [ 0x40, 0x23, 0x83 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "moveqz a2, a3, a4"
-
input:
bytes: [ 0xc0, 0x3b, 0xb3 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "movgez a3, a11, a12"
-
input:
bytes: [ 0x12, 0xa8, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "movi a1, -2048"
-
input:
bytes: [ 0x90, 0x78, 0xa3 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "movltz a7, a8, a9"
-
input:
bytes: [ 0xc0, 0xab, 0x93 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "movnez a10, a11, a12"
tests/MC/Xtensa/processor-control.s.yaml
+80
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@@ -0,0 +1,80 @@
test_cases:
-
input:
bytes: [ 0x30, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "dsync"
-
input:
bytes: [ 0x20, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "esync"
-
input:
bytes: [ 0x00, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "isync"
-
input:
bytes: [ 0xf0, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "nop"
-
input:
bytes: [ 0x80, 0x03, 0x03 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "rsr a8, sar"
-
input:
bytes: [ 0x10, 0x20, 0x00 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "rsync"
-
input:
bytes: [ 0x80, 0x03, 0x13 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "wsr a8, sar"
-
input:
bytes: [ 0x80, 0x03, 0x61 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "xsr a8, sar"
tests/MC/Xtensa/shift.s.yaml
+120
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@@ -0,0 +1,120 @@
test_cases:
-
input:
bytes: [ 0x20, 0x17, 0x74 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "extui a1, a2, 7, 8"
-
input:
bytes: [ 0x00, 0xab, 0xa1 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "sll a10, a11"
-
input:
bytes: [ 0x10, 0x51, 0x11 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "slli a5, a1, 15"
-
input:
bytes: [ 0x30, 0xc0, 0xb1 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "sra a12, a3"
-
input:
bytes: [ 0x50, 0x80, 0x21 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "srai a8, a5, 0"
-
input:
bytes: [ 0x50, 0x34, 0x81 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "src a3, a4, a5"
-
input:
bytes: [ 0x70, 0x60, 0x91 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "srl a6, a7"
-
input:
bytes: [ 0x40, 0x38, 0x41 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "srli a3, a4, 8"
-
input:
bytes: [ 0x00, 0x2e, 0x40 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "ssa8l a14"
-
input:
bytes: [ 0x10, 0x4f, 0x40 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "ssai 31"
-
input:
bytes: [ 0x00, 0x10, 0x40 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "ssl a0"
-
input:
bytes: [ 0x00, 0x02, 0x40 ]
arch: "CS_ARCH_XTENSA"
options: [ "xtensa" ]
expected:
insns:
-
asm_text: "ssr a2"