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Merge commit '802798ce3c8baa4697120580f87bc1ee377306d3' as 'external/capstone'

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iris
2026-05-11 11:55:07 +02:00
parent ef8e742694 802798ce3c
commit c0de07465b
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external/capstone/tests/MC/AArch64/SVE2/fcvtx.s.yaml
Vendored
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test_cases:
-
input:
bytes: [ 0x00, 0xa0, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve2" ]
expected:
insns:
-
asm_text: "fcvtx z0.s, p0/m, z0.d"
-
input:
bytes: [ 0xfe, 0xbf, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve2" ]
expected:
insns:
-
asm_text: "fcvtx z30.s, p7/m, z31.d"
-
input:
bytes: [ 0xe5, 0x20, 0xd0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve2" ]
expected:
insns:
-
asm_text: "movprfx z5.d, p0/z, z7.d"
-
input:
bytes: [ 0x05, 0xa0, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve2" ]
expected:
insns:
-
asm_text: "fcvtx z5.s, p0/m, z0.d"
-
input:
bytes: [ 0xe5, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve2" ]
expected:
insns:
-
asm_text: "movprfx z5, z7"
-
input:
bytes: [ 0x05, 0xa0, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve2" ]
expected:
insns:
-
asm_text: "fcvtx z5.s, p0/m, z0.d"
-
input:
bytes: [ 0x00, 0xa0, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "fcvtx z0.s, p0/m, z0.d"
-
input:
bytes: [ 0xfe, 0xbf, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "fcvtx z30.s, p7/m, z31.d"
-
input:
bytes: [ 0xe5, 0x20, 0xd0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z5.d, p0/z, z7.d"
-
input:
bytes: [ 0x05, 0xa0, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "fcvtx z5.s, p0/m, z0.d"
-
input:
bytes: [ 0xe5, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z5, z7"
-
input:
bytes: [ 0x05, 0xa0, 0x0a, 0x65 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "fcvtx z5.s, p0/m, z0.d"