test_cases: - input: bytes: [ 0x8b, 0x02, 0x03, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lb t0, (t1), 0" - input: bytes: [ 0x0b, 0x85, 0xf5, 0x7f ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lb a0, (a1), 2047" - input: bytes: [ 0xab, 0x32, 0x73, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lb t0, (t1), t2" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lb a0, (a1), a2" - input: bytes: [ 0xab, 0x32, 0x73, 0x08 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lb t0, t2(t1)" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x08 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lb a0, a2(a1)" - input: bytes: [ 0x8b, 0x42, 0x03, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lbu t0, (t1), 0" - input: bytes: [ 0x0b, 0xc5, 0xf5, 0x7f ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lbu a0, (a1), 2047" - input: bytes: [ 0xab, 0x32, 0x73, 0x10 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lbu t0, (t1), t2" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x10 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lbu a0, (a1), a2" - input: bytes: [ 0xab, 0x32, 0x73, 0x18 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lbu t0, t2(t1)" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x18 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lbu a0, a2(a1)" - input: bytes: [ 0x8b, 0x12, 0x03, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lh t0, (t1), 0" - input: bytes: [ 0x0b, 0x95, 0xf5, 0x7f ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lh a0, (a1), 2047" - input: bytes: [ 0xab, 0x32, 0x73, 0x02 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lh t0, (t1), t2" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x02 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lh a0, (a1), a2" - input: bytes: [ 0xab, 0x32, 0x73, 0x0a ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lh t0, t2(t1)" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x0a ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lh a0, a2(a1)" - input: bytes: [ 0x8b, 0x52, 0x03, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lhu t0, (t1), 0" - input: bytes: [ 0x0b, 0xd5, 0xf5, 0x7f ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lhu a0, (a1), 2047" - input: bytes: [ 0xab, 0x32, 0x73, 0x12 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lhu t0, (t1), t2" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x12 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lhu a0, (a1), a2" - input: bytes: [ 0xab, 0x32, 0x73, 0x1a ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lhu t0, t2(t1)" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x1a ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lhu a0, a2(a1)" - input: bytes: [ 0x8b, 0x22, 0x03, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lw t0, (t1), 0" - input: bytes: [ 0x0b, 0xa5, 0xf5, 0x7f ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lw a0, (a1), 2047" - input: bytes: [ 0xab, 0x32, 0x73, 0x04 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lw t0, (t1), t2" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x04 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lw a0, (a1), a2" - input: bytes: [ 0xab, 0x32, 0x73, 0x0c ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lw t0, t2(t1)" - input: bytes: [ 0x2b, 0xb5, 0xc5, 0x0c ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.lw a0, a2(a1)" - input: bytes: [ 0x2b, 0x00, 0x53, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sb t0, (t1), 0" - input: bytes: [ 0xab, 0x8f, 0xa5, 0x7e ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sb a0, (a1), 2047" - input: bytes: [ 0xab, 0x33, 0x53, 0x20 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sb t0, (t1), t2" - input: bytes: [ 0x2b, 0xb6, 0xa5, 0x20 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sb a0, (a1), a2" - input: bytes: [ 0xab, 0x33, 0x53, 0x28 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sb t0, t2(t1)" - input: bytes: [ 0x2b, 0xb6, 0xa5, 0x28 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sb a0, a2(a1)" - input: bytes: [ 0x2b, 0x10, 0x53, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sh t0, (t1), 0" - input: bytes: [ 0xab, 0x9f, 0xa5, 0x7e ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sh a0, (a1), 2047" - input: bytes: [ 0xab, 0x33, 0x53, 0x22 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sh t0, (t1), t2" - input: bytes: [ 0x2b, 0xb6, 0xa5, 0x22 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sh a0, (a1), a2" - input: bytes: [ 0xab, 0x33, 0x53, 0x2a ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sh t0, t2(t1)" - input: bytes: [ 0x2b, 0xb6, 0xa5, 0x2a ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sh a0, a2(a1)" - input: bytes: [ 0x2b, 0x20, 0x53, 0x00 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sw t0, (t1), 0" - input: bytes: [ 0xab, 0xaf, 0xa5, 0x7e ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sw a0, (a1), 2047" - input: bytes: [ 0xab, 0x33, 0x53, 0x24 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sw t0, (t1), t2" - input: bytes: [ 0x2b, 0xb6, 0xa5, 0x24 ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sw a0, (a1), a2" - input: bytes: [ 0xab, 0x33, 0x53, 0x2c ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sw t0, t2(t1)" - input: bytes: [ 0x2b, 0xb6, 0xa5, 0x2c ] arch: "CS_ARCH_RISCV" options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVMEM" ] expected: insns: - asm_text: "cv.sw a0, a2(a1)"