ircolib/tests/MC/RISCV/fmul_riscv64_riscv_v_riscv_f.txt.yaml

test_cases:
  -
    input:
      bytes: [ 0x57, 0x14, 0x4a, 0x90 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfmul.vv v8, v4, v20, v0.t"

  -
    input:
      bytes: [ 0x57, 0x14, 0x4a, 0x92 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfmul.vv v8, v4, v20"

  -
    input:
      bytes: [ 0x57, 0x54, 0x45, 0x90 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfmul.vf v8, v4, fa0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x54, 0x45, 0x92 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfmul.vf v8, v4, fa0"

  -
    input:
      bytes: [ 0x57, 0x14, 0x4a, 0xe0 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfwmul.vv v8, v4, v20, v0.t"

  -
    input:
      bytes: [ 0x57, 0x14, 0x4a, 0xe2 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfwmul.vv v8, v4, v20"

  -
    input:
      bytes: [ 0x57, 0x54, 0x45, 0xe0 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfwmul.vf v8, v4, fa0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x54, 0x45, 0xe2 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
    expected:
      insns:
        -
          asm_text: "vfwmul.vf v8, v4, fa0"