iris
802798ce3c
git-subtree-dir: external/capstone git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
123 lines
3.4 KiB
YAML
123 lines
3.4 KiB
YAML
test_cases:
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# From the Intel SDM Section 6.1: XACQUIRE/XRELEASE.
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-
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input:
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name: "Rightmost prefix byte should determine HLE semantic"
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bytes: [ 0xF3, 0xF2, 0xC6, 0x00, 0x00 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "mov byte ptr [rax], 0"
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-
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input:
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name: "Rightmost prefix byte should determine HLE semantic"
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bytes: [ 0xF2, 0xF3, 0xC6, 0x00, 0x00 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xrelease mov byte ptr [rax], 0"
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-
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input:
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name: "Rightmost prefix byte should determine HLE semantic"
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bytes: [ 0xF2, 0xF3, 0xF0, 0x00, 0x00 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xrelease lock add byte ptr [rax], al"
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# Prefixes may be ordered freely.
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-
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input:
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name: "Rightmost prefix byte should determine HLE semantic"
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bytes: [ 0xF0, 0xF2, 0xF3, 0x00, 0x00 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xrelease lock add byte ptr [rax], al"
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-
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input:
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name: "Rightmost prefix byte should determine HLE semantic"
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bytes: [ 0xF2, 0xF0, 0xF3, 0x00, 0x00 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xrelease lock add byte ptr [rax], al"
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# Special cases: XCHG
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-
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input:
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name: "special case: xacquire without lock on XCHG"
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bytes: [ 0xF3, 0xF2, 0xF3, 0xF3, 0xF2, 0x87, 0x18 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xacquire xchg dword ptr [rax], ebx"
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-
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input:
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name: "special case: xrelease without lock on XCHG"
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bytes: [ 0xF3, 0x87, 0x18 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xrelease xchg dword ptr [rax], ebx"
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# Separate tests with REX prefix because it is parsed separately in the decoder
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-
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input:
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name: "xrelease with REX prefix"
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bytes: [ 0xF3, 0xF0, 0x48, 0x87, 0x18 ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "xrelease lock xchg qword ptr [rax], rbx"
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# Ensure REPs for string instructions are decoded correctly
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-
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input:
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name: "x86-64: multiple REPs on SCASB should decode to last rep"
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bytes: [ 0xF2, 0xF3, 0xAE ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns:
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-
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asm_text: "repe scasb al, byte ptr [rdi]"
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-
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input:
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name: "x86-64: LOCK+REP on string operation is invalid"
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bytes: [ 0xF0, 0xF2, 0xF3, 0xAE ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_64 ]
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expected:
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insns: []
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-
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input:
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name: "x86-32: multiple REPs on SCASB should decode to last rep"
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bytes: [ 0xF2, 0xF3, 0xAE ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_32 ]
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expected:
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insns:
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-
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asm_text: "repe scasb al, byte ptr es:[edi]"
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-
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input:
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name: "x86-32: LOCK+REP on string operation is invalid"
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bytes: [ 0xF0, 0xF2, 0xF3, 0xAE ]
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arch: "CS_ARCH_X86"
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options: [ CS_OPT_DETAIL, CS_MODE_32 ]
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expected:
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insns: [] |