From 3b06950ba3f511b3ae14bf85765ebc858fb71a89 Mon Sep 17 00:00:00 2001
From: Simone Coco <simone.coco@alientech.to>
Date: Wed, 29 Jan 2025 13:29:42 +0100
Subject: [PATCH] [JIT]: Introduce pipeline simulation like in the interpreter
 (still borked)

---
 src/backend/core/JIT.cpp              |  6 +++++-
 src/backend/core/JIT.hpp              |  3 ++-
 src/backend/core/jit/instructions.cpp | 15 +++++++--------
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/src/backend/core/JIT.cpp b/src/backend/core/JIT.cpp
index c07a7070..5c305bc2 100644
--- a/src/backend/core/JIT.cpp
+++ b/src/backend/core/JIT.cpp
@@ -38,7 +38,9 @@ void JIT::InvalidateBlock(const u32 paddr) {
 }
 
 int JIT::Step() {
+  blockOldPC = regs.oldPC;
   blockPC = regs.pc;
+  blockNextPC = regs.nextPC;
   u32 paddr = 0;
 
   if (!regs.cop0.MapVAddr(Cop0::LOAD, blockPC, paddr)) {
@@ -118,7 +120,9 @@ int JIT::Step() {
       return 1;
     }*/
 
-    blockPC += 4;
+    blockOldPC = blockPC;
+    blockPC = blockNextPC;
+    blockNextPC += 4;
     instructionsInBlock++;
     Emit(instruction);
 
diff --git a/src/backend/core/JIT.hpp b/src/backend/core/JIT.hpp
index e217e1c3..82b9d774 100644
--- a/src/backend/core/JIT.hpp
+++ b/src/backend/core/JIT.hpp
@@ -28,6 +28,7 @@ struct JIT : BaseCPU {
     mem.Reset();
     code.reset();
     blockCache = {};
+    blockCache.resize(kUpperSize);
   }
 
   void InvalidateBlock(u32);
@@ -43,7 +44,7 @@ private:
   Registers regs;
   Mem mem;
   u64 cop2Latch{};
-  u64 blockPC = 0;
+  u64 blockOldPC = 0, blockPC = 0, blockNextPC = 0;
   friend struct Cop1;
   friend struct Registers;
   using BlockFn = int (*)();
diff --git a/src/backend/core/jit/instructions.cpp b/src/backend/core/jit/instructions.cpp
index 143964fb..7581fea0 100644
--- a/src/backend/core/jit/instructions.cpp
+++ b/src/backend/core/jit/instructions.cpp
@@ -334,7 +334,7 @@ void JIT::bgezl(const u32 instr) {
 void JIT::bltzal(const u32 instr) {
   const s16 imm = instr;
   const s64 offset = u64((s64)imm) << 2;
-  regs.Write<s64>(31, blockPC + 4);
+  regs.Write<s64>(31, blockNextPC);
   if (regs.IsRegConstant(RS(instr))) {
     branch_constant(regs.Read<s64>(RS(instr)) < 0, offset);
     return;
@@ -348,7 +348,7 @@ void JIT::bltzal(const u32 instr) {
 void JIT::bgezal(const u32 instr) {
   const s16 imm = instr;
   const s64 offset = u64((s64)imm) << 2;
-  regs.Write<s64>(31, blockPC + 4);
+  regs.Write<s64>(31, blockNextPC);
   if (regs.IsRegConstant(RS(instr))) {
     branch_constant(regs.Read<s64>(RS(instr)) >= 0, offset);
     return;
@@ -362,7 +362,7 @@ void JIT::bgezal(const u32 instr) {
 void JIT::bltzall(const u32 instr) {
   const s16 imm = instr;
   const s64 offset = u64((s64)imm) << 2;
-  regs.Write<s64>(31, blockPC + 4);
+  regs.Write<s64>(31, blockNextPC);
   if (regs.IsRegConstant(RS(instr))) {
     branch_likely_constant(regs.Read<s64>(RS(instr)) < 0, offset);
     return;
@@ -376,7 +376,7 @@ void JIT::bltzall(const u32 instr) {
 void JIT::bgezall(const u32 instr) {
   const s16 imm = instr;
   const s64 offset = u64((s64)imm) << 2;
-  regs.Write<s64>(31, blockPC + 4);
+  regs.Write<s64>(31, blockNextPC);
   if (regs.IsRegConstant(RS(instr))) {
     branch_likely_constant(regs.Read<s64>(RS(instr)) >= 0, offset);
     return;
@@ -864,8 +864,7 @@ void JIT::dsubu(u32 instr) {
 
 void JIT::j(const u32 instr) {
   const s32 target = (instr & 0x3ffffff) << 2;
-  const s64 oldPC = blockPC - 8;
-  const s64 address = (oldPC & ~0xfffffff) | target;
+  const s64 address = (blockOldPC & ~0xfffffff) | target;
   branch_abs_constant(true, address);
 }
 
@@ -881,12 +880,12 @@ void JIT::jr(const u32 instr) {
 }
 
 void JIT::jal(const u32 instr) {
-  regs.Write<s64>(31, blockPC + 4);
+  regs.Write<s64>(31, blockNextPC);
   j(instr);
 }
 
 void JIT::jalr(const u32 instr) {
-  regs.Write<s64>(RD(instr), blockPC + 4);
+  regs.Write<s64>(RD(instr), blockNextPC);
   jr(instr);
 }