From 95655b7001fe38268e1846f42756e06b582d2ee7 Mon Sep 17 00:00:00 2001 From: SimoneN64 Date: Sun, 19 Mar 2023 15:24:59 +0100 Subject: [PATCH] Small fixes and improvements --- src/backend/core/Mem.cpp | 32 ++++++++++++------------ src/backend/core/RSP.cpp | 2 +- src/backend/core/mmio/PIF.cpp | 37 ++++++++++++++-------------- src/backend/core/mmio/PIF.hpp | 16 +++++++++--- src/backend/core/mmio/PIF/Device.cpp | 23 +++++++---------- src/backend/core/mmio/SI.cpp | 16 ++++++------ src/frontend/imgui/Settings.hpp | 8 +++--- 7 files changed, 70 insertions(+), 64 deletions(-) diff --git a/src/backend/core/Mem.cpp b/src/backend/core/Mem.cpp index 270a17c7..46b25c7a 100644 --- a/src/backend/core/Mem.cpp +++ b/src/backend/core/Mem.cpp @@ -127,9 +127,9 @@ u8 Mem::Read8(n64::Registers ®s, u32 paddr) { paddr = (paddr + 2) & ~2; return rom.cart[BYTE_ADDRESS(paddr) & rom.mask]; case 0x1FC00000 ... 0x1FC007BF: - return si.pif.pifBootrom[BYTE_ADDRESS(paddr) - 0x1FC00000]; + return si.pif.bootrom[BYTE_ADDRESS(paddr) - 0x1FC00000]; case PIF_RAM_REGION: - return si.pif.pifRam[paddr - PIF_RAM_REGION_START]; + return si.pif.ram[paddr - PIF_RAM_REGION_START]; case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x0FFFFFFF: @@ -167,9 +167,9 @@ u16 Mem::Read16(n64::Registers ®s, u32 paddr) { paddr = (paddr + 2) & ~3; return Util::ReadAccess(rom.cart, HALF_ADDRESS(paddr) & rom.mask); case 0x1FC00000 ... 0x1FC007BF: - return Util::ReadAccess(si.pif.pifBootrom, HALF_ADDRESS(paddr) - 0x1FC00000); + return Util::ReadAccess(si.pif.bootrom, HALF_ADDRESS(paddr) - 0x1FC00000); case PIF_RAM_REGION: - return be16toh(Util::ReadAccess(si.pif.pifRam, paddr - PIF_RAM_REGION_START)); + return be16toh(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x0FFFFFFF: @@ -204,9 +204,9 @@ u32 Mem::Read32(n64::Registers ®s, u32 paddr) { case 0x10000000 ... 0x1FBFFFFF: return Util::ReadAccess(rom.cart, paddr & rom.mask); case 0x1FC00000 ... 0x1FC007BF: - return Util::ReadAccess(si.pif.pifBootrom, paddr - 0x1FC00000); + return Util::ReadAccess(si.pif.bootrom, paddr - 0x1FC00000); case PIF_RAM_REGION: - return be32toh(Util::ReadAccess(si.pif.pifRam, paddr - PIF_RAM_REGION_START)); + return be32toh(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x0FFFFFFF: case 0x1FC00800 ... 0xFFFFFFFF: return 0; default: @@ -240,9 +240,9 @@ u64 Mem::Read64(n64::Registers ®s, u32 paddr) { case 0x10000000 ... 0x1FBFFFFF: return Util::ReadAccess(rom.cart, paddr & rom.mask); case 0x1FC00000 ... 0x1FC007BF: - return Util::ReadAccess(si.pif.pifBootrom, paddr - 0x1FC00000); + return Util::ReadAccess(si.pif.bootrom, paddr - 0x1FC00000); case PIF_RAM_REGION: - return be64toh(Util::ReadAccess(si.pif.pifRam, paddr - PIF_RAM_REGION_START)); + return be64toh(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x0FFFFFFF: @@ -305,8 +305,8 @@ void Mem::Write8(Registers& regs, u32 paddr, u32 val) { case PIF_RAM_REGION: val = val << (8 * (3 - (paddr & 3))); paddr = (paddr - PIF_RAM_REGION_START) & ~3; - Util::WriteAccess(si.pif.pifRam, paddr, htobe32(val)); - si.pif.ProcessPIFCommands(*this); + Util::WriteAccess(si.pif.ram, paddr, htobe32(val)); + si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: @@ -356,8 +356,8 @@ void Mem::Write16(Registers& regs, u32 paddr, u32 val) { case PIF_RAM_REGION: val = val << (16 * !(paddr & 2)); paddr &= ~3; - Util::WriteAccess(si.pif.pifRam, paddr - PIF_RAM_REGION_START, htobe32(val)); - si.pif.ProcessPIFCommands(*this); + Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, htobe32(val)); + si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: @@ -409,8 +409,8 @@ void Mem::Write32(Registers& regs, u32 paddr, u32 val) { break; case 0x14000000 ... 0x1FBFFFFF: break; case PIF_RAM_REGION: - Util::WriteAccess(si.pif.pifRam, paddr - PIF_RAM_REGION_START, htobe32(val)); - si.pif.ProcessPIFCommands(*this); + Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, htobe32(val)); + si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x08000000 ... 0x0FFFFFFF: case 0x04900000 ... 0x07FFFFFF: @@ -449,8 +449,8 @@ void Mem::Write64(Registers& regs, u32 paddr, u64 val) { case 0x10000000 ... 0x1FBFFFFF: break; case PIF_RAM_REGION: - Util::WriteAccess(si.pif.pifRam, paddr - PIF_RAM_REGION_START, htobe64(val)); - si.pif.ProcessPIFCommands(*this); + Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, htobe64(val)); + si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: diff --git a/src/backend/core/RSP.cpp b/src/backend/core/RSP.cpp index 8816000b..2bafb437 100644 --- a/src/backend/core/RSP.cpp +++ b/src/backend/core/RSP.cpp @@ -11,7 +11,7 @@ RSP::RSP() { void RSP::Reset() { lastSuccessfulSPAddr.raw = 0; lastSuccessfulDRAMAddr.raw = 0; - spStatus.raw = 0x1; + spStatus.raw = 0; spStatus.halt = true; oldPC = 0; pc = 0; diff --git a/src/backend/core/mmio/PIF.cpp b/src/backend/core/mmio/PIF.cpp index cc7fb4cc..0f58fe80 100644 --- a/src/backend/core/mmio/PIF.cpp +++ b/src/backend/core/mmio/PIF.cpp @@ -13,14 +13,14 @@ void PIF::CICChallenge() { // Split 15 bytes into 30 nibbles for (int i = 0; i < 15; i++) { - challenge[i * 2 + 0] = (pifRam[0x30 + i] >> 4) & 0x0F; - challenge[i * 2 + 1] = (pifRam[0x30 + i] >> 0) & 0x0F; + challenge[i * 2 + 0] = (ram[0x30 + i] >> 4) & 0x0F; + challenge[i * 2 + 1] = (ram[0x30 + i] >> 0) & 0x0F; } n64_cic_nus_6105((char*)challenge, (char*)response, CHL_LEN - 2); for (int i = 0; i < 15; i++) { - pifRam[0x30 + i] = (response[i * 2] << 4) + response[i * 2 + 1]; + ram[0x30 + i] = (response[i * 2] << 4) + response[i * 2 + 1]; } } @@ -30,32 +30,33 @@ void PIF::ProcessPIFCommands(Mem &mem) { channel = 0; int i = 0; while (i < 63) { - u8* cmd = &pifRam[i++]; - u8 cmdlen = cmd[0] & 0x3F; + u8* cmd = &ram[i++]; + u8 cmdlen = cmd[CMD_LEN] & 0x3F; if (cmdlen == 0) { channel++; - } else if (cmdlen == 0x3D) { // 0xFD in PIF RAM = send reset signal to this pif channel + } else if (cmdlen == 0x3D) { channel++; - } else if (cmdlen == 0x3E) { // 0xFE in PIF RAM = end of commands + } else if (cmdlen == 0x3E) { break; } else if (cmdlen == 0x3F) { continue; } else { - u8 r = pifRam[i++]; - r |= (1 << 7); - if (r == 0xFE) { // 0xFE in PIF RAM = end of commands. + u8 r = ram[i++]; + if (r == 0xFE) { break; } - u8 reslen = r & 0x3F; // TODO: out of bounds access possible on invalid data - u8* res = &pifRam[i + cmdlen]; + u8 reslen = r & 0x3F; + u8* res = &ram[i + cmdlen]; - switch (cmd[2]) { + switch (cmd[CMD_IDX]) { case 0xff: ControllerID(res); + channel++; break; case 0: ControllerID(res); + channel++; break; case 1: UpdateController(); @@ -88,13 +89,13 @@ void PIF::ProcessPIFCommands(Mem &mem) { } } - //if (control & 2) { - // CICChallenge(); - // pifRam[63] &= ~2; - //} + if (control & 0x02) { + CICChallenge(); + ram[63] &= ~2; + } if (control & 0x08) { - pifRam[63] &= ~8; + ram[63] &= ~8; } if (control & 0x30) { diff --git a/src/backend/core/mmio/PIF.hpp b/src/backend/core/mmio/PIF.hpp index d92ac552..826db115 100644 --- a/src/backend/core/mmio/PIF.hpp +++ b/src/backend/core/mmio/PIF.hpp @@ -99,19 +99,27 @@ struct PIF { void ControllerID(u8* res); SDL_GameController* gamepad; JoybusDevice joybusDevices[6]{}; - u8 pifBootrom[PIF_BOOTROM_SIZE]{}, pifRam[PIF_RAM_SIZE]{}; + u8 bootrom[PIF_BOOTROM_SIZE]{}, ram[PIF_RAM_SIZE]{}, *mempak, *eeprom; int channel = 0; u8 Read(u32 addr) { addr &= 0x7FF; - if(addr < 0x7c0) return pifBootrom[addr]; - return pifRam[addr & PIF_RAM_DSIZE]; + if(addr < 0x7c0) return bootrom[addr]; + return ram[addr & PIF_RAM_DSIZE]; } void Write(u32 addr, u8 val) { addr &= 0x7FF; if(addr < 0x7c0) return; - pifRam[addr & PIF_RAM_DSIZE] = val; + ram[addr & PIF_RAM_DSIZE] = val; + } + + inline AccessoryType getAccessoryType() const { + if (channel >= 4 || joybusDevices[channel].type != JOYBUS_CONTROLLER) { + return ACCESSORY_NONE; + } else { + return joybusDevices[channel].accessoryType; + } } }; } \ No newline at end of file diff --git a/src/backend/core/mmio/PIF/Device.cpp b/src/backend/core/mmio/PIF/Device.cpp index 13c62c64..231582fd 100644 --- a/src/backend/core/mmio/PIF/Device.cpp +++ b/src/backend/core/mmio/PIF/Device.cpp @@ -4,13 +4,12 @@ namespace n64 { void PIF::InitDevices(SaveType saveType) { - for (int i = 0; i < 4; i++) { - joybusDevices[i].type = JOYBUS_CONTROLLER; //TODO - if (joybusDevices[i].type) { - // TODO: make this configurable - joybusDevices[i].accessoryType = ACCESSORY_MEMPACK; - } + for (int i = 0; i < 4; i++) { //TODO: make this configurable + joybusDevices[i].type = JOYBUS_NONE; + joybusDevices[i].accessoryType = ACCESSORY_NONE; } + joybusDevices[0].type = JOYBUS_CONTROLLER; + joybusDevices[0].accessoryType = ACCESSORY_MEMPACK; if (saveType == SAVE_EEPROM_4k) { joybusDevices[4].type = JOYBUS_4KB_EEPROM; @@ -22,7 +21,7 @@ void PIF::InitDevices(SaveType saveType) { joybusDevices[5].type = JOYBUS_NONE; } -void PIF::ControllerID(u8 *res) { +void PIF::ControllerID(u8 *res) const { if (channel < 6) { switch (joybusDevices[channel].type) { case JOYBUS_NONE: @@ -74,11 +73,9 @@ void PIF::ControllerID(u8 *res) { } else { Util::panic("Device ID on unknown channel {}", channel); } - - channel++; } -bool PIF::ReadButtons(u8* res) { +bool PIF::ReadButtons(u8* res) const { if(channel >= 6) { res[0] = 0; res[1] = 0; @@ -96,20 +93,18 @@ bool PIF::ReadButtons(u8* res) { return false; // Device not present case JOYBUS_CONTROLLER: if (TasMovieLoaded()) { - // Load inputs from TAS movie Controller controller = TasNextInputs(); res[0] = controller.byte1; res[1] = controller.byte2; res[2] = controller.joy_x; res[3] = controller.joy_y; } else { - // Load inputs normally res[0] = joybusDevices[channel].controller.byte1; res[1] = joybusDevices[channel].controller.byte2; res[2] = joybusDevices[channel].controller.joy_x; res[3] = joybusDevices[channel].controller.joy_y; } - break; + return true; case JOYBUS_DANCEPAD: case JOYBUS_VRU: case JOYBUS_MOUSE: @@ -120,6 +115,6 @@ bool PIF::ReadButtons(u8* res) { return false; } - return true; // Success! + return true; } } \ No newline at end of file diff --git a/src/backend/core/mmio/SI.cpp b/src/backend/core/mmio/SI.cpp index d6b49578..d39daaf1 100644 --- a/src/backend/core/mmio/SI.cpp +++ b/src/backend/core/mmio/SI.cpp @@ -12,6 +12,8 @@ void SI::Reset() { dramAddr = 0; pifAddr = 0; memset(&pif.joybusDevices, 0, sizeof(JoybusDevice) * 6); + memset(&pif.bootrom, 0, PIF_BOOTROM_SIZE); + memset(&pif.ram, 0, PIF_RAM_SIZE); } auto SI::Read(MI& mi, u32 addr) const -> u32 { @@ -36,17 +38,17 @@ void DMA(Mem& mem, Registers& regs) { SI& si = mem.mmio.si; si.status.dmaBusy = false; if(si.toDram) { - si.pif.ProcessPIFCommands(mem); + si.pif.ProcessCommands(mem); for(int i = 0; i < 64; i++) { - mem.mmio.rdp.rdram[BYTE_ADDRESS(si.dramAddr + i)] = si.pif.pifRam[i]; + mem.mmio.rdp.rdram[BYTE_ADDRESS(si.dramAddr + i)] = si.pif.Read(si.pifAddr + i); } - Util::debug("SI DMA from PIF RAM to RDRAM ({:08X} to {:08X})\n", si.pifAddr, si.dramAddr); + //Util::debug("SI DMA from PIF RAM to RDRAM ({:08X} to {:08X})\n", si.pifAddr, si.dramAddr); } else { for(int i = 0; i < 64; i++) { - si.pif.pifRam[i] = mem.mmio.rdp.rdram[BYTE_ADDRESS(si.dramAddr + i)]; + si.pif.Write(si.pifAddr + i, mem.mmio.rdp.rdram[BYTE_ADDRESS(si.dramAddr + i)]); } - Util::debug("SI DMA from RDRAM to PIF RAM ({:08X} to {:08X})\n", si.dramAddr, si.pifAddr); - si.pif.ProcessPIFCommands(mem); + //Util::debug("SI DMA from RDRAM to PIF RAM ({:08X} to {:08X})\n", si.dramAddr, si.pifAddr); + si.pif.ProcessCommands(mem); } InterruptRaise(mem.mmio.mi, regs, Interrupt::SI); } @@ -66,7 +68,7 @@ void SI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) { pifAddr = val & 0x1FFFFFFF; status.dmaBusy = true; toDram = false; - scheduler.enqueueRelative({4065*3, DMA}); + scheduler.enqueueRelative({SI_DMA_DELAY, DMA}); } break; case 0x04800018: InterruptLower(mem.mmio.mi, regs, Interrupt::SI); diff --git a/src/frontend/imgui/Settings.hpp b/src/frontend/imgui/Settings.hpp index fd2df965..407db897 100644 --- a/src/frontend/imgui/Settings.hpp +++ b/src/frontend/imgui/Settings.hpp @@ -8,10 +8,10 @@ struct Settings { Settings(n64::Core&); ~Settings(); - float GetVolumeL() const { return volumeL; }; - float GetVolumeR() const { return volumeR; }; - bool GetLockChannels() const { return lockChannels; } - std::string GetCpuType() const { return cpuType; } + inline float GetVolumeL() const { return volumeL; }; + inline float GetVolumeR() const { return volumeR; }; + inline bool GetLockChannels() const { return lockChannels; } + inline std::string GetCpuType() const { return cpuType; } void RenderWidget(bool& show); private: