diff --git a/src/backend/Core.cpp b/src/backend/Core.cpp
index b9dcd3ba..349f73e4 100644
--- a/src/backend/Core.cpp
+++ b/src/backend/Core.cpp
@@ -50,7 +50,7 @@ void Core::LoadROM(const std::string& rom_) {
   cpu->mem.mmio.si.pif.LoadEeprom(cpu->mem.saveType, rom);
   cpu->mem.flash.Load(cpu->mem.saveType, rom);
   cpu->mem.LoadSRAM(cpu->mem.saveType, rom);
-  PIF::ExecutePIF(cpu->mem, cpu->regs);
+  cpu->mem.mmio.si.pif.Execute();
   pause = false;
   render = true;
 }
diff --git a/src/backend/core/MMIO.hpp b/src/backend/core/MMIO.hpp
index 04d6fd15..6b1433e9 100644
--- a/src/backend/core/MMIO.hpp
+++ b/src/backend/core/MMIO.hpp
@@ -13,7 +13,7 @@ struct Mem;
 struct Registers;
 
 struct MMIO {
-  MMIO(Registers& regs) : mi(regs) {}
+  MMIO(Mem& mem, Registers& regs) : mi(regs), si(mem, regs) {}
   void Reset();
 
   VI vi;
diff --git a/src/backend/core/Mem.cpp b/src/backend/core/Mem.cpp
index 5fe97e05..5ba5c4bc 100644
--- a/src/backend/core/Mem.cpp
+++ b/src/backend/core/Mem.cpp
@@ -8,7 +8,7 @@
 #include <cassert>
 
 namespace n64 {
-Mem::Mem(Registers& regs) : flash(saveData), mmio(regs) {
+Mem::Mem(Registers& regs) : flash(saveData), mmio(*this, regs) {
   memset(readPages, 0, PAGE_COUNT);
   memset(writePages, 0, PAGE_COUNT);
 
diff --git a/src/backend/core/mmio/PIF.cpp b/src/backend/core/mmio/PIF.cpp
index 1f571e22..31cdd629 100644
--- a/src/backend/core/mmio/PIF.cpp
+++ b/src/backend/core/mmio/PIF.cpp
@@ -332,7 +332,7 @@ void PIF::EepromWrite(const u8* cmd, u8* res, const Mem& mem) {
   }
 }
 
-void PIF::DoPIFHLE(Mem& mem, Registers& regs, bool pal, CICType cicType) {
+void PIF::HLE(bool pal, CICType cicType) {
   mem.Write<u32>(regs, PIF_RAM_REGION_START + 0x24, cicSeeds[cicType]);
 
   switch(cicType) {
@@ -597,7 +597,7 @@ void PIF::DoPIFHLE(Mem& mem, Registers& regs, bool pal, CICType cicType) {
   regs.SetPC32(s32(0xA4000040));
 }
 
-void PIF::ExecutePIF(Mem& mem, Registers& regs) {
+void PIF::Execute() {
   CICType cicType = mem.rom.cicType;
   bool pal = mem.rom.pal;
   mem.Write<u32>(regs, PIF_RAM_REGION_START + 0x24, cicSeeds[cicType]);
@@ -615,7 +615,7 @@ void PIF::ExecutePIF(Mem& mem, Registers& regs) {
       break;
   }
 
-  DoPIFHLE(mem, regs, pal, cicType);
+  HLE(pal, cicType);
 }
 
 std::vector<u8> PIF::Serialize() {
diff --git a/src/backend/core/mmio/PIF.hpp b/src/backend/core/mmio/PIF.hpp
index d78e02e5..d160a0e6 100644
--- a/src/backend/core/mmio/PIF.hpp
+++ b/src/backend/core/mmio/PIF.hpp
@@ -152,7 +152,7 @@ enum CICType {
 };
 
 struct PIF {
-  PIF() = default;
+  PIF(Mem& mem, Registers& regs) : mem(mem), regs(regs) {}
   ~PIF() = default;
   void Reset();
   void MaybeLoadMempak();
@@ -160,8 +160,8 @@ struct PIF {
   void ProcessCommands(Mem&);
   void InitDevices(SaveType);
   void CICChallenge();
-  static void ExecutePIF(Mem& mem, Registers& regs);
-  static void DoPIFHLE(Mem& mem, Registers& regs, bool pal, CICType cicType);
+  void Execute();
+  void HLE(bool pal, CICType cicType);
   bool ReadButtons(u8*);
   void ControllerID(u8*) const;
   void MempakRead(const u8*, u8*);
@@ -178,6 +178,8 @@ struct PIF {
   std::string mempakPath{}, eepromPath{};
   size_t eepromSize{};
   MupenMovie movie;
+  Mem& mem;
+  Registers& regs;
 
   FORCE_INLINE u8 Read(u32 addr) {
     addr &= 0x7FF;
diff --git a/src/backend/core/mmio/SI.cpp b/src/backend/core/mmio/SI.cpp
index e2f1fd15..157e66da 100644
--- a/src/backend/core/mmio/SI.cpp
+++ b/src/backend/core/mmio/SI.cpp
@@ -3,7 +3,7 @@
 #include <Scheduler.hpp>
 
 namespace n64 {
-SI::SI() {
+SI::SI(Mem& mem, Registers& regs) : pif(mem, regs) {
   Reset();
 }
 
diff --git a/src/backend/core/mmio/SI.hpp b/src/backend/core/mmio/SI.hpp
index 81ca5ea4..9f1cfbd2 100644
--- a/src/backend/core/mmio/SI.hpp
+++ b/src/backend/core/mmio/SI.hpp
@@ -21,7 +21,7 @@ union SIStatus {
 struct Mem;
 
 struct SI {
-  SI();
+  SI(Mem&, Registers&);
   void Reset();
   SIStatus status{};
   u32 dramAddr{};