From cbc2ca147a5c85472dc8872ed3d33489ddeade12 Mon Sep 17 00:00:00 2001 From: SimoneN64 Date: Fri, 9 Jun 2023 17:10:02 +0200 Subject: [PATCH] more flash work --- src/backend/Core.cpp | 1 + src/backend/MemoryRegions.hpp | 2 +- src/backend/core/Mem.cpp | 106 ++++++++++++++++++++++++--------- src/backend/core/Mem.hpp | 26 +++++++- src/backend/core/mem/Flash.cpp | 3 +- src/backend/core/mmio/PI.cpp | 3 +- 6 files changed, 109 insertions(+), 32 deletions(-) diff --git a/src/backend/Core.cpp b/src/backend/Core.cpp index f89430dd..959590ad 100644 --- a/src/backend/Core.cpp +++ b/src/backend/Core.cpp @@ -28,6 +28,7 @@ void Core::LoadROM(const std::string& rom_) { cpu.mem.mmio.si.pif.LoadMempak(rom_); cpu.mem.mmio.si.pif.LoadEeprom(cpu.mem.saveType, rom_); cpu.mem.flash.Load(cpu.mem.saveType, rom_); + cpu.mem.LoadSRAM(cpu.mem.saveType, rom_); cpu.mem.mmio.si.pif.ExecutePIF(cpu.mem, cpu.regs); } diff --git a/src/backend/MemoryRegions.hpp b/src/backend/MemoryRegions.hpp index dc3284a5..e05c15ed 100644 --- a/src/backend/MemoryRegions.hpp +++ b/src/backend/MemoryRegions.hpp @@ -3,7 +3,7 @@ #define RDRAM_SIZE 0x800000 #define RDRAM_DSIZE (RDRAM_SIZE - 1) -#define SRAM_SIZE 0x8000000 +#define SRAM_SIZE 256_kb #define SRAM_DSIZE (SRAM_SIZE - 1) #define DMEM_SIZE 0x1000 #define DMEM_DSIZE (DMEM_SIZE - 1) diff --git a/src/backend/core/Mem.cpp b/src/backend/core/Mem.cpp index 447a1a70..10f987f2 100644 --- a/src/backend/core/Mem.cpp +++ b/src/backend/core/Mem.cpp @@ -18,15 +18,43 @@ Mem::Mem() { } rom.cart = (u8*)calloc(CART_SIZE, 1); - sram = (u8*)calloc(SRAM_SIZE, 1); } void Mem::Reset() { memset(rom.cart, 0, CART_SIZE); - memset(sram, 0, SRAM_SIZE); + if(sram) + memset(sram, 0, SRAM_SIZE); mmio.Reset(); } +void Mem::LoadSRAM(SaveType saveType, fs::path path) { + if(saveType == SAVE_SRAM_256k) { + if(sram) { + memset(sram, 0, SRAM_SIZE); + } else { + sram = (u8 *) calloc(SRAM_SIZE, 1); + } + sramPath = path.replace_extension(".sram").string(); + FILE *f = fopen(sramPath.c_str(), "rb"); + if (!f) { + f = fopen(sramPath.c_str(), "wb"); + fwrite(sram, 1, SRAM_SIZE, f); + fclose(f); + f = fopen(sramPath.c_str(), "rb"); + } + + fseek(f, 0, SEEK_END); + size_t actualSize = ftell(f); + fseek(f, 0, SEEK_SET); + if (actualSize != SRAM_SIZE) { + Util::panic("Corrupt SRAM!"); + } + + fread(sram, 1, SRAM_SIZE, f); + fclose(f); + } +} + FORCE_INLINE void SetROMCIC(u32 checksum, ROM& rom) { switch (checksum) { case 0xEC8B1325: rom.cicType = CIC_NUS_7102; break; // 7102 @@ -129,9 +157,30 @@ u8 Mem::Read8(n64::Registers ®s, u32 paddr) { return si.pif.ram[paddr - PIF_RAM_REGION_START]; case 0x00800000 ... 0x03FFFFFF: // unused case 0x04200000 ... 0x042FFFFF: // unused - case 0x04900000 ... 0x0FFFFFFF: // unused + case 0x04900000 ... 0x07FFFFFF: // unused case 0x1FC00800 ... 0xFFFFFFFF: // unused return 0; + case CART_REGION_2_2: + switch (saveType) { + case SAVE_NONE: + Util::panic("Accessing cartridge backup with save type SAVE_NONE"); + break; + case SAVE_EEPROM_4k: + case SAVE_EEPROM_16k: + Util::panic("Accessing cartridge backup with save type SAVE_EEPROM"); + break; + case SAVE_FLASH_1m: + if(flash.saveData) { + return flash.Read8(paddr - CART_REGION_START_2_2); + } else { + Util::panic("Invalid backup Write8 if save data is not initialized"); + } + case SAVE_SRAM_256k: + if(sram) { + return sram[paddr - CART_REGION_START_2_2]; + } + } + break; default: Util::panic("Unimplemented 8-bit read at address {:08X} (PC = {:016X})", paddr, (u64) regs.pc); } @@ -200,7 +249,7 @@ u32 Mem::Read32(n64::Registers ®s, u32 paddr) { } else if (saveType == SAVE_SRAM_256k) { return 0xffff'ffff; } else if (saveType == SAVE_FLASH_1m) { - return flash.Read(paddr - CART_REGION_START_2_2); + return flash.Read32(paddr - CART_REGION_START_2_2); } else { Util::panic("Cartridge backup Read32 with unknown save type!");; } @@ -285,23 +334,26 @@ void Mem::Write8(Registers& regs, u32 paddr, u32 val) { si.pif.ProcessCommands(*this); break; case CART_REGION_2_2: - if(flash.saveData) { - switch (saveType) { - case SAVE_NONE: - Util::panic("Accessing cartridge backup with save type SAVE_NONE"); - break; - case SAVE_EEPROM_4k: - case SAVE_EEPROM_16k: - Util::panic("Accessing cartridge backup with save type SAVE_EEPROM"); - break; - case SAVE_FLASH_1m: + switch (saveType) { + case SAVE_NONE: + Util::panic("Accessing cartridge backup with save type SAVE_NONE"); + break; + case SAVE_EEPROM_4k: + case SAVE_EEPROM_16k: + Util::panic("Accessing cartridge backup with save type SAVE_EEPROM"); + break; + case SAVE_FLASH_1m: + if(flash.saveData) { flash.Write8(paddr - CART_REGION_START_2_2, val); - break; - case SAVE_SRAM_256k: - flash.saveData[paddr - CART_REGION_START_2_2] = val; - flash.saveDataDirty = true; - break; - } + } else { + Util::panic("Invalid backup Write8 if save data is not initialized"); + } + break; + case SAVE_SRAM_256k: + if(sram) { + sram[paddr - CART_REGION_START_2_2] = val; + } + break; } break; case 0x00800000 ... 0x03FFFFFF: @@ -413,17 +465,17 @@ void Mem::Write32(Registers& regs, u32 paddr, u32 val) { case 0x1FC00800 ... 0x7FFFFFFF: case 0x80000000 ... 0xFFFFFFFF: break; case CART_REGION_2_2: - if(flash.saveData) { - if (saveType == SAVE_FLASH_1m) { + if (saveType == SAVE_FLASH_1m) { + if(flash.saveData) { flash.Write32(paddr - CART_REGION_START_2_2, val); - } else if (saveType == SAVE_SRAM_256k) { - break; } else { - Util::panic("Invalid cartridge backup Write32 with save type {} (addr {:08X})", static_cast(saveType), - paddr); + Util::panic("Invalid write to cartridge backup if save data is not initialized!"); } + } else if (saveType == SAVE_SRAM_256k) { + break; } else { - Util::panic("Invalid write to cartridge backup if save data is not initialized!"); + Util::panic("Invalid cartridge backup Write32 with save type {} (addr {:08X})", static_cast(saveType), + paddr); } break; default: Util::panic("Unimplemented 32-bit write at address {:08X} with value {:0X} (PC = {:016X})", paddr, val, (u64)regs.pc); diff --git a/src/backend/core/Mem.hpp b/src/backend/core/Mem.hpp index 0ae6be44..141eae6b 100644 --- a/src/backend/core/Mem.hpp +++ b/src/backend/core/Mem.hpp @@ -93,7 +93,8 @@ struct Flash { default: Util::warn("Invalid flash command: {:02X}", cmd); } } else { - Util::warn("Ignoring write of {:08X} to flash status register", val); + status = val; + Util::warn("Write of {:08X} to flash status register", val); } } @@ -110,7 +111,26 @@ struct Flash { } } - FORCE_INLINE u32 Read(u32 index) const { + FORCE_INLINE u32 Read8(u32 index) const { + switch (state) { + case Idle: Util::panic("Flash read byte while in state FLASH_STATE_IDLE"); + case Write: Util::panic("Flash read byte while in state FLASH_STATE_WRITE"); + case Read: { + u8 value = saveData[index]; + Util::debug("Flash read byte in state read: index {:08X} = {:02X}", index, value); + return value; + } + case Status: { + u32 offset = (7 - (index % 8)) * 8; + u8 value = (status >> offset) & 0xFF; + Util::debug("Flash read byte in state status: index {:08X} = {:02X}", index, value); + return value; + } + default: Util::panic("Flash read byte while in unknown state"); + } + } + + FORCE_INLINE u32 Read32(u32 index) const { return status >> 32; } }; @@ -121,6 +141,7 @@ struct Mem { } Mem(); void Reset(); + void LoadSRAM(SaveType, fs::path); void LoadROM(const std::string&); [[nodiscard]] auto GetRDRAM() const -> u8* { return mmio.rdp.rdram; @@ -178,6 +199,7 @@ private: friend struct Core; u8* sram; u8 isviewer[ISVIEWER_SIZE]{}; + std::string sramPath{}; FORCE_INLINE bool IsROMPAL() { static const char pal_codes[] = {'D', 'F', 'I', 'P', 'S', 'U', 'X', 'Y'}; diff --git a/src/backend/core/mem/Flash.cpp b/src/backend/core/mem/Flash.cpp index 42024b4f..47e847f3 100644 --- a/src/backend/core/mem/Flash.cpp +++ b/src/backend/core/mem/Flash.cpp @@ -6,7 +6,8 @@ void Flash::Load(SaveType saveType, fs::path path) { if(saveData) { memset(saveData, 0xff, 1_mb); } else { - saveData = (u8 *) calloc(1_mb, 1); + saveData = (u8 *) malloc(1_mb); + memset(saveData, 0xff, 1_mb); } saveDataPath = path.replace_extension(".flash").string(); FILE *f = fopen(saveDataPath.c_str(), "rb"); diff --git a/src/backend/core/mmio/PI.cpp b/src/backend/core/mmio/PI.cpp index e71ac64c..7afe10c0 100644 --- a/src/backend/core/mmio/PI.cpp +++ b/src/backend/core/mmio/PI.cpp @@ -52,7 +52,8 @@ FORCE_INLINE u8 PIGetDomain(u32 address) { case CART_REGION_2_2: return 2; default: - Util::panic("Unknown PI domain for address {:08X}!", address); + //Util::panic("Unknown PI domain for address {:08X}!", address); + return 1; } }