diff --git a/src/backend/core/Mem.cpp b/src/backend/core/Mem.cpp index ec761847..acf5ad71 100644 --- a/src/backend/core/Mem.cpp +++ b/src/backend/core/Mem.cpp @@ -150,7 +150,7 @@ void Mem::LoadROM(bool isArchive, const std::string &filename) { buf = OpenROM(filename, sizeAdjusted); } - endianness = be32toh(*reinterpret_cast(buf.data())); + endianness = bswap(*reinterpret_cast(buf.data())); Util::SwapN64Rom(buf, endianness); std::copy(buf.begin(), buf.end(), rom.cart.begin()); @@ -159,15 +159,15 @@ void Mem::LoadROM(bool isArchive, const std::string &filename) { } memcpy(rom.gameNameCart, rom.header.imageName, sizeof(rom.header.imageName)); - rom.header.clockRate = be32toh(rom.header.clockRate); - rom.header.programCounter = be32toh(rom.header.programCounter); - rom.header.release = be32toh(rom.header.release); - rom.header.crc1 = be32toh(rom.header.crc1); - rom.header.crc2 = be32toh(rom.header.crc2); - rom.header.unknown = be64toh(rom.header.unknown); - rom.header.unknown2 = be32toh(rom.header.unknown2); - rom.header.manufacturerId = be32toh(rom.header.manufacturerId); - rom.header.cartridgeId = be16toh(rom.header.cartridgeId); + rom.header.clockRate = bswap(rom.header.clockRate); + rom.header.programCounter = bswap(rom.header.programCounter); + rom.header.release = bswap(rom.header.release); + rom.header.crc1 = bswap(rom.header.crc1); + rom.header.crc2 = bswap(rom.header.crc2); + rom.header.unknown = bswap(rom.header.unknown); + rom.header.unknown2 = bswap(rom.header.unknown2); + rom.header.manufacturerId = bswap(rom.header.manufacturerId); + rom.header.cartridgeId = bswap(rom.header.cartridgeId); rom.code[0] = rom.header.manufacturerId & 0xFF; rom.code[1] = (rom.header.cartridgeId >> 8) & 0xFF; @@ -180,7 +180,7 @@ void Mem::LoadROM(bool isArchive, const std::string &filename) { u32 checksum = Util::crc32(0, &rom.cart[0x40], 0x9c0); SetROMCIC(checksum, rom); - endianness = be32toh(*reinterpret_cast(rom.cart.data())); + endianness = bswap(*reinterpret_cast(rom.cart.data())); Util::SwapN64Rom(rom.cart, endianness); rom.pal = IsROMPAL(); } @@ -243,7 +243,7 @@ u16 Mem::Read(n64::Registers ®s, u32 paddr) { case PIF_ROM_REGION: return Util::ReadAccess(si.pif.bootrom, HALF_ADDRESS(paddr) - PIF_ROM_REGION_START); case PIF_RAM_REGION: - return be16toh(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); + return bswap(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); case 0x00800000 ... 0x03EFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x04FFFFFF: @@ -273,7 +273,7 @@ u32 Mem::Read(n64::Registers ®s, u32 paddr) { case PIF_ROM_REGION: return Util::ReadAccess(si.pif.bootrom, paddr - PIF_ROM_REGION_START); case PIF_RAM_REGION: - return be32toh(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); + return bswap(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x04FFFFFF: @@ -303,7 +303,7 @@ u64 Mem::Read(n64::Registers ®s, u32 paddr) { case PIF_ROM_REGION: return Util::ReadAccess(si.pif.bootrom, paddr - PIF_ROM_REGION_START); case PIF_RAM_REGION: - return be64toh(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); + return bswap(Util::ReadAccess(si.pif.ram, paddr - PIF_RAM_REGION_START)); case 0x00800000 ... 0x03EFFFFF: case 0x04200000 ... 0x042FFFFF: case 0x04900000 ... 0x04FFFFFF: @@ -339,7 +339,7 @@ void Mem::Write(Registers ®s, u32 paddr, u32 val) { case PIF_RAM_REGION: val = val << (8 * (3 - (paddr & 3))); paddr = (paddr - PIF_RAM_REGION_START) & ~3; - Util::WriteAccess(si.pif.ram, paddr, htobe32(val)); + Util::WriteAccess(si.pif.ram, paddr, bswap(val)); si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03EFFFFF: @@ -380,7 +380,7 @@ void Mem::Write(Registers ®s, u32 paddr, u32 val) { case PIF_RAM_REGION: val = val << (16 * !(paddr & 2)); paddr &= ~3; - Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, htobe32(val)); + Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, bswap(val)); si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03EFFFFF: @@ -418,7 +418,7 @@ void Mem::Write(Registers ®s, u32 paddr, u32 val) { mmio.Write(paddr, val); break; case PIF_RAM_REGION: - Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, htobe32(val)); + Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, bswap(val)); si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03EFFFFF: @@ -455,7 +455,7 @@ void Mem::Write(Registers ®s, u32 paddr, u64 val) { case MMIO_REGION: Util::panic("MMIO Write!"); case PIF_RAM_REGION: - Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, htobe64(val)); + Util::WriteAccess(si.pif.ram, paddr - PIF_RAM_REGION_START, bswap(val)); si.pif.ProcessCommands(*this); break; case 0x00800000 ... 0x03EFFFFF: diff --git a/src/backend/core/mmio/PI.cpp b/src/backend/core/mmio/PI.cpp index eb16ea90..b3091002 100644 --- a/src/backend/core/mmio/PI.cpp +++ b/src/backend/core/mmio/PI.cpp @@ -253,7 +253,7 @@ auto PI::BusRead(u32 addr) -> u32 { if (index > mem.rom.cart.size() - 3) { // -3 because we're reading an entire word switch (addr) { case REGION_CART_ISVIEWER_BUFFER: - return htobe32(Util::ReadAccess(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER)); + return bswap(Util::ReadAccess(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER)); case CART_ISVIEWER_FLUSH: Util::panic("Read from ISViewer flush!"); default: @@ -306,7 +306,7 @@ void PI::BusWrite(u32 addr, u32 val) { case REGION_PI_ROM: switch (addr) { case REGION_CART_ISVIEWER_BUFFER: - Util::WriteAccess(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER, be32toh(val)); + Util::WriteAccess(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER, bswap(val)); break; case CART_ISVIEWER_FLUSH: {