/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2024 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ /* LLVM-commit: */ /* LLVM-tag: */ /* Do not edit. */ /* Capstone's LLVM TableGen Backends: */ /* https://github.com/capstone-engine/llvm-capstone */ #ifdef GET_SUBTARGETINFO_ENUM #undef GET_SUBTARGETINFO_ENUM enum { Mips_FeatureAbs2008 = 0, Mips_FeatureCRC = 1, Mips_FeatureCnMips = 2, Mips_FeatureCnMipsP = 3, Mips_FeatureDSP = 4, Mips_FeatureDSPR2 = 5, Mips_FeatureDSPR3 = 6, Mips_FeatureEVA = 7, Mips_FeatureFP64Bit = 8, Mips_FeatureFPXX = 9, Mips_FeatureGINV = 10, Mips_FeatureGP64Bit = 11, Mips_FeatureI7200 = 12, Mips_FeatureLongCalls = 13, Mips_FeatureMSA = 14, Mips_FeatureMT = 15, Mips_FeatureMicroMips = 16, Mips_FeatureMips1 = 17, Mips_FeatureMips2 = 18, Mips_FeatureMips3 = 19, Mips_FeatureMips3D = 20, Mips_FeatureMips3_32 = 21, Mips_FeatureMips3_32r2 = 22, Mips_FeatureMips4 = 23, Mips_FeatureMips4_32 = 24, Mips_FeatureMips4_32r2 = 25, Mips_FeatureMips5 = 26, Mips_FeatureMips5_32r2 = 27, Mips_FeatureMips16 = 28, Mips_FeatureMips32 = 29, Mips_FeatureMips32r2 = 30, Mips_FeatureMips32r3 = 31, Mips_FeatureMips32r5 = 32, Mips_FeatureMips32r6 = 33, Mips_FeatureMips64 = 34, Mips_FeatureMips64r2 = 35, Mips_FeatureMips64r3 = 36, Mips_FeatureMips64r5 = 37, Mips_FeatureMips64r6 = 38, Mips_FeatureNMS1 = 39, Mips_FeatureNaN2008 = 40, Mips_FeatureNanoMips = 41, Mips_FeatureNoABICalls = 42, Mips_FeatureNoMadd4 = 43, Mips_FeatureNoOddSPReg = 44, Mips_FeaturePCRel = 45, Mips_FeaturePTR64Bit = 46, Mips_FeatureRelax = 47, Mips_FeatureSingleFloat = 48, Mips_FeatureSoftFloat = 49, Mips_FeatureSym32 = 50, Mips_FeatureTLB = 51, Mips_FeatureUseAbsoluteJumpTables = 52, Mips_FeatureUseIndirectJumpsHazard = 53, Mips_FeatureUseTCCInDIV = 54, Mips_FeatureVFPU = 55, Mips_FeatureVirt = 56, Mips_FeatureXGOT = 57, Mips_FeatureXformHw110880 = 58, Mips_ImplP5600 = 59, Mips_NumSubtargetFeatures = 60 }; #endif // GET_SUBTARGETINFO_ENUM