/* Capstone Disassembly Engine, https://www.capstone-engine.org */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
/*    Rot127 <unisono@quyllur.org> 2022-2024 */
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */

/* LLVM-commit: <commit> */
/* LLVM-tag: <tag> */

/* Do not edit. */

/* Capstone's LLVM TableGen Backends: */
/* https://github.com/capstone-engine/llvm-capstone */

#ifdef GET_INSTRINFO_ENUM
#undef GET_INSTRINFO_ENUM

  enum {
    Xtensa_PHI	= 0,
    Xtensa_INLINEASM	= 1,
    Xtensa_INLINEASM_BR	= 2,
    Xtensa_CFI_INSTRUCTION	= 3,
    Xtensa_EH_LABEL	= 4,
    Xtensa_GC_LABEL	= 5,
    Xtensa_ANNOTATION_LABEL	= 6,
    Xtensa_KILL	= 7,
    Xtensa_EXTRACT_SUBREG	= 8,
    Xtensa_INSERT_SUBREG	= 9,
    Xtensa_IMPLICIT_DEF	= 10,
    Xtensa_SUBREG_TO_REG	= 11,
    Xtensa_COPY_TO_REGCLASS	= 12,
    Xtensa_DBG_VALUE	= 13,
    Xtensa_DBG_VALUE_LIST	= 14,
    Xtensa_DBG_INSTR_REF	= 15,
    Xtensa_DBG_PHI	= 16,
    Xtensa_DBG_LABEL	= 17,
    Xtensa_REG_SEQUENCE	= 18,
    Xtensa_COPY	= 19,
    Xtensa_BUNDLE	= 20,
    Xtensa_LIFETIME_START	= 21,
    Xtensa_LIFETIME_END	= 22,
    Xtensa_PSEUDO_PROBE	= 23,
    Xtensa_ARITH_FENCE	= 24,
    Xtensa_STACKMAP	= 25,
    Xtensa_FENTRY_CALL	= 26,
    Xtensa_PATCHPOINT	= 27,
    Xtensa_LOAD_STACK_GUARD	= 28,
    Xtensa_PREALLOCATED_SETUP	= 29,
    Xtensa_PREALLOCATED_ARG	= 30,
    Xtensa_STATEPOINT	= 31,
    Xtensa_LOCAL_ESCAPE	= 32,
    Xtensa_FAULTING_OP	= 33,
    Xtensa_PATCHABLE_OP	= 34,
    Xtensa_PATCHABLE_FUNCTION_ENTER	= 35,
    Xtensa_PATCHABLE_RET	= 36,
    Xtensa_PATCHABLE_FUNCTION_EXIT	= 37,
    Xtensa_PATCHABLE_TAIL_CALL	= 38,
    Xtensa_PATCHABLE_EVENT_CALL	= 39,
    Xtensa_PATCHABLE_TYPED_EVENT_CALL	= 40,
    Xtensa_ICALL_BRANCH_FUNNEL	= 41,
    Xtensa_MEMBARRIER	= 42,
    Xtensa_JUMP_TABLE_DEBUG_INFO	= 43,
    Xtensa_G_ASSERT_SEXT	= 44,
    Xtensa_G_ASSERT_ZEXT	= 45,
    Xtensa_G_ASSERT_ALIGN	= 46,
    Xtensa_G_ADD	= 47,
    Xtensa_G_SUB	= 48,
    Xtensa_G_MUL	= 49,
    Xtensa_G_SDIV	= 50,
    Xtensa_G_UDIV	= 51,
    Xtensa_G_SREM	= 52,
    Xtensa_G_UREM	= 53,
    Xtensa_G_SDIVREM	= 54,
    Xtensa_G_UDIVREM	= 55,
    Xtensa_G_AND	= 56,
    Xtensa_G_OR	= 57,
    Xtensa_G_XOR	= 58,
    Xtensa_G_IMPLICIT_DEF	= 59,
    Xtensa_G_PHI	= 60,
    Xtensa_G_FRAME_INDEX	= 61,
    Xtensa_G_GLOBAL_VALUE	= 62,
    Xtensa_G_CONSTANT_POOL	= 63,
    Xtensa_G_EXTRACT	= 64,
    Xtensa_G_UNMERGE_VALUES	= 65,
    Xtensa_G_INSERT	= 66,
    Xtensa_G_MERGE_VALUES	= 67,
    Xtensa_G_BUILD_VECTOR	= 68,
    Xtensa_G_BUILD_VECTOR_TRUNC	= 69,
    Xtensa_G_CONCAT_VECTORS	= 70,
    Xtensa_G_PTRTOINT	= 71,
    Xtensa_G_INTTOPTR	= 72,
    Xtensa_G_BITCAST	= 73,
    Xtensa_G_FREEZE	= 74,
    Xtensa_G_CONSTANT_FOLD_BARRIER	= 75,
    Xtensa_G_INTRINSIC_FPTRUNC_ROUND	= 76,
    Xtensa_G_INTRINSIC_TRUNC	= 77,
    Xtensa_G_INTRINSIC_ROUND	= 78,
    Xtensa_G_INTRINSIC_LRINT	= 79,
    Xtensa_G_INTRINSIC_ROUNDEVEN	= 80,
    Xtensa_G_READCYCLECOUNTER	= 81,
    Xtensa_G_LOAD	= 82,
    Xtensa_G_SEXTLOAD	= 83,
    Xtensa_G_ZEXTLOAD	= 84,
    Xtensa_G_INDEXED_LOAD	= 85,
    Xtensa_G_INDEXED_SEXTLOAD	= 86,
    Xtensa_G_INDEXED_ZEXTLOAD	= 87,
    Xtensa_G_STORE	= 88,
    Xtensa_G_INDEXED_STORE	= 89,
    Xtensa_G_ATOMIC_CMPXCHG_WITH_SUCCESS	= 90,
    Xtensa_G_ATOMIC_CMPXCHG	= 91,
    Xtensa_G_ATOMICRMW_XCHG	= 92,
    Xtensa_G_ATOMICRMW_ADD	= 93,
    Xtensa_G_ATOMICRMW_SUB	= 94,
    Xtensa_G_ATOMICRMW_AND	= 95,
    Xtensa_G_ATOMICRMW_NAND	= 96,
    Xtensa_G_ATOMICRMW_OR	= 97,
    Xtensa_G_ATOMICRMW_XOR	= 98,
    Xtensa_G_ATOMICRMW_MAX	= 99,
    Xtensa_G_ATOMICRMW_MIN	= 100,
    Xtensa_G_ATOMICRMW_UMAX	= 101,
    Xtensa_G_ATOMICRMW_UMIN	= 102,
    Xtensa_G_ATOMICRMW_FADD	= 103,
    Xtensa_G_ATOMICRMW_FSUB	= 104,
    Xtensa_G_ATOMICRMW_FMAX	= 105,
    Xtensa_G_ATOMICRMW_FMIN	= 106,
    Xtensa_G_ATOMICRMW_UINC_WRAP	= 107,
    Xtensa_G_ATOMICRMW_UDEC_WRAP	= 108,
    Xtensa_G_FENCE	= 109,
    Xtensa_G_PREFETCH	= 110,
    Xtensa_G_BRCOND	= 111,
    Xtensa_G_BRINDIRECT	= 112,
    Xtensa_G_INVOKE_REGION_START	= 113,
    Xtensa_G_INTRINSIC	= 114,
    Xtensa_G_INTRINSIC_W_SIDE_EFFECTS	= 115,
    Xtensa_G_INTRINSIC_CONVERGENT	= 116,
    Xtensa_G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS	= 117,
    Xtensa_G_ANYEXT	= 118,
    Xtensa_G_TRUNC	= 119,
    Xtensa_G_CONSTANT	= 120,
    Xtensa_G_FCONSTANT	= 121,
    Xtensa_G_VASTART	= 122,
    Xtensa_G_VAARG	= 123,
    Xtensa_G_SEXT	= 124,
    Xtensa_G_SEXT_INREG	= 125,
    Xtensa_G_ZEXT	= 126,
    Xtensa_G_SHL	= 127,
    Xtensa_G_LSHR	= 128,
    Xtensa_G_ASHR	= 129,
    Xtensa_G_FSHL	= 130,
    Xtensa_G_FSHR	= 131,
    Xtensa_G_ROTR	= 132,
    Xtensa_G_ROTL	= 133,
    Xtensa_G_ICMP	= 134,
    Xtensa_G_FCMP	= 135,
    Xtensa_G_SELECT	= 136,
    Xtensa_G_UADDO	= 137,
    Xtensa_G_UADDE	= 138,
    Xtensa_G_USUBO	= 139,
    Xtensa_G_USUBE	= 140,
    Xtensa_G_SADDO	= 141,
    Xtensa_G_SADDE	= 142,
    Xtensa_G_SSUBO	= 143,
    Xtensa_G_SSUBE	= 144,
    Xtensa_G_UMULO	= 145,
    Xtensa_G_SMULO	= 146,
    Xtensa_G_UMULH	= 147,
    Xtensa_G_SMULH	= 148,
    Xtensa_G_UADDSAT	= 149,
    Xtensa_G_SADDSAT	= 150,
    Xtensa_G_USUBSAT	= 151,
    Xtensa_G_SSUBSAT	= 152,
    Xtensa_G_USHLSAT	= 153,
    Xtensa_G_SSHLSAT	= 154,
    Xtensa_G_SMULFIX	= 155,
    Xtensa_G_UMULFIX	= 156,
    Xtensa_G_SMULFIXSAT	= 157,
    Xtensa_G_UMULFIXSAT	= 158,
    Xtensa_G_SDIVFIX	= 159,
    Xtensa_G_UDIVFIX	= 160,
    Xtensa_G_SDIVFIXSAT	= 161,
    Xtensa_G_UDIVFIXSAT	= 162,
    Xtensa_G_FADD	= 163,
    Xtensa_G_FSUB	= 164,
    Xtensa_G_FMUL	= 165,
    Xtensa_G_FMA	= 166,
    Xtensa_G_FMAD	= 167,
    Xtensa_G_FDIV	= 168,
    Xtensa_G_FREM	= 169,
    Xtensa_G_FPOW	= 170,
    Xtensa_G_FPOWI	= 171,
    Xtensa_G_FEXP	= 172,
    Xtensa_G_FEXP2	= 173,
    Xtensa_G_FEXP10	= 174,
    Xtensa_G_FLOG	= 175,
    Xtensa_G_FLOG2	= 176,
    Xtensa_G_FLOG10	= 177,
    Xtensa_G_FLDEXP	= 178,
    Xtensa_G_FFREXP	= 179,
    Xtensa_G_FNEG	= 180,
    Xtensa_G_FPEXT	= 181,
    Xtensa_G_FPTRUNC	= 182,
    Xtensa_G_FPTOSI	= 183,
    Xtensa_G_FPTOUI	= 184,
    Xtensa_G_SITOFP	= 185,
    Xtensa_G_UITOFP	= 186,
    Xtensa_G_FABS	= 187,
    Xtensa_G_FCOPYSIGN	= 188,
    Xtensa_G_IS_FPCLASS	= 189,
    Xtensa_G_FCANONICALIZE	= 190,
    Xtensa_G_FMINNUM	= 191,
    Xtensa_G_FMAXNUM	= 192,
    Xtensa_G_FMINNUM_IEEE	= 193,
    Xtensa_G_FMAXNUM_IEEE	= 194,
    Xtensa_G_FMINIMUM	= 195,
    Xtensa_G_FMAXIMUM	= 196,
    Xtensa_G_GET_FPENV	= 197,
    Xtensa_G_SET_FPENV	= 198,
    Xtensa_G_RESET_FPENV	= 199,
    Xtensa_G_GET_FPMODE	= 200,
    Xtensa_G_SET_FPMODE	= 201,
    Xtensa_G_RESET_FPMODE	= 202,
    Xtensa_G_PTR_ADD	= 203,
    Xtensa_G_PTRMASK	= 204,
    Xtensa_G_SMIN	= 205,
    Xtensa_G_SMAX	= 206,
    Xtensa_G_UMIN	= 207,
    Xtensa_G_UMAX	= 208,
    Xtensa_G_ABS	= 209,
    Xtensa_G_LROUND	= 210,
    Xtensa_G_LLROUND	= 211,
    Xtensa_G_BR	= 212,
    Xtensa_G_BRJT	= 213,
    Xtensa_G_INSERT_VECTOR_ELT	= 214,
    Xtensa_G_EXTRACT_VECTOR_ELT	= 215,
    Xtensa_G_SHUFFLE_VECTOR	= 216,
    Xtensa_G_CTTZ	= 217,
    Xtensa_G_CTTZ_ZERO_UNDEF	= 218,
    Xtensa_G_CTLZ	= 219,
    Xtensa_G_CTLZ_ZERO_UNDEF	= 220,
    Xtensa_G_CTPOP	= 221,
    Xtensa_G_BSWAP	= 222,
    Xtensa_G_BITREVERSE	= 223,
    Xtensa_G_FCEIL	= 224,
    Xtensa_G_FCOS	= 225,
    Xtensa_G_FSIN	= 226,
    Xtensa_G_FSQRT	= 227,
    Xtensa_G_FFLOOR	= 228,
    Xtensa_G_FRINT	= 229,
    Xtensa_G_FNEARBYINT	= 230,
    Xtensa_G_ADDRSPACE_CAST	= 231,
    Xtensa_G_BLOCK_ADDR	= 232,
    Xtensa_G_JUMP_TABLE	= 233,
    Xtensa_G_DYN_STACKALLOC	= 234,
    Xtensa_G_STACKSAVE	= 235,
    Xtensa_G_STACKRESTORE	= 236,
    Xtensa_G_STRICT_FADD	= 237,
    Xtensa_G_STRICT_FSUB	= 238,
    Xtensa_G_STRICT_FMUL	= 239,
    Xtensa_G_STRICT_FDIV	= 240,
    Xtensa_G_STRICT_FREM	= 241,
    Xtensa_G_STRICT_FMA	= 242,
    Xtensa_G_STRICT_FSQRT	= 243,
    Xtensa_G_STRICT_FLDEXP	= 244,
    Xtensa_G_READ_REGISTER	= 245,
    Xtensa_G_WRITE_REGISTER	= 246,
    Xtensa_G_MEMCPY	= 247,
    Xtensa_G_MEMCPY_INLINE	= 248,
    Xtensa_G_MEMMOVE	= 249,
    Xtensa_G_MEMSET	= 250,
    Xtensa_G_BZERO	= 251,
    Xtensa_G_VECREDUCE_SEQ_FADD	= 252,
    Xtensa_G_VECREDUCE_SEQ_FMUL	= 253,
    Xtensa_G_VECREDUCE_FADD	= 254,
    Xtensa_G_VECREDUCE_FMUL	= 255,
    Xtensa_G_VECREDUCE_FMAX	= 256,
    Xtensa_G_VECREDUCE_FMIN	= 257,
    Xtensa_G_VECREDUCE_FMAXIMUM	= 258,
    Xtensa_G_VECREDUCE_FMINIMUM	= 259,
    Xtensa_G_VECREDUCE_ADD	= 260,
    Xtensa_G_VECREDUCE_MUL	= 261,
    Xtensa_G_VECREDUCE_AND	= 262,
    Xtensa_G_VECREDUCE_OR	= 263,
    Xtensa_G_VECREDUCE_XOR	= 264,
    Xtensa_G_VECREDUCE_SMAX	= 265,
    Xtensa_G_VECREDUCE_SMIN	= 266,
    Xtensa_G_VECREDUCE_UMAX	= 267,
    Xtensa_G_VECREDUCE_UMIN	= 268,
    Xtensa_G_SBFX	= 269,
    Xtensa_G_UBFX	= 270,
    Xtensa_ADJCALLSTACKDOWN	= 271,
    Xtensa_ADJCALLSTACKUP	= 272,
    Xtensa_ATOMIC_CMP_SWAP_16_P	= 273,
    Xtensa_ATOMIC_CMP_SWAP_32_P	= 274,
    Xtensa_ATOMIC_CMP_SWAP_8_P	= 275,
    Xtensa_ATOMIC_LOAD_ADD_16_P	= 276,
    Xtensa_ATOMIC_LOAD_ADD_32_P	= 277,
    Xtensa_ATOMIC_LOAD_ADD_8_P	= 278,
    Xtensa_ATOMIC_LOAD_AND_16_P	= 279,
    Xtensa_ATOMIC_LOAD_AND_32_P	= 280,
    Xtensa_ATOMIC_LOAD_AND_8_P	= 281,
    Xtensa_ATOMIC_LOAD_MAX_16_P	= 282,
    Xtensa_ATOMIC_LOAD_MAX_32_P	= 283,
    Xtensa_ATOMIC_LOAD_MAX_8_P	= 284,
    Xtensa_ATOMIC_LOAD_MIN_16_P	= 285,
    Xtensa_ATOMIC_LOAD_MIN_32_P	= 286,
    Xtensa_ATOMIC_LOAD_MIN_8_P	= 287,
    Xtensa_ATOMIC_LOAD_NAND_16_P	= 288,
    Xtensa_ATOMIC_LOAD_NAND_32_P	= 289,
    Xtensa_ATOMIC_LOAD_NAND_8_P	= 290,
    Xtensa_ATOMIC_LOAD_OR_16_P	= 291,
    Xtensa_ATOMIC_LOAD_OR_32_P	= 292,
    Xtensa_ATOMIC_LOAD_OR_8_P	= 293,
    Xtensa_ATOMIC_LOAD_SUB_16_P	= 294,
    Xtensa_ATOMIC_LOAD_SUB_32_P	= 295,
    Xtensa_ATOMIC_LOAD_SUB_8_P	= 296,
    Xtensa_ATOMIC_LOAD_UMAX_16_P	= 297,
    Xtensa_ATOMIC_LOAD_UMAX_32_P	= 298,
    Xtensa_ATOMIC_LOAD_UMAX_8_P	= 299,
    Xtensa_ATOMIC_LOAD_UMIN_16_P	= 300,
    Xtensa_ATOMIC_LOAD_UMIN_32_P	= 301,
    Xtensa_ATOMIC_LOAD_UMIN_8_P	= 302,
    Xtensa_ATOMIC_LOAD_XOR_16_P	= 303,
    Xtensa_ATOMIC_LOAD_XOR_32_P	= 304,
    Xtensa_ATOMIC_LOAD_XOR_8_P	= 305,
    Xtensa_ATOMIC_SWAP_16_P	= 306,
    Xtensa_ATOMIC_SWAP_32_P	= 307,
    Xtensa_ATOMIC_SWAP_8_P	= 308,
    Xtensa_BRCC_FP	= 309,
    Xtensa_BR_JT	= 310,
    Xtensa_CONSTPOOL_ENTRY	= 311,
    Xtensa_EE_ANDQ_P	= 312,
    Xtensa_EE_BITREV_P	= 313,
    Xtensa_EE_CMUL_S16_LD_INCP_P	= 314,
    Xtensa_EE_CMUL_S16_P	= 315,
    Xtensa_EE_CMUL_S16_ST_INCP_P	= 316,
    Xtensa_EE_FFT_AMS_S16_LD_INCP_P	= 317,
    Xtensa_EE_FFT_AMS_S16_LD_INCP_UAUP_P	= 318,
    Xtensa_EE_FFT_AMS_S16_LD_R32_DECP_P	= 319,
    Xtensa_EE_FFT_AMS_S16_ST_INCP_P	= 320,
    Xtensa_EE_FFT_CMUL_S16_LD_XP_P	= 321,
    Xtensa_EE_FFT_CMUL_S16_ST_XP_P	= 322,
    Xtensa_EE_FFT_R2BF_S16_P	= 323,
    Xtensa_EE_FFT_R2BF_S16_ST_INCP_P	= 324,
    Xtensa_EE_FFT_VST_R32_DECP_P	= 325,
    Xtensa_EE_LDF_128_IP_P	= 326,
    Xtensa_EE_LDF_128_XP_P	= 327,
    Xtensa_EE_LDF_64_IP_P	= 328,
    Xtensa_EE_LDF_64_XP_P	= 329,
    Xtensa_EE_LDQA_S16_128_IP_P	= 330,
    Xtensa_EE_LDQA_S16_128_XP_P	= 331,
    Xtensa_EE_LDQA_S8_128_IP_P	= 332,
    Xtensa_EE_LDQA_S8_128_XP_P	= 333,
    Xtensa_EE_LDQA_U16_128_IP_P	= 334,
    Xtensa_EE_LDQA_U16_128_XP_P	= 335,
    Xtensa_EE_LDQA_U8_128_IP_P	= 336,
    Xtensa_EE_LDQA_U8_128_XP_P	= 337,
    Xtensa_EE_LDXQ_32_P	= 338,
    Xtensa_EE_LD_128_USAR_IP_P	= 339,
    Xtensa_EE_LD_128_USAR_XP_P	= 340,
    Xtensa_EE_LD_ACCX_IP_P	= 341,
    Xtensa_EE_LD_QACC_H_H_32_IP_P	= 342,
    Xtensa_EE_LD_QACC_H_L_128_IP_P	= 343,
    Xtensa_EE_LD_QACC_L_H_32_IP_P	= 344,
    Xtensa_EE_LD_QACC_L_L_128_IP_P	= 345,
    Xtensa_EE_LD_UA_STATE_IP_P	= 346,
    Xtensa_EE_MOVI_32_A_P	= 347,
    Xtensa_EE_MOVI_32_Q_P	= 348,
    Xtensa_EE_MOV_S16_QACC_P	= 349,
    Xtensa_EE_MOV_S8_QACC_P	= 350,
    Xtensa_EE_MOV_U16_QACC_P	= 351,
    Xtensa_EE_MOV_U8_QACC_P	= 352,
    Xtensa_EE_NOTQ_P	= 353,
    Xtensa_EE_ORQ_P	= 354,
    Xtensa_EE_SLCI_2Q_P	= 355,
    Xtensa_EE_SLCXXP_2Q_P	= 356,
    Xtensa_EE_SRCI_2Q_P	= 357,
    Xtensa_EE_SRCMB_S16_QACC_P	= 358,
    Xtensa_EE_SRCMB_S8_QACC_P	= 359,
    Xtensa_EE_SRCQ_128_ST_INCP_P	= 360,
    Xtensa_EE_SRCXXP_2Q_P	= 361,
    Xtensa_EE_SRC_Q_LD_IP_P	= 362,
    Xtensa_EE_SRC_Q_LD_XP_P	= 363,
    Xtensa_EE_SRC_Q_P	= 364,
    Xtensa_EE_SRC_Q_QUP_P	= 365,
    Xtensa_EE_SRS_ACCX_P	= 366,
    Xtensa_EE_STF_128_IP_P	= 367,
    Xtensa_EE_STF_128_XP_P	= 368,
    Xtensa_EE_STF_64_IP_P	= 369,
    Xtensa_EE_STF_64_XP_P	= 370,
    Xtensa_EE_STXQ_32_P	= 371,
    Xtensa_EE_ST_ACCX_IP_P	= 372,
    Xtensa_EE_ST_QACC_H_H_32_IP_P	= 373,
    Xtensa_EE_ST_QACC_H_L_128_IP_P	= 374,
    Xtensa_EE_ST_QACC_L_H_32_IP_P	= 375,
    Xtensa_EE_ST_QACC_L_L_128_IP_P	= 376,
    Xtensa_EE_ST_UA_STATE_IP_P	= 377,
    Xtensa_EE_VADDS_S16_LD_INCP_P	= 378,
    Xtensa_EE_VADDS_S16_P	= 379,
    Xtensa_EE_VADDS_S16_ST_INCP_P	= 380,
    Xtensa_EE_VADDS_S32_LD_INCP_P	= 381,
    Xtensa_EE_VADDS_S32_P	= 382,
    Xtensa_EE_VADDS_S32_ST_INCP_P	= 383,
    Xtensa_EE_VADDS_S8_LD_INCP_P	= 384,
    Xtensa_EE_VADDS_S8_P	= 385,
    Xtensa_EE_VADDS_S8_ST_INCP_P	= 386,
    Xtensa_EE_VCMP_EQ_S16_P	= 387,
    Xtensa_EE_VCMP_EQ_S32_P	= 388,
    Xtensa_EE_VCMP_EQ_S8_P	= 389,
    Xtensa_EE_VCMP_GT_S16_P	= 390,
    Xtensa_EE_VCMP_GT_S32_P	= 391,
    Xtensa_EE_VCMP_GT_S8_P	= 392,
    Xtensa_EE_VCMP_LT_S16_P	= 393,
    Xtensa_EE_VCMP_LT_S32_P	= 394,
    Xtensa_EE_VCMP_LT_S8_P	= 395,
    Xtensa_EE_VLDBC_16_IP_P	= 396,
    Xtensa_EE_VLDBC_16_P	= 397,
    Xtensa_EE_VLDBC_16_XP_P	= 398,
    Xtensa_EE_VLDBC_32_IP_P	= 399,
    Xtensa_EE_VLDBC_32_P	= 400,
    Xtensa_EE_VLDBC_32_XP_P	= 401,
    Xtensa_EE_VLDBC_8_IP_P	= 402,
    Xtensa_EE_VLDBC_8_P	= 403,
    Xtensa_EE_VLDBC_8_XP_P	= 404,
    Xtensa_EE_VLDHBC_16_INCP_P	= 405,
    Xtensa_EE_VLD_128_IP_P	= 406,
    Xtensa_EE_VLD_128_XP_P	= 407,
    Xtensa_EE_VLD_H_64_IP_P	= 408,
    Xtensa_EE_VLD_H_64_XP_P	= 409,
    Xtensa_EE_VLD_L_64_IP_P	= 410,
    Xtensa_EE_VLD_L_64_XP_P	= 411,
    Xtensa_EE_VMAX_S16_LD_INCP_P	= 412,
    Xtensa_EE_VMAX_S16_P	= 413,
    Xtensa_EE_VMAX_S16_ST_INCP_P	= 414,
    Xtensa_EE_VMAX_S32_LD_INCP_P	= 415,
    Xtensa_EE_VMAX_S32_P	= 416,
    Xtensa_EE_VMAX_S32_ST_INCP_P	= 417,
    Xtensa_EE_VMAX_S8_LD_INCP_P	= 418,
    Xtensa_EE_VMAX_S8_P	= 419,
    Xtensa_EE_VMAX_S8_ST_INCP_P	= 420,
    Xtensa_EE_VMIN_S16_LD_INCP_P	= 421,
    Xtensa_EE_VMIN_S16_P	= 422,
    Xtensa_EE_VMIN_S16_ST_INCP_P	= 423,
    Xtensa_EE_VMIN_S32_LD_INCP_P	= 424,
    Xtensa_EE_VMIN_S32_P	= 425,
    Xtensa_EE_VMIN_S32_ST_INCP_P	= 426,
    Xtensa_EE_VMIN_S8_LD_INCP_P	= 427,
    Xtensa_EE_VMIN_S8_P	= 428,
    Xtensa_EE_VMIN_S8_ST_INCP_P	= 429,
    Xtensa_EE_VMULAS_S16_ACCX_LD_IP_P	= 430,
    Xtensa_EE_VMULAS_S16_ACCX_LD_IP_QUP_P	= 431,
    Xtensa_EE_VMULAS_S16_ACCX_LD_XP_P	= 432,
    Xtensa_EE_VMULAS_S16_ACCX_LD_XP_QUP_P	= 433,
    Xtensa_EE_VMULAS_S16_ACCX_P	= 434,
    Xtensa_EE_VMULAS_S16_QACC_LDBC_INCP_P	= 435,
    Xtensa_EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P	= 436,
    Xtensa_EE_VMULAS_S16_QACC_LD_IP_P	= 437,
    Xtensa_EE_VMULAS_S16_QACC_LD_IP_QUP_P	= 438,
    Xtensa_EE_VMULAS_S16_QACC_LD_XP_P	= 439,
    Xtensa_EE_VMULAS_S16_QACC_LD_XP_QUP_P	= 440,
    Xtensa_EE_VMULAS_S16_QACC_P	= 441,
    Xtensa_EE_VMULAS_S8_ACCX_LD_IP_P	= 442,
    Xtensa_EE_VMULAS_S8_ACCX_LD_IP_QUP_P	= 443,
    Xtensa_EE_VMULAS_S8_ACCX_LD_XP_P	= 444,
    Xtensa_EE_VMULAS_S8_ACCX_LD_XP_QUP_P	= 445,
    Xtensa_EE_VMULAS_S8_ACCX_P	= 446,
    Xtensa_EE_VMULAS_S8_QACC_LDBC_INCP_P	= 447,
    Xtensa_EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P	= 448,
    Xtensa_EE_VMULAS_S8_QACC_LD_IP_P	= 449,
    Xtensa_EE_VMULAS_S8_QACC_LD_IP_QUP_P	= 450,
    Xtensa_EE_VMULAS_S8_QACC_LD_XP_P	= 451,
    Xtensa_EE_VMULAS_S8_QACC_LD_XP_QUP_P	= 452,
    Xtensa_EE_VMULAS_S8_QACC_P	= 453,
    Xtensa_EE_VMULAS_U16_ACCX_LD_IP_P	= 454,
    Xtensa_EE_VMULAS_U16_ACCX_LD_IP_QUP_P	= 455,
    Xtensa_EE_VMULAS_U16_ACCX_LD_XP_P	= 456,
    Xtensa_EE_VMULAS_U16_ACCX_LD_XP_QUP_P	= 457,
    Xtensa_EE_VMULAS_U16_ACCX_P	= 458,
    Xtensa_EE_VMULAS_U16_QACC_LDBC_INCP_P	= 459,
    Xtensa_EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P	= 460,
    Xtensa_EE_VMULAS_U16_QACC_LD_IP_P	= 461,
    Xtensa_EE_VMULAS_U16_QACC_LD_IP_QUP_P	= 462,
    Xtensa_EE_VMULAS_U16_QACC_LD_XP_P	= 463,
    Xtensa_EE_VMULAS_U16_QACC_LD_XP_QUP_P	= 464,
    Xtensa_EE_VMULAS_U16_QACC_P	= 465,
    Xtensa_EE_VMULAS_U8_ACCX_LD_IP_P	= 466,
    Xtensa_EE_VMULAS_U8_ACCX_LD_IP_QUP_P	= 467,
    Xtensa_EE_VMULAS_U8_ACCX_LD_XP_P	= 468,
    Xtensa_EE_VMULAS_U8_ACCX_LD_XP_QUP_P	= 469,
    Xtensa_EE_VMULAS_U8_ACCX_P	= 470,
    Xtensa_EE_VMULAS_U8_QACC_LDBC_INCP_P	= 471,
    Xtensa_EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P	= 472,
    Xtensa_EE_VMULAS_U8_QACC_LD_IP_P	= 473,
    Xtensa_EE_VMULAS_U8_QACC_LD_IP_QUP_P	= 474,
    Xtensa_EE_VMULAS_U8_QACC_LD_XP_P	= 475,
    Xtensa_EE_VMULAS_U8_QACC_LD_XP_QUP_P	= 476,
    Xtensa_EE_VMULAS_U8_QACC_P	= 477,
    Xtensa_EE_VMUL_S16_LD_INCP_P	= 478,
    Xtensa_EE_VMUL_S16_P	= 479,
    Xtensa_EE_VMUL_S16_ST_INCP_P	= 480,
    Xtensa_EE_VMUL_S8_LD_INCP_P	= 481,
    Xtensa_EE_VMUL_S8_P	= 482,
    Xtensa_EE_VMUL_S8_ST_INCP_P	= 483,
    Xtensa_EE_VMUL_U16_LD_INCP_P	= 484,
    Xtensa_EE_VMUL_U16_P	= 485,
    Xtensa_EE_VMUL_U16_ST_INCP_P	= 486,
    Xtensa_EE_VMUL_U8_LD_INCP_P	= 487,
    Xtensa_EE_VMUL_U8_P	= 488,
    Xtensa_EE_VMUL_U8_ST_INCP_P	= 489,
    Xtensa_EE_VPRELU_S16_P	= 490,
    Xtensa_EE_VPRELU_S8_P	= 491,
    Xtensa_EE_VRELU_S16_P	= 492,
    Xtensa_EE_VRELU_S8_P	= 493,
    Xtensa_EE_VSL_32_P	= 494,
    Xtensa_EE_VSMULAS_S16_QACC_LD_INCP_P	= 495,
    Xtensa_EE_VSMULAS_S16_QACC_P	= 496,
    Xtensa_EE_VSMULAS_S8_QACC_LD_INCP_P	= 497,
    Xtensa_EE_VSMULAS_S8_QACC_P	= 498,
    Xtensa_EE_VSR_32_P	= 499,
    Xtensa_EE_VST_128_IP_P	= 500,
    Xtensa_EE_VST_128_XP_P	= 501,
    Xtensa_EE_VST_H_64_IP_P	= 502,
    Xtensa_EE_VST_H_64_XP_P	= 503,
    Xtensa_EE_VST_L_64_IP_P	= 504,
    Xtensa_EE_VST_L_64_XP_P	= 505,
    Xtensa_EE_VSUBS_S16_LD_INCP_P	= 506,
    Xtensa_EE_VSUBS_S16_P	= 507,
    Xtensa_EE_VSUBS_S16_ST_INCP_P	= 508,
    Xtensa_EE_VSUBS_S32_LD_INCP_P	= 509,
    Xtensa_EE_VSUBS_S32_P	= 510,
    Xtensa_EE_VSUBS_S32_ST_INCP_P	= 511,
    Xtensa_EE_VSUBS_S8_LD_INCP_P	= 512,
    Xtensa_EE_VSUBS_S8_P	= 513,
    Xtensa_EE_VSUBS_S8_ST_INCP_P	= 514,
    Xtensa_EE_VUNZIP_16_P	= 515,
    Xtensa_EE_VUNZIP_32_P	= 516,
    Xtensa_EE_VUNZIP_8_P	= 517,
    Xtensa_EE_VZIP_16_P	= 518,
    Xtensa_EE_VZIP_32_P	= 519,
    Xtensa_EE_VZIP_8_P	= 520,
    Xtensa_EE_XORQ_P	= 521,
    Xtensa_EE_ZERO_ACCX_P	= 522,
    Xtensa_EE_ZERO_QACC_P	= 523,
    Xtensa_EE_ZERO_Q_P	= 524,
    Xtensa_EXTUI_BR2_P	= 525,
    Xtensa_EXTUI_BR4_P	= 526,
    Xtensa_EXTUI_BR_P	= 527,
    Xtensa_L8I_P	= 528,
    Xtensa_LDDEC_P	= 529,
    Xtensa_LDINC_P	= 530,
    Xtensa_LOOPBR	= 531,
    Xtensa_LOOPDEC	= 532,
    Xtensa_LOOPEND	= 533,
    Xtensa_LOOPINIT	= 534,
    Xtensa_LOOPSTART	= 535,
    Xtensa_MOVBA2_P	= 536,
    Xtensa_MOVBA2_P2	= 537,
    Xtensa_MOVBA4_P	= 538,
    Xtensa_MOVBA4_P2	= 539,
    Xtensa_MOVBA_P	= 540,
    Xtensa_MOVBA_P2	= 541,
    Xtensa_MULA_DA_HH_LDDEC_P	= 542,
    Xtensa_MULA_DA_HH_LDINC_P	= 543,
    Xtensa_MULA_DA_HL_LDDEC_P	= 544,
    Xtensa_MULA_DA_HL_LDINC_P	= 545,
    Xtensa_MULA_DA_LH_LDDEC_P	= 546,
    Xtensa_MULA_DA_LH_LDINC_P	= 547,
    Xtensa_MULA_DA_LL_LDDEC_P	= 548,
    Xtensa_MULA_DA_LL_LDINC_P	= 549,
    Xtensa_MULA_DD_HH_LDDEC_P	= 550,
    Xtensa_MULA_DD_HH_LDINC_P	= 551,
    Xtensa_MULA_DD_HL_LDDEC_P	= 552,
    Xtensa_MULA_DD_HL_LDINC_P	= 553,
    Xtensa_MULA_DD_LH_LDDEC_P	= 554,
    Xtensa_MULA_DD_LH_LDINC_P	= 555,
    Xtensa_MULA_DD_LL_LDDEC_P	= 556,
    Xtensa_MULA_DD_LL_LDINC_P	= 557,
    Xtensa_RESTORE_BOOL	= 558,
    Xtensa_SELECT	= 559,
    Xtensa_SELECT_CC_FP_FP	= 560,
    Xtensa_SELECT_CC_FP_INT	= 561,
    Xtensa_SELECT_CC_INT_FP	= 562,
    Xtensa_SLLI_BR_P	= 563,
    Xtensa_SLL_P	= 564,
    Xtensa_SPILL_BOOL	= 565,
    Xtensa_SRA_P	= 566,
    Xtensa_SRL_P	= 567,
    Xtensa_WSR_ACCHI_P	= 568,
    Xtensa_WSR_ACCLO_P	= 569,
    Xtensa_WSR_M0_P	= 570,
    Xtensa_WSR_M1_P	= 571,
    Xtensa_WSR_M2_P	= 572,
    Xtensa_WSR_M3_P	= 573,
    Xtensa_XSR_ACCHI_P	= 574,
    Xtensa_XSR_ACCLO_P	= 575,
    Xtensa_XSR_M0_P	= 576,
    Xtensa_XSR_M1_P	= 577,
    Xtensa_XSR_M2_P	= 578,
    Xtensa_XSR_M3_P	= 579,
    Xtensa_mv_QR_P	= 580,
    Xtensa_ABS	= 581,
    Xtensa_ABS_S	= 582,
    Xtensa_ADD	= 583,
    Xtensa_ADDEXPM_S	= 584,
    Xtensa_ADDEXP_S	= 585,
    Xtensa_ADDI	= 586,
    Xtensa_ADDI_N	= 587,
    Xtensa_ADDMI	= 588,
    Xtensa_ADDX2	= 589,
    Xtensa_ADDX4	= 590,
    Xtensa_ADDX8	= 591,
    Xtensa_ADD_N	= 592,
    Xtensa_ADD_S	= 593,
    Xtensa_AE_ABS16S	= 594,
    Xtensa_AE_ABS24S	= 595,
    Xtensa_AE_ABS32	= 596,
    Xtensa_AE_ABS32S	= 597,
    Xtensa_AE_ABS64	= 598,
    Xtensa_AE_ABS64S	= 599,
    Xtensa_AE_ADD16	= 600,
    Xtensa_AE_ADD16S	= 601,
    Xtensa_AE_ADD24S	= 602,
    Xtensa_AE_ADD32	= 603,
    Xtensa_AE_ADD32S	= 604,
    Xtensa_AE_ADD32_HL_LH	= 605,
    Xtensa_AE_ADD64	= 606,
    Xtensa_AE_ADD64S	= 607,
    Xtensa_AE_ADDBRBA32	= 608,
    Xtensa_AE_ADDSUB32	= 609,
    Xtensa_AE_ADDSUB32S	= 610,
    Xtensa_AE_AND	= 611,
    Xtensa_AE_CVT32X2F16_10	= 612,
    Xtensa_AE_CVT32X2F16_32	= 613,
    Xtensa_AE_CVT48A32	= 614,
    Xtensa_AE_CVT64A32	= 615,
    Xtensa_AE_CVT64F32_H	= 616,
    Xtensa_AE_CVTA32F24S_H	= 617,
    Xtensa_AE_CVTA32F24S_L	= 618,
    Xtensa_AE_CVTQ56A32S	= 619,
    Xtensa_AE_CVTQ56P32S_H	= 620,
    Xtensa_AE_CVTQ56P32S_L	= 621,
    Xtensa_AE_DB	= 622,
    Xtensa_AE_DBI	= 623,
    Xtensa_AE_DBI_IC	= 624,
    Xtensa_AE_DBI_IP	= 625,
    Xtensa_AE_DB_IC	= 626,
    Xtensa_AE_DB_IP	= 627,
    Xtensa_AE_DIV64D32_H	= 628,
    Xtensa_AE_DIV64D32_L	= 629,
    Xtensa_AE_EQ16	= 630,
    Xtensa_AE_EQ32	= 631,
    Xtensa_AE_EQ64	= 632,
    Xtensa_AE_L16M_I	= 633,
    Xtensa_AE_L16M_IU	= 634,
    Xtensa_AE_L16M_X	= 635,
    Xtensa_AE_L16M_XC	= 636,
    Xtensa_AE_L16M_XU	= 637,
    Xtensa_AE_L16X2M_I	= 638,
    Xtensa_AE_L16X2M_IU	= 639,
    Xtensa_AE_L16X2M_X	= 640,
    Xtensa_AE_L16X2M_XC	= 641,
    Xtensa_AE_L16X2M_XU	= 642,
    Xtensa_AE_L16X4_I	= 643,
    Xtensa_AE_L16X4_IP	= 644,
    Xtensa_AE_L16X4_RIC	= 645,
    Xtensa_AE_L16X4_RIP	= 646,
    Xtensa_AE_L16X4_X	= 647,
    Xtensa_AE_L16X4_XC	= 648,
    Xtensa_AE_L16X4_XP	= 649,
    Xtensa_AE_L16_I	= 650,
    Xtensa_AE_L16_IP	= 651,
    Xtensa_AE_L16_X	= 652,
    Xtensa_AE_L16_XC	= 653,
    Xtensa_AE_L16_XP	= 654,
    Xtensa_AE_L32F24_I	= 655,
    Xtensa_AE_L32F24_IP	= 656,
    Xtensa_AE_L32F24_X	= 657,
    Xtensa_AE_L32F24_XC	= 658,
    Xtensa_AE_L32F24_XP	= 659,
    Xtensa_AE_L32M_I	= 660,
    Xtensa_AE_L32M_IU	= 661,
    Xtensa_AE_L32M_X	= 662,
    Xtensa_AE_L32M_XC	= 663,
    Xtensa_AE_L32M_XU	= 664,
    Xtensa_AE_L32X2F24_I	= 665,
    Xtensa_AE_L32X2F24_IP	= 666,
    Xtensa_AE_L32X2F24_RIC	= 667,
    Xtensa_AE_L32X2F24_RIP	= 668,
    Xtensa_AE_L32X2F24_X	= 669,
    Xtensa_AE_L32X2F24_XC	= 670,
    Xtensa_AE_L32X2F24_XP	= 671,
    Xtensa_AE_L32X2_I	= 672,
    Xtensa_AE_L32X2_IP	= 673,
    Xtensa_AE_L32X2_RIC	= 674,
    Xtensa_AE_L32X2_RIP	= 675,
    Xtensa_AE_L32X2_X	= 676,
    Xtensa_AE_L32X2_XC	= 677,
    Xtensa_AE_L32X2_XP	= 678,
    Xtensa_AE_L32_I	= 679,
    Xtensa_AE_L32_IP	= 680,
    Xtensa_AE_L32_X	= 681,
    Xtensa_AE_L32_XC	= 682,
    Xtensa_AE_L32_XP	= 683,
    Xtensa_AE_L64_I	= 684,
    Xtensa_AE_L64_IP	= 685,
    Xtensa_AE_L64_X	= 686,
    Xtensa_AE_L64_XC	= 687,
    Xtensa_AE_L64_XP	= 688,
    Xtensa_AE_LA16X4NEG_PC	= 689,
    Xtensa_AE_LA16X4POS_PC	= 690,
    Xtensa_AE_LA16X4_IC	= 691,
    Xtensa_AE_LA16X4_IP	= 692,
    Xtensa_AE_LA16X4_RIC	= 693,
    Xtensa_AE_LA16X4_RIP	= 694,
    Xtensa_AE_LA24NEG_PC	= 695,
    Xtensa_AE_LA24POS_PC	= 696,
    Xtensa_AE_LA24X2NEG_PC	= 697,
    Xtensa_AE_LA24X2POS_PC	= 698,
    Xtensa_AE_LA24X2_IC	= 699,
    Xtensa_AE_LA24X2_IP	= 700,
    Xtensa_AE_LA24X2_RIC	= 701,
    Xtensa_AE_LA24X2_RIP	= 702,
    Xtensa_AE_LA24_IC	= 703,
    Xtensa_AE_LA24_IP	= 704,
    Xtensa_AE_LA24_RIC	= 705,
    Xtensa_AE_LA24_RIP	= 706,
    Xtensa_AE_LA32X2F24_IC	= 707,
    Xtensa_AE_LA32X2F24_IP	= 708,
    Xtensa_AE_LA32X2F24_RIC	= 709,
    Xtensa_AE_LA32X2F24_RIP	= 710,
    Xtensa_AE_LA32X2NEG_PC	= 711,
    Xtensa_AE_LA32X2POS_PC	= 712,
    Xtensa_AE_LA32X2_IC	= 713,
    Xtensa_AE_LA32X2_IP	= 714,
    Xtensa_AE_LA32X2_RIC	= 715,
    Xtensa_AE_LA32X2_RIP	= 716,
    Xtensa_AE_LA64_PP	= 717,
    Xtensa_AE_LALIGN64_I	= 718,
    Xtensa_AE_LB	= 719,
    Xtensa_AE_LBI	= 720,
    Xtensa_AE_LBK	= 721,
    Xtensa_AE_LBKI	= 722,
    Xtensa_AE_LBS	= 723,
    Xtensa_AE_LBSI	= 724,
    Xtensa_AE_LE16	= 725,
    Xtensa_AE_LE32	= 726,
    Xtensa_AE_LE64	= 727,
    Xtensa_AE_LT16	= 728,
    Xtensa_AE_LT32	= 729,
    Xtensa_AE_LT64	= 730,
    Xtensa_AE_MAX32	= 731,
    Xtensa_AE_MAX64	= 732,
    Xtensa_AE_MAXABS32S	= 733,
    Xtensa_AE_MAXABS64S	= 734,
    Xtensa_AE_MIN32	= 735,
    Xtensa_AE_MIN64	= 736,
    Xtensa_AE_MINABS32S	= 737,
    Xtensa_AE_MINABS64S	= 738,
    Xtensa_AE_MOV	= 739,
    Xtensa_AE_MOVAD16_0	= 740,
    Xtensa_AE_MOVAD16_1	= 741,
    Xtensa_AE_MOVAD16_2	= 742,
    Xtensa_AE_MOVAD16_3	= 743,
    Xtensa_AE_MOVAD32_H	= 744,
    Xtensa_AE_MOVAD32_L	= 745,
    Xtensa_AE_MOVALIGN	= 746,
    Xtensa_AE_MOVDA16	= 747,
    Xtensa_AE_MOVDA16X2	= 748,
    Xtensa_AE_MOVDA32	= 749,
    Xtensa_AE_MOVDA32X2	= 750,
    Xtensa_AE_MOVF16X4	= 751,
    Xtensa_AE_MOVF32X2	= 752,
    Xtensa_AE_MOVF64	= 753,
    Xtensa_AE_MOVI	= 754,
    Xtensa_AE_MOVT16X4	= 755,
    Xtensa_AE_MOVT32X2	= 756,
    Xtensa_AE_MOVT64	= 757,
    Xtensa_AE_MUL16X4	= 758,
    Xtensa_AE_MUL32U_LL	= 759,
    Xtensa_AE_MUL32X16_H0	= 760,
    Xtensa_AE_MUL32X16_H0_S2	= 761,
    Xtensa_AE_MUL32X16_H1	= 762,
    Xtensa_AE_MUL32X16_H1_S2	= 763,
    Xtensa_AE_MUL32X16_H2	= 764,
    Xtensa_AE_MUL32X16_H2_S2	= 765,
    Xtensa_AE_MUL32X16_H3	= 766,
    Xtensa_AE_MUL32X16_H3_S2	= 767,
    Xtensa_AE_MUL32X16_L0	= 768,
    Xtensa_AE_MUL32X16_L0_S2	= 769,
    Xtensa_AE_MUL32X16_L1	= 770,
    Xtensa_AE_MUL32X16_L1_S2	= 771,
    Xtensa_AE_MUL32X16_L2	= 772,
    Xtensa_AE_MUL32X16_L2_S2	= 773,
    Xtensa_AE_MUL32X16_L3	= 774,
    Xtensa_AE_MUL32X16_L3_S2	= 775,
    Xtensa_AE_MUL32_HH	= 776,
    Xtensa_AE_MUL32_LH	= 777,
    Xtensa_AE_MUL32_LL	= 778,
    Xtensa_AE_MUL32_LL_S2	= 779,
    Xtensa_AE_MULA16X4	= 780,
    Xtensa_AE_MULA32U_LL	= 781,
    Xtensa_AE_MULA32X16_H0	= 782,
    Xtensa_AE_MULA32X16_H0_S2	= 783,
    Xtensa_AE_MULA32X16_H1	= 784,
    Xtensa_AE_MULA32X16_H1_S2	= 785,
    Xtensa_AE_MULA32X16_H2	= 786,
    Xtensa_AE_MULA32X16_H2_S2	= 787,
    Xtensa_AE_MULA32X16_H3	= 788,
    Xtensa_AE_MULA32X16_H3_S2	= 789,
    Xtensa_AE_MULA32X16_L0	= 790,
    Xtensa_AE_MULA32X16_L0_S2	= 791,
    Xtensa_AE_MULA32X16_L1	= 792,
    Xtensa_AE_MULA32X16_L1_S2	= 793,
    Xtensa_AE_MULA32X16_L2	= 794,
    Xtensa_AE_MULA32X16_L2_S2	= 795,
    Xtensa_AE_MULA32X16_L3	= 796,
    Xtensa_AE_MULA32X16_L3_S2	= 797,
    Xtensa_AE_MULA32_HH	= 798,
    Xtensa_AE_MULA32_LH	= 799,
    Xtensa_AE_MULA32_LL	= 800,
    Xtensa_AE_MULA32_LL_S2	= 801,
    Xtensa_AE_MULAAD24_HH_LL	= 802,
    Xtensa_AE_MULAAD24_HH_LL_S2	= 803,
    Xtensa_AE_MULAAD24_HL_LH	= 804,
    Xtensa_AE_MULAAD24_HL_LH_S2	= 805,
    Xtensa_AE_MULAAD32X16_H0_L1	= 806,
    Xtensa_AE_MULAAD32X16_H0_L1_S2	= 807,
    Xtensa_AE_MULAAD32X16_H1_L0	= 808,
    Xtensa_AE_MULAAD32X16_H1_L0_S2	= 809,
    Xtensa_AE_MULAAD32X16_H2_L3	= 810,
    Xtensa_AE_MULAAD32X16_H2_L3_S2	= 811,
    Xtensa_AE_MULAAD32X16_H3_L2	= 812,
    Xtensa_AE_MULAAD32X16_H3_L2_S2	= 813,
    Xtensa_AE_MULAAFD16SS_11_00	= 814,
    Xtensa_AE_MULAAFD16SS_11_00_S2	= 815,
    Xtensa_AE_MULAAFD16SS_13_02	= 816,
    Xtensa_AE_MULAAFD16SS_13_02_S2	= 817,
    Xtensa_AE_MULAAFD16SS_33_22	= 818,
    Xtensa_AE_MULAAFD16SS_33_22_S2	= 819,
    Xtensa_AE_MULAAFD24_HH_LL	= 820,
    Xtensa_AE_MULAAFD24_HH_LL_S2	= 821,
    Xtensa_AE_MULAAFD24_HL_LH	= 822,
    Xtensa_AE_MULAAFD24_HL_LH_S2	= 823,
    Xtensa_AE_MULAAFD32X16_H0_L1	= 824,
    Xtensa_AE_MULAAFD32X16_H0_L1_S2	= 825,
    Xtensa_AE_MULAAFD32X16_H1_L0	= 826,
    Xtensa_AE_MULAAFD32X16_H1_L0_S2	= 827,
    Xtensa_AE_MULAAFD32X16_H2_L3	= 828,
    Xtensa_AE_MULAAFD32X16_H2_L3_S2	= 829,
    Xtensa_AE_MULAAFD32X16_H3_L2	= 830,
    Xtensa_AE_MULAAFD32X16_H3_L2_S2	= 831,
    Xtensa_AE_MULAC24	= 832,
    Xtensa_AE_MULAC32X16_H	= 833,
    Xtensa_AE_MULAC32X16_L	= 834,
    Xtensa_AE_MULAF16SS_00	= 835,
    Xtensa_AE_MULAF16SS_00_S2	= 836,
    Xtensa_AE_MULAF16SS_10	= 837,
    Xtensa_AE_MULAF16SS_11	= 838,
    Xtensa_AE_MULAF16SS_20	= 839,
    Xtensa_AE_MULAF16SS_21	= 840,
    Xtensa_AE_MULAF16SS_22	= 841,
    Xtensa_AE_MULAF16SS_30	= 842,
    Xtensa_AE_MULAF16SS_31	= 843,
    Xtensa_AE_MULAF16SS_32	= 844,
    Xtensa_AE_MULAF16SS_33	= 845,
    Xtensa_AE_MULAF16X4SS	= 846,
    Xtensa_AE_MULAF32R_HH	= 847,
    Xtensa_AE_MULAF32R_LH	= 848,
    Xtensa_AE_MULAF32R_LL	= 849,
    Xtensa_AE_MULAF32R_LL_S2	= 850,
    Xtensa_AE_MULAF32S_HH	= 851,
    Xtensa_AE_MULAF32S_LH	= 852,
    Xtensa_AE_MULAF32S_LL	= 853,
    Xtensa_AE_MULAF32S_LL_S2	= 854,
    Xtensa_AE_MULAF32X16_H0	= 855,
    Xtensa_AE_MULAF32X16_H0_S2	= 856,
    Xtensa_AE_MULAF32X16_H1	= 857,
    Xtensa_AE_MULAF32X16_H1_S2	= 858,
    Xtensa_AE_MULAF32X16_H2	= 859,
    Xtensa_AE_MULAF32X16_H2_S2	= 860,
    Xtensa_AE_MULAF32X16_H3	= 861,
    Xtensa_AE_MULAF32X16_H3_S2	= 862,
    Xtensa_AE_MULAF32X16_L0	= 863,
    Xtensa_AE_MULAF32X16_L0_S2	= 864,
    Xtensa_AE_MULAF32X16_L1	= 865,
    Xtensa_AE_MULAF32X16_L1_S2	= 866,
    Xtensa_AE_MULAF32X16_L2	= 867,
    Xtensa_AE_MULAF32X16_L2_S2	= 868,
    Xtensa_AE_MULAF32X16_L3	= 869,
    Xtensa_AE_MULAF32X16_L3_S2	= 870,
    Xtensa_AE_MULAF48Q32SP16S_L	= 871,
    Xtensa_AE_MULAF48Q32SP16S_L_S2	= 872,
    Xtensa_AE_MULAF48Q32SP16U_L	= 873,
    Xtensa_AE_MULAF48Q32SP16U_L_S2	= 874,
    Xtensa_AE_MULAFC24RA	= 875,
    Xtensa_AE_MULAFC32X16RAS_H	= 876,
    Xtensa_AE_MULAFC32X16RAS_L	= 877,
    Xtensa_AE_MULAFD24X2_FIR_H	= 878,
    Xtensa_AE_MULAFD24X2_FIR_L	= 879,
    Xtensa_AE_MULAFD32X16X2_FIR_HH	= 880,
    Xtensa_AE_MULAFD32X16X2_FIR_HL	= 881,
    Xtensa_AE_MULAFD32X16X2_FIR_LH	= 882,
    Xtensa_AE_MULAFD32X16X2_FIR_LL	= 883,
    Xtensa_AE_MULAFP24X2R	= 884,
    Xtensa_AE_MULAFP24X2RA	= 885,
    Xtensa_AE_MULAFP24X2RA_S2	= 886,
    Xtensa_AE_MULAFP24X2R_S2	= 887,
    Xtensa_AE_MULAFP32X16X2RAS_H	= 888,
    Xtensa_AE_MULAFP32X16X2RAS_H_S2	= 889,
    Xtensa_AE_MULAFP32X16X2RAS_L	= 890,
    Xtensa_AE_MULAFP32X16X2RAS_L_S2	= 891,
    Xtensa_AE_MULAFP32X16X2RS_H	= 892,
    Xtensa_AE_MULAFP32X16X2RS_H_S2	= 893,
    Xtensa_AE_MULAFP32X16X2RS_L	= 894,
    Xtensa_AE_MULAFP32X16X2RS_L_S2	= 895,
    Xtensa_AE_MULAFP32X2RAS	= 896,
    Xtensa_AE_MULAFP32X2RS	= 897,
    Xtensa_AE_MULAFQ32SP24S_H_S2	= 898,
    Xtensa_AE_MULAFQ32SP24S_L_S2	= 899,
    Xtensa_AE_MULAP24X2	= 900,
    Xtensa_AE_MULAP24X2_S2	= 901,
    Xtensa_AE_MULAP32X16X2_H	= 902,
    Xtensa_AE_MULAP32X16X2_L	= 903,
    Xtensa_AE_MULAP32X2	= 904,
    Xtensa_AE_MULAQ32SP16S_L_S2	= 905,
    Xtensa_AE_MULAQ32SP16U_L_S2	= 906,
    Xtensa_AE_MULARFQ32SP24S_H_S2	= 907,
    Xtensa_AE_MULARFQ32SP24S_L_S2	= 908,
    Xtensa_AE_MULAS32F48P16S_HH	= 909,
    Xtensa_AE_MULAS32F48P16S_HH_S2	= 910,
    Xtensa_AE_MULAS32F48P16S_LH	= 911,
    Xtensa_AE_MULAS32F48P16S_LH_S2	= 912,
    Xtensa_AE_MULAS32F48P16S_LL	= 913,
    Xtensa_AE_MULAS32F48P16S_LL_S2	= 914,
    Xtensa_AE_MULASD24_HH_LL	= 915,
    Xtensa_AE_MULASD24_HH_LL_S2	= 916,
    Xtensa_AE_MULASD24_HL_LH	= 917,
    Xtensa_AE_MULASD24_HL_LH_S2	= 918,
    Xtensa_AE_MULASD32X16_H1_L0	= 919,
    Xtensa_AE_MULASD32X16_H1_L0_S2	= 920,
    Xtensa_AE_MULASD32X16_H3_L2	= 921,
    Xtensa_AE_MULASD32X16_H3_L2_S2	= 922,
    Xtensa_AE_MULASFD24_HH_LL	= 923,
    Xtensa_AE_MULASFD24_HH_LL_S2	= 924,
    Xtensa_AE_MULASFD24_HL_LH	= 925,
    Xtensa_AE_MULASFD24_HL_LH_S2	= 926,
    Xtensa_AE_MULASFD32X16_H1_L0	= 927,
    Xtensa_AE_MULASFD32X16_H1_L0_S2	= 928,
    Xtensa_AE_MULASFD32X16_H3_L2	= 929,
    Xtensa_AE_MULASFD32X16_H3_L2_S2	= 930,
    Xtensa_AE_MULC24	= 931,
    Xtensa_AE_MULC32X16_H	= 932,
    Xtensa_AE_MULC32X16_L	= 933,
    Xtensa_AE_MULF16SS_00	= 934,
    Xtensa_AE_MULF16SS_00_S2	= 935,
    Xtensa_AE_MULF16SS_10	= 936,
    Xtensa_AE_MULF16SS_11	= 937,
    Xtensa_AE_MULF16SS_20	= 938,
    Xtensa_AE_MULF16SS_21	= 939,
    Xtensa_AE_MULF16SS_22	= 940,
    Xtensa_AE_MULF16SS_30	= 941,
    Xtensa_AE_MULF16SS_31	= 942,
    Xtensa_AE_MULF16SS_32	= 943,
    Xtensa_AE_MULF16SS_33	= 944,
    Xtensa_AE_MULF16X4SS	= 945,
    Xtensa_AE_MULF32R_HH	= 946,
    Xtensa_AE_MULF32R_LH	= 947,
    Xtensa_AE_MULF32R_LL	= 948,
    Xtensa_AE_MULF32R_LL_S2	= 949,
    Xtensa_AE_MULF32S_HH	= 950,
    Xtensa_AE_MULF32S_LH	= 951,
    Xtensa_AE_MULF32S_LL	= 952,
    Xtensa_AE_MULF32S_LL_S2	= 953,
    Xtensa_AE_MULF32X16_H0	= 954,
    Xtensa_AE_MULF32X16_H0_S2	= 955,
    Xtensa_AE_MULF32X16_H1	= 956,
    Xtensa_AE_MULF32X16_H1_S2	= 957,
    Xtensa_AE_MULF32X16_H2	= 958,
    Xtensa_AE_MULF32X16_H2_S2	= 959,
    Xtensa_AE_MULF32X16_H3	= 960,
    Xtensa_AE_MULF32X16_H3_S2	= 961,
    Xtensa_AE_MULF32X16_L0	= 962,
    Xtensa_AE_MULF32X16_L0_S2	= 963,
    Xtensa_AE_MULF32X16_L1	= 964,
    Xtensa_AE_MULF32X16_L1_S2	= 965,
    Xtensa_AE_MULF32X16_L2	= 966,
    Xtensa_AE_MULF32X16_L2_S2	= 967,
    Xtensa_AE_MULF32X16_L3	= 968,
    Xtensa_AE_MULF32X16_L3_S2	= 969,
    Xtensa_AE_MULF48Q32SP16S_L	= 970,
    Xtensa_AE_MULF48Q32SP16S_L_S2	= 971,
    Xtensa_AE_MULF48Q32SP16U_L	= 972,
    Xtensa_AE_MULF48Q32SP16U_L_S2	= 973,
    Xtensa_AE_MULFC24RA	= 974,
    Xtensa_AE_MULFC32X16RAS_H	= 975,
    Xtensa_AE_MULFC32X16RAS_L	= 976,
    Xtensa_AE_MULFD24X2_FIR_H	= 977,
    Xtensa_AE_MULFD24X2_FIR_L	= 978,
    Xtensa_AE_MULFD32X16X2_FIR_HH	= 979,
    Xtensa_AE_MULFD32X16X2_FIR_HL	= 980,
    Xtensa_AE_MULFD32X16X2_FIR_LH	= 981,
    Xtensa_AE_MULFD32X16X2_FIR_LL	= 982,
    Xtensa_AE_MULFP16X4RAS	= 983,
    Xtensa_AE_MULFP16X4S	= 984,
    Xtensa_AE_MULFP24X2R	= 985,
    Xtensa_AE_MULFP24X2RA	= 986,
    Xtensa_AE_MULFP24X2RA_S2	= 987,
    Xtensa_AE_MULFP24X2R_S2	= 988,
    Xtensa_AE_MULFP32X16X2RAS_H	= 989,
    Xtensa_AE_MULFP32X16X2RAS_H_S2	= 990,
    Xtensa_AE_MULFP32X16X2RAS_L	= 991,
    Xtensa_AE_MULFP32X16X2RAS_L_S2	= 992,
    Xtensa_AE_MULFP32X16X2RS_H	= 993,
    Xtensa_AE_MULFP32X16X2RS_H_S2	= 994,
    Xtensa_AE_MULFP32X16X2RS_L	= 995,
    Xtensa_AE_MULFP32X16X2RS_L_S2	= 996,
    Xtensa_AE_MULFP32X2RAS	= 997,
    Xtensa_AE_MULFP32X2RS	= 998,
    Xtensa_AE_MULFQ32SP24S_H_S2	= 999,
    Xtensa_AE_MULFQ32SP24S_L_S2	= 1000,
    Xtensa_AE_MULP24X2	= 1001,
    Xtensa_AE_MULP24X2_S2	= 1002,
    Xtensa_AE_MULP32X16X2_H	= 1003,
    Xtensa_AE_MULP32X16X2_L	= 1004,
    Xtensa_AE_MULP32X2	= 1005,
    Xtensa_AE_MULQ32SP16S_L_S2	= 1006,
    Xtensa_AE_MULQ32SP16U_L_S2	= 1007,
    Xtensa_AE_MULRFQ32SP24S_H_S2	= 1008,
    Xtensa_AE_MULRFQ32SP24S_L_S2	= 1009,
    Xtensa_AE_MULS16X4	= 1010,
    Xtensa_AE_MULS32F48P16S_HH	= 1011,
    Xtensa_AE_MULS32F48P16S_HH_S2	= 1012,
    Xtensa_AE_MULS32F48P16S_LH	= 1013,
    Xtensa_AE_MULS32F48P16S_LH_S2	= 1014,
    Xtensa_AE_MULS32F48P16S_LL	= 1015,
    Xtensa_AE_MULS32F48P16S_LL_S2	= 1016,
    Xtensa_AE_MULS32U_LL	= 1017,
    Xtensa_AE_MULS32X16_H0	= 1018,
    Xtensa_AE_MULS32X16_H0_S2	= 1019,
    Xtensa_AE_MULS32X16_H1	= 1020,
    Xtensa_AE_MULS32X16_H1_S2	= 1021,
    Xtensa_AE_MULS32X16_H2	= 1022,
    Xtensa_AE_MULS32X16_H2_S2	= 1023,
    Xtensa_AE_MULS32X16_H3	= 1024,
    Xtensa_AE_MULS32X16_H3_S2	= 1025,
    Xtensa_AE_MULS32X16_L0	= 1026,
    Xtensa_AE_MULS32X16_L0_S2	= 1027,
    Xtensa_AE_MULS32X16_L1	= 1028,
    Xtensa_AE_MULS32X16_L1_S2	= 1029,
    Xtensa_AE_MULS32X16_L2	= 1030,
    Xtensa_AE_MULS32X16_L2_S2	= 1031,
    Xtensa_AE_MULS32X16_L3	= 1032,
    Xtensa_AE_MULS32X16_L3_S2	= 1033,
    Xtensa_AE_MULS32_HH	= 1034,
    Xtensa_AE_MULS32_LH	= 1035,
    Xtensa_AE_MULS32_LL	= 1036,
    Xtensa_AE_MULSAD24_HH_LL	= 1037,
    Xtensa_AE_MULSAD24_HH_LL_S2	= 1038,
    Xtensa_AE_MULSAD32X16_H1_L0	= 1039,
    Xtensa_AE_MULSAD32X16_H1_L0_S2	= 1040,
    Xtensa_AE_MULSAD32X16_H3_L2	= 1041,
    Xtensa_AE_MULSAD32X16_H3_L2_S2	= 1042,
    Xtensa_AE_MULSAFD24_HH_LL	= 1043,
    Xtensa_AE_MULSAFD24_HH_LL_S2	= 1044,
    Xtensa_AE_MULSAFD32X16_H1_L0	= 1045,
    Xtensa_AE_MULSAFD32X16_H1_L0_S2	= 1046,
    Xtensa_AE_MULSAFD32X16_H3_L2	= 1047,
    Xtensa_AE_MULSAFD32X16_H3_L2_S2	= 1048,
    Xtensa_AE_MULSF16SS_00	= 1049,
    Xtensa_AE_MULSF16SS_00_S2	= 1050,
    Xtensa_AE_MULSF16SS_10	= 1051,
    Xtensa_AE_MULSF16SS_11	= 1052,
    Xtensa_AE_MULSF16SS_20	= 1053,
    Xtensa_AE_MULSF16SS_21	= 1054,
    Xtensa_AE_MULSF16SS_22	= 1055,
    Xtensa_AE_MULSF16SS_30	= 1056,
    Xtensa_AE_MULSF16SS_31	= 1057,
    Xtensa_AE_MULSF16SS_32	= 1058,
    Xtensa_AE_MULSF16SS_33	= 1059,
    Xtensa_AE_MULSF16X4SS	= 1060,
    Xtensa_AE_MULSF32R_HH	= 1061,
    Xtensa_AE_MULSF32R_LH	= 1062,
    Xtensa_AE_MULSF32R_LL	= 1063,
    Xtensa_AE_MULSF32R_LL_S2	= 1064,
    Xtensa_AE_MULSF32S_HH	= 1065,
    Xtensa_AE_MULSF32S_LH	= 1066,
    Xtensa_AE_MULSF32S_LL	= 1067,
    Xtensa_AE_MULSF32X16_H0	= 1068,
    Xtensa_AE_MULSF32X16_H0_S2	= 1069,
    Xtensa_AE_MULSF32X16_H1	= 1070,
    Xtensa_AE_MULSF32X16_H1_S2	= 1071,
    Xtensa_AE_MULSF32X16_H2	= 1072,
    Xtensa_AE_MULSF32X16_H2_S2	= 1073,
    Xtensa_AE_MULSF32X16_H3	= 1074,
    Xtensa_AE_MULSF32X16_H3_S2	= 1075,
    Xtensa_AE_MULSF32X16_L0	= 1076,
    Xtensa_AE_MULSF32X16_L0_S2	= 1077,
    Xtensa_AE_MULSF32X16_L1	= 1078,
    Xtensa_AE_MULSF32X16_L1_S2	= 1079,
    Xtensa_AE_MULSF32X16_L2	= 1080,
    Xtensa_AE_MULSF32X16_L2_S2	= 1081,
    Xtensa_AE_MULSF32X16_L3	= 1082,
    Xtensa_AE_MULSF32X16_L3_S2	= 1083,
    Xtensa_AE_MULSF48Q32SP16S_L	= 1084,
    Xtensa_AE_MULSF48Q32SP16S_L_S2	= 1085,
    Xtensa_AE_MULSF48Q32SP16U_L	= 1086,
    Xtensa_AE_MULSF48Q32SP16U_L_S2	= 1087,
    Xtensa_AE_MULSFP24X2R	= 1088,
    Xtensa_AE_MULSFP24X2RA	= 1089,
    Xtensa_AE_MULSFP24X2RA_S2	= 1090,
    Xtensa_AE_MULSFP24X2R_S2	= 1091,
    Xtensa_AE_MULSFP32X16X2RAS_H	= 1092,
    Xtensa_AE_MULSFP32X16X2RAS_H_S2	= 1093,
    Xtensa_AE_MULSFP32X16X2RAS_L	= 1094,
    Xtensa_AE_MULSFP32X16X2RAS_L_S2	= 1095,
    Xtensa_AE_MULSFP32X16X2RS_H	= 1096,
    Xtensa_AE_MULSFP32X16X2RS_H_S2	= 1097,
    Xtensa_AE_MULSFP32X16X2RS_L	= 1098,
    Xtensa_AE_MULSFP32X16X2RS_L_S2	= 1099,
    Xtensa_AE_MULSFP32X2RAS	= 1100,
    Xtensa_AE_MULSFP32X2RS	= 1101,
    Xtensa_AE_MULSFQ32SP24S_H_S2	= 1102,
    Xtensa_AE_MULSFQ32SP24S_L_S2	= 1103,
    Xtensa_AE_MULSP24X2	= 1104,
    Xtensa_AE_MULSP24X2_S2	= 1105,
    Xtensa_AE_MULSP32X16X2_H	= 1106,
    Xtensa_AE_MULSP32X16X2_L	= 1107,
    Xtensa_AE_MULSP32X2	= 1108,
    Xtensa_AE_MULSQ32SP16S_L_S2	= 1109,
    Xtensa_AE_MULSQ32SP16U_L_S2	= 1110,
    Xtensa_AE_MULSRFQ32SP24S_H_S2	= 1111,
    Xtensa_AE_MULSRFQ32SP24S_L_S2	= 1112,
    Xtensa_AE_MULSS32F48P16S_HH	= 1113,
    Xtensa_AE_MULSS32F48P16S_HH_S2	= 1114,
    Xtensa_AE_MULSS32F48P16S_LH	= 1115,
    Xtensa_AE_MULSS32F48P16S_LH_S2	= 1116,
    Xtensa_AE_MULSS32F48P16S_LL	= 1117,
    Xtensa_AE_MULSS32F48P16S_LL_S2	= 1118,
    Xtensa_AE_MULSSD24_HH_LL	= 1119,
    Xtensa_AE_MULSSD24_HH_LL_S2	= 1120,
    Xtensa_AE_MULSSD24_HL_LH	= 1121,
    Xtensa_AE_MULSSD24_HL_LH_S2	= 1122,
    Xtensa_AE_MULSSD32X16_H1_L0	= 1123,
    Xtensa_AE_MULSSD32X16_H1_L0_S2	= 1124,
    Xtensa_AE_MULSSD32X16_H3_L2	= 1125,
    Xtensa_AE_MULSSD32X16_H3_L2_S2	= 1126,
    Xtensa_AE_MULSSFD16SS_11_00	= 1127,
    Xtensa_AE_MULSSFD16SS_11_00_S2	= 1128,
    Xtensa_AE_MULSSFD16SS_13_02	= 1129,
    Xtensa_AE_MULSSFD16SS_13_02_S2	= 1130,
    Xtensa_AE_MULSSFD16SS_33_22	= 1131,
    Xtensa_AE_MULSSFD16SS_33_22_S2	= 1132,
    Xtensa_AE_MULSSFD24_HH_LL	= 1133,
    Xtensa_AE_MULSSFD24_HH_LL_S2	= 1134,
    Xtensa_AE_MULSSFD24_HL_LH	= 1135,
    Xtensa_AE_MULSSFD24_HL_LH_S2	= 1136,
    Xtensa_AE_MULSSFD32X16_H1_L0	= 1137,
    Xtensa_AE_MULSSFD32X16_H1_L0_S2	= 1138,
    Xtensa_AE_MULSSFD32X16_H3_L2	= 1139,
    Xtensa_AE_MULSSFD32X16_H3_L2_S2	= 1140,
    Xtensa_AE_MULZAAD24_HH_LL	= 1141,
    Xtensa_AE_MULZAAD24_HH_LL_S2	= 1142,
    Xtensa_AE_MULZAAD24_HL_LH	= 1143,
    Xtensa_AE_MULZAAD24_HL_LH_S2	= 1144,
    Xtensa_AE_MULZAAD32X16_H0_L1	= 1145,
    Xtensa_AE_MULZAAD32X16_H0_L1_S2	= 1146,
    Xtensa_AE_MULZAAD32X16_H1_L0	= 1147,
    Xtensa_AE_MULZAAD32X16_H1_L0_S2	= 1148,
    Xtensa_AE_MULZAAD32X16_H2_L3	= 1149,
    Xtensa_AE_MULZAAD32X16_H2_L3_S2	= 1150,
    Xtensa_AE_MULZAAD32X16_H3_L2	= 1151,
    Xtensa_AE_MULZAAD32X16_H3_L2_S2	= 1152,
    Xtensa_AE_MULZAAFD16SS_11_00	= 1153,
    Xtensa_AE_MULZAAFD16SS_11_00_S2	= 1154,
    Xtensa_AE_MULZAAFD16SS_13_02	= 1155,
    Xtensa_AE_MULZAAFD16SS_13_02_S2	= 1156,
    Xtensa_AE_MULZAAFD16SS_33_22	= 1157,
    Xtensa_AE_MULZAAFD16SS_33_22_S2	= 1158,
    Xtensa_AE_MULZAAFD24_HH_LL	= 1159,
    Xtensa_AE_MULZAAFD24_HH_LL_S2	= 1160,
    Xtensa_AE_MULZAAFD24_HL_LH	= 1161,
    Xtensa_AE_MULZAAFD24_HL_LH_S2	= 1162,
    Xtensa_AE_MULZAAFD32X16_H0_L1	= 1163,
    Xtensa_AE_MULZAAFD32X16_H0_L1_S2	= 1164,
    Xtensa_AE_MULZAAFD32X16_H1_L0	= 1165,
    Xtensa_AE_MULZAAFD32X16_H1_L0_S2	= 1166,
    Xtensa_AE_MULZAAFD32X16_H2_L3	= 1167,
    Xtensa_AE_MULZAAFD32X16_H2_L3_S2	= 1168,
    Xtensa_AE_MULZAAFD32X16_H3_L2	= 1169,
    Xtensa_AE_MULZAAFD32X16_H3_L2_S2	= 1170,
    Xtensa_AE_MULZASD24_HH_LL	= 1171,
    Xtensa_AE_MULZASD24_HH_LL_S2	= 1172,
    Xtensa_AE_MULZASD24_HL_LH	= 1173,
    Xtensa_AE_MULZASD24_HL_LH_S2	= 1174,
    Xtensa_AE_MULZASD32X16_H1_L0	= 1175,
    Xtensa_AE_MULZASD32X16_H1_L0_S2	= 1176,
    Xtensa_AE_MULZASD32X16_H3_L2	= 1177,
    Xtensa_AE_MULZASD32X16_H3_L2_S2	= 1178,
    Xtensa_AE_MULZASFD24_HH_LL	= 1179,
    Xtensa_AE_MULZASFD24_HH_LL_S2	= 1180,
    Xtensa_AE_MULZASFD24_HL_LH	= 1181,
    Xtensa_AE_MULZASFD24_HL_LH_S2	= 1182,
    Xtensa_AE_MULZASFD32X16_H1_L0	= 1183,
    Xtensa_AE_MULZASFD32X16_H1_L0_S2	= 1184,
    Xtensa_AE_MULZASFD32X16_H3_L2	= 1185,
    Xtensa_AE_MULZASFD32X16_H3_L2_S2	= 1186,
    Xtensa_AE_MULZSAD24_HH_LL	= 1187,
    Xtensa_AE_MULZSAD24_HH_LL_S2	= 1188,
    Xtensa_AE_MULZSAD32X16_H1_L0	= 1189,
    Xtensa_AE_MULZSAD32X16_H1_L0_S2	= 1190,
    Xtensa_AE_MULZSAD32X16_H3_L2	= 1191,
    Xtensa_AE_MULZSAD32X16_H3_L2_S2	= 1192,
    Xtensa_AE_MULZSAFD24_HH_LL	= 1193,
    Xtensa_AE_MULZSAFD24_HH_LL_S2	= 1194,
    Xtensa_AE_MULZSAFD32X16_H1_L0	= 1195,
    Xtensa_AE_MULZSAFD32X16_H1_L0_S2	= 1196,
    Xtensa_AE_MULZSAFD32X16_H3_L2	= 1197,
    Xtensa_AE_MULZSAFD32X16_H3_L2_S2	= 1198,
    Xtensa_AE_MULZSSD24_HH_LL	= 1199,
    Xtensa_AE_MULZSSD24_HH_LL_S2	= 1200,
    Xtensa_AE_MULZSSD24_HL_LH	= 1201,
    Xtensa_AE_MULZSSD24_HL_LH_S2	= 1202,
    Xtensa_AE_MULZSSD32X16_H1_L0	= 1203,
    Xtensa_AE_MULZSSD32X16_H1_L0_S2	= 1204,
    Xtensa_AE_MULZSSD32X16_H3_L2	= 1205,
    Xtensa_AE_MULZSSD32X16_H3_L2_S2	= 1206,
    Xtensa_AE_MULZSSFD16SS_11_00	= 1207,
    Xtensa_AE_MULZSSFD16SS_11_00_S2	= 1208,
    Xtensa_AE_MULZSSFD16SS_13_02	= 1209,
    Xtensa_AE_MULZSSFD16SS_13_02_S2	= 1210,
    Xtensa_AE_MULZSSFD16SS_33_22	= 1211,
    Xtensa_AE_MULZSSFD16SS_33_22_S2	= 1212,
    Xtensa_AE_MULZSSFD24_HH_LL	= 1213,
    Xtensa_AE_MULZSSFD24_HH_LL_S2	= 1214,
    Xtensa_AE_MULZSSFD24_HL_LH	= 1215,
    Xtensa_AE_MULZSSFD24_HL_LH_S2	= 1216,
    Xtensa_AE_MULZSSFD32X16_H1_L0	= 1217,
    Xtensa_AE_MULZSSFD32X16_H1_L0_S2	= 1218,
    Xtensa_AE_MULZSSFD32X16_H3_L2	= 1219,
    Xtensa_AE_MULZSSFD32X16_H3_L2_S2	= 1220,
    Xtensa_AE_NAND	= 1221,
    Xtensa_AE_NEG16S	= 1222,
    Xtensa_AE_NEG24S	= 1223,
    Xtensa_AE_NEG32	= 1224,
    Xtensa_AE_NEG32S	= 1225,
    Xtensa_AE_NEG64	= 1226,
    Xtensa_AE_NEG64S	= 1227,
    Xtensa_AE_NSA64	= 1228,
    Xtensa_AE_NSAZ16_0	= 1229,
    Xtensa_AE_NSAZ32_L	= 1230,
    Xtensa_AE_OR	= 1231,
    Xtensa_AE_PKSR24	= 1232,
    Xtensa_AE_PKSR32	= 1233,
    Xtensa_AE_ROUND16X4F32SASYM	= 1234,
    Xtensa_AE_ROUND16X4F32SSYM	= 1235,
    Xtensa_AE_ROUND24X2F48SASYM	= 1236,
    Xtensa_AE_ROUND24X2F48SSYM	= 1237,
    Xtensa_AE_ROUND32X2F48SASYM	= 1238,
    Xtensa_AE_ROUND32X2F48SSYM	= 1239,
    Xtensa_AE_ROUND32X2F64SASYM	= 1240,
    Xtensa_AE_ROUND32X2F64SSYM	= 1241,
    Xtensa_AE_ROUNDSP16F24ASYM	= 1242,
    Xtensa_AE_ROUNDSP16F24SYM	= 1243,
    Xtensa_AE_ROUNDSP16Q48X2ASYM	= 1244,
    Xtensa_AE_ROUNDSP16Q48X2SYM	= 1245,
    Xtensa_AE_ROUNDSQ32F48ASYM	= 1246,
    Xtensa_AE_ROUNDSQ32F48SYM	= 1247,
    Xtensa_AE_S16M_L_I	= 1248,
    Xtensa_AE_S16M_L_IU	= 1249,
    Xtensa_AE_S16M_L_X	= 1250,
    Xtensa_AE_S16M_L_XC	= 1251,
    Xtensa_AE_S16M_L_XU	= 1252,
    Xtensa_AE_S16X2M_I	= 1253,
    Xtensa_AE_S16X2M_IU	= 1254,
    Xtensa_AE_S16X2M_X	= 1255,
    Xtensa_AE_S16X2M_XC	= 1256,
    Xtensa_AE_S16X2M_XU	= 1257,
    Xtensa_AE_S16X4_I	= 1258,
    Xtensa_AE_S16X4_IP	= 1259,
    Xtensa_AE_S16X4_RIC	= 1260,
    Xtensa_AE_S16X4_RIP	= 1261,
    Xtensa_AE_S16X4_X	= 1262,
    Xtensa_AE_S16X4_XC	= 1263,
    Xtensa_AE_S16X4_XP	= 1264,
    Xtensa_AE_S16_0_I	= 1265,
    Xtensa_AE_S16_0_IP	= 1266,
    Xtensa_AE_S16_0_X	= 1267,
    Xtensa_AE_S16_0_XC	= 1268,
    Xtensa_AE_S16_0_XP	= 1269,
    Xtensa_AE_S24RA64S_I	= 1270,
    Xtensa_AE_S24RA64S_IP	= 1271,
    Xtensa_AE_S24RA64S_X	= 1272,
    Xtensa_AE_S24RA64S_XC	= 1273,
    Xtensa_AE_S24RA64S_XP	= 1274,
    Xtensa_AE_S24X2RA64S_IP	= 1275,
    Xtensa_AE_S32F24_L_I	= 1276,
    Xtensa_AE_S32F24_L_IP	= 1277,
    Xtensa_AE_S32F24_L_X	= 1278,
    Xtensa_AE_S32F24_L_XC	= 1279,
    Xtensa_AE_S32F24_L_XP	= 1280,
    Xtensa_AE_S32M_I	= 1281,
    Xtensa_AE_S32M_IU	= 1282,
    Xtensa_AE_S32M_X	= 1283,
    Xtensa_AE_S32M_XC	= 1284,
    Xtensa_AE_S32M_XU	= 1285,
    Xtensa_AE_S32RA64S_I	= 1286,
    Xtensa_AE_S32RA64S_IP	= 1287,
    Xtensa_AE_S32RA64S_X	= 1288,
    Xtensa_AE_S32RA64S_XC	= 1289,
    Xtensa_AE_S32RA64S_XP	= 1290,
    Xtensa_AE_S32X2F24_I	= 1291,
    Xtensa_AE_S32X2F24_IP	= 1292,
    Xtensa_AE_S32X2F24_RIC	= 1293,
    Xtensa_AE_S32X2F24_RIP	= 1294,
    Xtensa_AE_S32X2F24_X	= 1295,
    Xtensa_AE_S32X2F24_XC	= 1296,
    Xtensa_AE_S32X2F24_XP	= 1297,
    Xtensa_AE_S32X2RA64S_IP	= 1298,
    Xtensa_AE_S32X2_I	= 1299,
    Xtensa_AE_S32X2_IP	= 1300,
    Xtensa_AE_S32X2_RIC	= 1301,
    Xtensa_AE_S32X2_RIP	= 1302,
    Xtensa_AE_S32X2_X	= 1303,
    Xtensa_AE_S32X2_XC	= 1304,
    Xtensa_AE_S32X2_XP	= 1305,
    Xtensa_AE_S32_L_I	= 1306,
    Xtensa_AE_S32_L_IP	= 1307,
    Xtensa_AE_S32_L_X	= 1308,
    Xtensa_AE_S32_L_XC	= 1309,
    Xtensa_AE_S32_L_XP	= 1310,
    Xtensa_AE_S64_I	= 1311,
    Xtensa_AE_S64_IP	= 1312,
    Xtensa_AE_S64_X	= 1313,
    Xtensa_AE_S64_XC	= 1314,
    Xtensa_AE_S64_XP	= 1315,
    Xtensa_AE_SA16X4_IC	= 1316,
    Xtensa_AE_SA16X4_IP	= 1317,
    Xtensa_AE_SA16X4_RIC	= 1318,
    Xtensa_AE_SA16X4_RIP	= 1319,
    Xtensa_AE_SA24X2_IC	= 1320,
    Xtensa_AE_SA24X2_IP	= 1321,
    Xtensa_AE_SA24X2_RIC	= 1322,
    Xtensa_AE_SA24X2_RIP	= 1323,
    Xtensa_AE_SA24_L_IC	= 1324,
    Xtensa_AE_SA24_L_IP	= 1325,
    Xtensa_AE_SA24_L_RIC	= 1326,
    Xtensa_AE_SA24_L_RIP	= 1327,
    Xtensa_AE_SA32X2F24_IC	= 1328,
    Xtensa_AE_SA32X2F24_IP	= 1329,
    Xtensa_AE_SA32X2F24_RIC	= 1330,
    Xtensa_AE_SA32X2F24_RIP	= 1331,
    Xtensa_AE_SA32X2_IC	= 1332,
    Xtensa_AE_SA32X2_IP	= 1333,
    Xtensa_AE_SA32X2_RIC	= 1334,
    Xtensa_AE_SA32X2_RIP	= 1335,
    Xtensa_AE_SA64NEG_FP	= 1336,
    Xtensa_AE_SA64POS_FP	= 1337,
    Xtensa_AE_SALIGN64_I	= 1338,
    Xtensa_AE_SAT16X4	= 1339,
    Xtensa_AE_SAT24S	= 1340,
    Xtensa_AE_SAT48S	= 1341,
    Xtensa_AE_SATQ56S	= 1342,
    Xtensa_AE_SB	= 1343,
    Xtensa_AE_SBF	= 1344,
    Xtensa_AE_SBF_IC	= 1345,
    Xtensa_AE_SBF_IP	= 1346,
    Xtensa_AE_SBI	= 1347,
    Xtensa_AE_SBI_IC	= 1348,
    Xtensa_AE_SBI_IP	= 1349,
    Xtensa_AE_SB_IC	= 1350,
    Xtensa_AE_SB_IP	= 1351,
    Xtensa_AE_SEL16I	= 1352,
    Xtensa_AE_SEL16I_N	= 1353,
    Xtensa_AE_SEXT32	= 1354,
    Xtensa_AE_SEXT32X2D16_10	= 1355,
    Xtensa_AE_SEXT32X2D16_32	= 1356,
    Xtensa_AE_SHA32	= 1357,
    Xtensa_AE_SHORTSWAP	= 1358,
    Xtensa_AE_SLAA16S	= 1359,
    Xtensa_AE_SLAA32	= 1360,
    Xtensa_AE_SLAA32S	= 1361,
    Xtensa_AE_SLAA64	= 1362,
    Xtensa_AE_SLAA64S	= 1363,
    Xtensa_AE_SLAAQ56	= 1364,
    Xtensa_AE_SLAI16S	= 1365,
    Xtensa_AE_SLAI24	= 1366,
    Xtensa_AE_SLAI24S	= 1367,
    Xtensa_AE_SLAI32	= 1368,
    Xtensa_AE_SLAI32S	= 1369,
    Xtensa_AE_SLAI64	= 1370,
    Xtensa_AE_SLAI64S	= 1371,
    Xtensa_AE_SLAISQ56S	= 1372,
    Xtensa_AE_SLAS24	= 1373,
    Xtensa_AE_SLAS24S	= 1374,
    Xtensa_AE_SLAS32	= 1375,
    Xtensa_AE_SLAS32S	= 1376,
    Xtensa_AE_SLAS64	= 1377,
    Xtensa_AE_SLAS64S	= 1378,
    Xtensa_AE_SLASQ56	= 1379,
    Xtensa_AE_SLASSQ56S	= 1380,
    Xtensa_AE_SRA64_32	= 1381,
    Xtensa_AE_SRAA16RS	= 1382,
    Xtensa_AE_SRAA16S	= 1383,
    Xtensa_AE_SRAA32	= 1384,
    Xtensa_AE_SRAA32RS	= 1385,
    Xtensa_AE_SRAA32S	= 1386,
    Xtensa_AE_SRAA64	= 1387,
    Xtensa_AE_SRAI16	= 1388,
    Xtensa_AE_SRAI16R	= 1389,
    Xtensa_AE_SRAI24	= 1390,
    Xtensa_AE_SRAI32	= 1391,
    Xtensa_AE_SRAI32R	= 1392,
    Xtensa_AE_SRAI64	= 1393,
    Xtensa_AE_SRAS24	= 1394,
    Xtensa_AE_SRAS32	= 1395,
    Xtensa_AE_SRAS64	= 1396,
    Xtensa_AE_SRLA32	= 1397,
    Xtensa_AE_SRLA64	= 1398,
    Xtensa_AE_SRLI24	= 1399,
    Xtensa_AE_SRLI32	= 1400,
    Xtensa_AE_SRLI64	= 1401,
    Xtensa_AE_SRLS24	= 1402,
    Xtensa_AE_SRLS32	= 1403,
    Xtensa_AE_SRLS64	= 1404,
    Xtensa_AE_SUB16	= 1405,
    Xtensa_AE_SUB16S	= 1406,
    Xtensa_AE_SUB24S	= 1407,
    Xtensa_AE_SUB32	= 1408,
    Xtensa_AE_SUB32S	= 1409,
    Xtensa_AE_SUB64	= 1410,
    Xtensa_AE_SUB64S	= 1411,
    Xtensa_AE_SUBADD32	= 1412,
    Xtensa_AE_SUBADD32S	= 1413,
    Xtensa_AE_TRUNCA32F64S_L	= 1414,
    Xtensa_AE_TRUNCA32X2F64S	= 1415,
    Xtensa_AE_TRUNCI32F64S_L	= 1416,
    Xtensa_AE_TRUNCI32X2F64S	= 1417,
    Xtensa_AE_VLDL16C	= 1418,
    Xtensa_AE_VLDL16C_IC	= 1419,
    Xtensa_AE_VLDL16C_IP	= 1420,
    Xtensa_AE_VLDL16T	= 1421,
    Xtensa_AE_VLDL32T	= 1422,
    Xtensa_AE_VLDSHT	= 1423,
    Xtensa_AE_VLEL16T	= 1424,
    Xtensa_AE_VLEL32T	= 1425,
    Xtensa_AE_VLES16C	= 1426,
    Xtensa_AE_VLES16C_IC	= 1427,
    Xtensa_AE_VLES16C_IP	= 1428,
    Xtensa_AE_XOR	= 1429,
    Xtensa_AE_ZALIGN64	= 1430,
    Xtensa_ALL4	= 1431,
    Xtensa_ALL8	= 1432,
    Xtensa_AND	= 1433,
    Xtensa_ANDB	= 1434,
    Xtensa_ANDBC	= 1435,
    Xtensa_ANY4	= 1436,
    Xtensa_ANY8	= 1437,
    Xtensa_BALL	= 1438,
    Xtensa_BANY	= 1439,
    Xtensa_BBC	= 1440,
    Xtensa_BBCI	= 1441,
    Xtensa_BBS	= 1442,
    Xtensa_BBSI	= 1443,
    Xtensa_BEQ	= 1444,
    Xtensa_BEQI	= 1445,
    Xtensa_BEQZ	= 1446,
    Xtensa_BF	= 1447,
    Xtensa_BGE	= 1448,
    Xtensa_BGEI	= 1449,
    Xtensa_BGEU	= 1450,
    Xtensa_BGEUI	= 1451,
    Xtensa_BGEZ	= 1452,
    Xtensa_BLT	= 1453,
    Xtensa_BLTI	= 1454,
    Xtensa_BLTU	= 1455,
    Xtensa_BLTUI	= 1456,
    Xtensa_BLTZ	= 1457,
    Xtensa_BNALL	= 1458,
    Xtensa_BNE	= 1459,
    Xtensa_BNEI	= 1460,
    Xtensa_BNEZ	= 1461,
    Xtensa_BNONE	= 1462,
    Xtensa_BREAK	= 1463,
    Xtensa_BREAK_N	= 1464,
    Xtensa_BT	= 1465,
    Xtensa_CALL0	= 1466,
    Xtensa_CALL12	= 1467,
    Xtensa_CALL4	= 1468,
    Xtensa_CALL8	= 1469,
    Xtensa_CALLX0	= 1470,
    Xtensa_CALLX12	= 1471,
    Xtensa_CALLX4	= 1472,
    Xtensa_CALLX8	= 1473,
    Xtensa_CEIL_S	= 1474,
    Xtensa_CLAMPS	= 1475,
    Xtensa_CLR_BIT_GPIO_OUT	= 1476,
    Xtensa_CONST_S	= 1477,
    Xtensa_DIV0_S	= 1478,
    Xtensa_DIVN_S	= 1479,
    Xtensa_DSYNC	= 1480,
    Xtensa_EE_ANDQ	= 1481,
    Xtensa_EE_BITREV	= 1482,
    Xtensa_EE_CLR_BIT_GPIO_OUT	= 1483,
    Xtensa_EE_CMUL_S16	= 1484,
    Xtensa_EE_CMUL_S16_LD_INCP	= 1485,
    Xtensa_EE_CMUL_S16_ST_INCP	= 1486,
    Xtensa_EE_FFT_AMS_S16_LD_INCP	= 1487,
    Xtensa_EE_FFT_AMS_S16_LD_INCP_UAUP	= 1488,
    Xtensa_EE_FFT_AMS_S16_LD_R32_DECP	= 1489,
    Xtensa_EE_FFT_AMS_S16_ST_INCP	= 1490,
    Xtensa_EE_FFT_CMUL_S16_LD_XP	= 1491,
    Xtensa_EE_FFT_CMUL_S16_ST_XP	= 1492,
    Xtensa_EE_FFT_R2BF_S16	= 1493,
    Xtensa_EE_FFT_R2BF_S16_ST_INCP	= 1494,
    Xtensa_EE_FFT_VST_R32_DECP	= 1495,
    Xtensa_EE_GET_GPIO_IN	= 1496,
    Xtensa_EE_LDF_128_IP	= 1497,
    Xtensa_EE_LDF_128_XP	= 1498,
    Xtensa_EE_LDF_64_IP	= 1499,
    Xtensa_EE_LDF_64_XP	= 1500,
    Xtensa_EE_LDQA_S16_128_IP	= 1501,
    Xtensa_EE_LDQA_S16_128_XP	= 1502,
    Xtensa_EE_LDQA_S8_128_IP	= 1503,
    Xtensa_EE_LDQA_S8_128_XP	= 1504,
    Xtensa_EE_LDQA_U16_128_IP	= 1505,
    Xtensa_EE_LDQA_U16_128_XP	= 1506,
    Xtensa_EE_LDQA_U8_128_IP	= 1507,
    Xtensa_EE_LDQA_U8_128_XP	= 1508,
    Xtensa_EE_LDXQ_32	= 1509,
    Xtensa_EE_LD_128_USAR_IP	= 1510,
    Xtensa_EE_LD_128_USAR_XP	= 1511,
    Xtensa_EE_LD_ACCX_IP	= 1512,
    Xtensa_EE_LD_QACC_H_H_32_IP	= 1513,
    Xtensa_EE_LD_QACC_H_L_128_IP	= 1514,
    Xtensa_EE_LD_QACC_L_H_32_IP	= 1515,
    Xtensa_EE_LD_QACC_L_L_128_IP	= 1516,
    Xtensa_EE_LD_UA_STATE_IP	= 1517,
    Xtensa_EE_MOVI_32_A	= 1518,
    Xtensa_EE_MOVI_32_Q	= 1519,
    Xtensa_EE_MOV_S16_QACC	= 1520,
    Xtensa_EE_MOV_S8_QACC	= 1521,
    Xtensa_EE_MOV_U16_QACC	= 1522,
    Xtensa_EE_MOV_U8_QACC	= 1523,
    Xtensa_EE_NOTQ	= 1524,
    Xtensa_EE_ORQ	= 1525,
    Xtensa_EE_SET_BIT_GPIO_OUT	= 1526,
    Xtensa_EE_SLCI_2Q	= 1527,
    Xtensa_EE_SLCXXP_2Q	= 1528,
    Xtensa_EE_SRCI_2Q	= 1529,
    Xtensa_EE_SRCMB_S16_QACC	= 1530,
    Xtensa_EE_SRCMB_S8_QACC	= 1531,
    Xtensa_EE_SRCQ_128_ST_INCP	= 1532,
    Xtensa_EE_SRCXXP_2Q	= 1533,
    Xtensa_EE_SRC_Q	= 1534,
    Xtensa_EE_SRC_Q_LD_IP	= 1535,
    Xtensa_EE_SRC_Q_LD_XP	= 1536,
    Xtensa_EE_SRC_Q_QUP	= 1537,
    Xtensa_EE_SRS_ACCX	= 1538,
    Xtensa_EE_STF_128_IP	= 1539,
    Xtensa_EE_STF_128_XP	= 1540,
    Xtensa_EE_STF_64_IP	= 1541,
    Xtensa_EE_STF_64_XP	= 1542,
    Xtensa_EE_STXQ_32	= 1543,
    Xtensa_EE_ST_ACCX_IP	= 1544,
    Xtensa_EE_ST_QACC_H_H_32_IP	= 1545,
    Xtensa_EE_ST_QACC_H_L_128_IP	= 1546,
    Xtensa_EE_ST_QACC_L_H_32_IP	= 1547,
    Xtensa_EE_ST_QACC_L_L_128_IP	= 1548,
    Xtensa_EE_ST_UA_STATE_IP	= 1549,
    Xtensa_EE_VADDS_S16	= 1550,
    Xtensa_EE_VADDS_S16_LD_INCP	= 1551,
    Xtensa_EE_VADDS_S16_ST_INCP	= 1552,
    Xtensa_EE_VADDS_S32	= 1553,
    Xtensa_EE_VADDS_S32_LD_INCP	= 1554,
    Xtensa_EE_VADDS_S32_ST_INCP	= 1555,
    Xtensa_EE_VADDS_S8	= 1556,
    Xtensa_EE_VADDS_S8_LD_INCP	= 1557,
    Xtensa_EE_VADDS_S8_ST_INCP	= 1558,
    Xtensa_EE_VCMP_EQ_S16	= 1559,
    Xtensa_EE_VCMP_EQ_S32	= 1560,
    Xtensa_EE_VCMP_EQ_S8	= 1561,
    Xtensa_EE_VCMP_GT_S16	= 1562,
    Xtensa_EE_VCMP_GT_S32	= 1563,
    Xtensa_EE_VCMP_GT_S8	= 1564,
    Xtensa_EE_VCMP_LT_S16	= 1565,
    Xtensa_EE_VCMP_LT_S32	= 1566,
    Xtensa_EE_VCMP_LT_S8	= 1567,
    Xtensa_EE_VLDBC_16	= 1568,
    Xtensa_EE_VLDBC_16_IP	= 1569,
    Xtensa_EE_VLDBC_16_XP	= 1570,
    Xtensa_EE_VLDBC_32	= 1571,
    Xtensa_EE_VLDBC_32_IP	= 1572,
    Xtensa_EE_VLDBC_32_XP	= 1573,
    Xtensa_EE_VLDBC_8	= 1574,
    Xtensa_EE_VLDBC_8_IP	= 1575,
    Xtensa_EE_VLDBC_8_XP	= 1576,
    Xtensa_EE_VLDHBC_16_INCP	= 1577,
    Xtensa_EE_VLD_128_IP	= 1578,
    Xtensa_EE_VLD_128_XP	= 1579,
    Xtensa_EE_VLD_H_64_IP	= 1580,
    Xtensa_EE_VLD_H_64_XP	= 1581,
    Xtensa_EE_VLD_L_64_IP	= 1582,
    Xtensa_EE_VLD_L_64_XP	= 1583,
    Xtensa_EE_VMAX_S16	= 1584,
    Xtensa_EE_VMAX_S16_LD_INCP	= 1585,
    Xtensa_EE_VMAX_S16_ST_INCP	= 1586,
    Xtensa_EE_VMAX_S32	= 1587,
    Xtensa_EE_VMAX_S32_LD_INCP	= 1588,
    Xtensa_EE_VMAX_S32_ST_INCP	= 1589,
    Xtensa_EE_VMAX_S8	= 1590,
    Xtensa_EE_VMAX_S8_LD_INCP	= 1591,
    Xtensa_EE_VMAX_S8_ST_INCP	= 1592,
    Xtensa_EE_VMIN_S16	= 1593,
    Xtensa_EE_VMIN_S16_LD_INCP	= 1594,
    Xtensa_EE_VMIN_S16_ST_INCP	= 1595,
    Xtensa_EE_VMIN_S32	= 1596,
    Xtensa_EE_VMIN_S32_LD_INCP	= 1597,
    Xtensa_EE_VMIN_S32_ST_INCP	= 1598,
    Xtensa_EE_VMIN_S8	= 1599,
    Xtensa_EE_VMIN_S8_LD_INCP	= 1600,
    Xtensa_EE_VMIN_S8_ST_INCP	= 1601,
    Xtensa_EE_VMULAS_S16_ACCX	= 1602,
    Xtensa_EE_VMULAS_S16_ACCX_LD_IP	= 1603,
    Xtensa_EE_VMULAS_S16_ACCX_LD_IP_QUP	= 1604,
    Xtensa_EE_VMULAS_S16_ACCX_LD_XP	= 1605,
    Xtensa_EE_VMULAS_S16_ACCX_LD_XP_QUP	= 1606,
    Xtensa_EE_VMULAS_S16_QACC	= 1607,
    Xtensa_EE_VMULAS_S16_QACC_LDBC_INCP	= 1608,
    Xtensa_EE_VMULAS_S16_QACC_LDBC_INCP_QUP	= 1609,
    Xtensa_EE_VMULAS_S16_QACC_LD_IP	= 1610,
    Xtensa_EE_VMULAS_S16_QACC_LD_IP_QUP	= 1611,
    Xtensa_EE_VMULAS_S16_QACC_LD_XP	= 1612,
    Xtensa_EE_VMULAS_S16_QACC_LD_XP_QUP	= 1613,
    Xtensa_EE_VMULAS_S8_ACCX	= 1614,
    Xtensa_EE_VMULAS_S8_ACCX_LD_IP	= 1615,
    Xtensa_EE_VMULAS_S8_ACCX_LD_IP_QUP	= 1616,
    Xtensa_EE_VMULAS_S8_ACCX_LD_XP	= 1617,
    Xtensa_EE_VMULAS_S8_ACCX_LD_XP_QUP	= 1618,
    Xtensa_EE_VMULAS_S8_QACC	= 1619,
    Xtensa_EE_VMULAS_S8_QACC_LDBC_INCP	= 1620,
    Xtensa_EE_VMULAS_S8_QACC_LDBC_INCP_QUP	= 1621,
    Xtensa_EE_VMULAS_S8_QACC_LD_IP	= 1622,
    Xtensa_EE_VMULAS_S8_QACC_LD_IP_QUP	= 1623,
    Xtensa_EE_VMULAS_S8_QACC_LD_XP	= 1624,
    Xtensa_EE_VMULAS_S8_QACC_LD_XP_QUP	= 1625,
    Xtensa_EE_VMULAS_U16_ACCX	= 1626,
    Xtensa_EE_VMULAS_U16_ACCX_LD_IP	= 1627,
    Xtensa_EE_VMULAS_U16_ACCX_LD_IP_QUP	= 1628,
    Xtensa_EE_VMULAS_U16_ACCX_LD_XP	= 1629,
    Xtensa_EE_VMULAS_U16_ACCX_LD_XP_QUP	= 1630,
    Xtensa_EE_VMULAS_U16_QACC	= 1631,
    Xtensa_EE_VMULAS_U16_QACC_LDBC_INCP	= 1632,
    Xtensa_EE_VMULAS_U16_QACC_LDBC_INCP_QUP	= 1633,
    Xtensa_EE_VMULAS_U16_QACC_LD_IP	= 1634,
    Xtensa_EE_VMULAS_U16_QACC_LD_IP_QUP	= 1635,
    Xtensa_EE_VMULAS_U16_QACC_LD_XP	= 1636,
    Xtensa_EE_VMULAS_U16_QACC_LD_XP_QUP	= 1637,
    Xtensa_EE_VMULAS_U8_ACCX	= 1638,
    Xtensa_EE_VMULAS_U8_ACCX_LD_IP	= 1639,
    Xtensa_EE_VMULAS_U8_ACCX_LD_IP_QUP	= 1640,
    Xtensa_EE_VMULAS_U8_ACCX_LD_XP	= 1641,
    Xtensa_EE_VMULAS_U8_ACCX_LD_XP_QUP	= 1642,
    Xtensa_EE_VMULAS_U8_QACC	= 1643,
    Xtensa_EE_VMULAS_U8_QACC_LDBC_INCP	= 1644,
    Xtensa_EE_VMULAS_U8_QACC_LDBC_INCP_QUP	= 1645,
    Xtensa_EE_VMULAS_U8_QACC_LD_IP	= 1646,
    Xtensa_EE_VMULAS_U8_QACC_LD_IP_QUP	= 1647,
    Xtensa_EE_VMULAS_U8_QACC_LD_XP	= 1648,
    Xtensa_EE_VMULAS_U8_QACC_LD_XP_QUP	= 1649,
    Xtensa_EE_VMUL_S16	= 1650,
    Xtensa_EE_VMUL_S16_LD_INCP	= 1651,
    Xtensa_EE_VMUL_S16_ST_INCP	= 1652,
    Xtensa_EE_VMUL_S8	= 1653,
    Xtensa_EE_VMUL_S8_LD_INCP	= 1654,
    Xtensa_EE_VMUL_S8_ST_INCP	= 1655,
    Xtensa_EE_VMUL_U16	= 1656,
    Xtensa_EE_VMUL_U16_LD_INCP	= 1657,
    Xtensa_EE_VMUL_U16_ST_INCP	= 1658,
    Xtensa_EE_VMUL_U8	= 1659,
    Xtensa_EE_VMUL_U8_LD_INCP	= 1660,
    Xtensa_EE_VMUL_U8_ST_INCP	= 1661,
    Xtensa_EE_VPRELU_S16	= 1662,
    Xtensa_EE_VPRELU_S8	= 1663,
    Xtensa_EE_VRELU_S16	= 1664,
    Xtensa_EE_VRELU_S8	= 1665,
    Xtensa_EE_VSL_32	= 1666,
    Xtensa_EE_VSMULAS_S16_QACC	= 1667,
    Xtensa_EE_VSMULAS_S16_QACC_LD_INCP	= 1668,
    Xtensa_EE_VSMULAS_S8_QACC	= 1669,
    Xtensa_EE_VSMULAS_S8_QACC_LD_INCP	= 1670,
    Xtensa_EE_VSR_32	= 1671,
    Xtensa_EE_VST_128_IP	= 1672,
    Xtensa_EE_VST_128_XP	= 1673,
    Xtensa_EE_VST_H_64_IP	= 1674,
    Xtensa_EE_VST_H_64_XP	= 1675,
    Xtensa_EE_VST_L_64_IP	= 1676,
    Xtensa_EE_VST_L_64_XP	= 1677,
    Xtensa_EE_VSUBS_S16	= 1678,
    Xtensa_EE_VSUBS_S16_LD_INCP	= 1679,
    Xtensa_EE_VSUBS_S16_ST_INCP	= 1680,
    Xtensa_EE_VSUBS_S32	= 1681,
    Xtensa_EE_VSUBS_S32_LD_INCP	= 1682,
    Xtensa_EE_VSUBS_S32_ST_INCP	= 1683,
    Xtensa_EE_VSUBS_S8	= 1684,
    Xtensa_EE_VSUBS_S8_LD_INCP	= 1685,
    Xtensa_EE_VSUBS_S8_ST_INCP	= 1686,
    Xtensa_EE_VUNZIP_16	= 1687,
    Xtensa_EE_VUNZIP_32	= 1688,
    Xtensa_EE_VUNZIP_8	= 1689,
    Xtensa_EE_VZIP_16	= 1690,
    Xtensa_EE_VZIP_32	= 1691,
    Xtensa_EE_VZIP_8	= 1692,
    Xtensa_EE_WR_MASK_GPIO_OUT	= 1693,
    Xtensa_EE_XORQ	= 1694,
    Xtensa_EE_ZERO_ACCX	= 1695,
    Xtensa_EE_ZERO_Q	= 1696,
    Xtensa_EE_ZERO_QACC	= 1697,
    Xtensa_ENTRY	= 1698,
    Xtensa_ESYNC	= 1699,
    Xtensa_EXCW	= 1700,
    Xtensa_EXTUI	= 1701,
    Xtensa_EXTW	= 1702,
    Xtensa_FLOAT_S	= 1703,
    Xtensa_FLOOR_S	= 1704,
    Xtensa_GET_GPIO_IN	= 1705,
    Xtensa_ILL	= 1706,
    Xtensa_ILL_N	= 1707,
    Xtensa_ISYNC	= 1708,
    Xtensa_J	= 1709,
    Xtensa_JX	= 1710,
    Xtensa_L16SI	= 1711,
    Xtensa_L16UI	= 1712,
    Xtensa_L32E	= 1713,
    Xtensa_L32I	= 1714,
    Xtensa_L32I_N	= 1715,
    Xtensa_L32R	= 1716,
    Xtensa_L8UI	= 1717,
    Xtensa_LDDEC	= 1718,
    Xtensa_LDINC	= 1719,
    Xtensa_LEA_ADD	= 1720,
    Xtensa_LOOP	= 1721,
    Xtensa_LOOPGTZ	= 1722,
    Xtensa_LOOPNEZ	= 1723,
    Xtensa_LSI	= 1724,
    Xtensa_LSIP	= 1725,
    Xtensa_LSX	= 1726,
    Xtensa_LSXP	= 1727,
    Xtensa_MADDN_S	= 1728,
    Xtensa_MADD_S	= 1729,
    Xtensa_MAX	= 1730,
    Xtensa_MAXU	= 1731,
    Xtensa_MEMW	= 1732,
    Xtensa_MIN	= 1733,
    Xtensa_MINU	= 1734,
    Xtensa_MKDADJ_S	= 1735,
    Xtensa_MKSADJ_S	= 1736,
    Xtensa_MOVEQZ	= 1737,
    Xtensa_MOVEQZ_S	= 1738,
    Xtensa_MOVF	= 1739,
    Xtensa_MOVF_S	= 1740,
    Xtensa_MOVGEZ	= 1741,
    Xtensa_MOVGEZ_S	= 1742,
    Xtensa_MOVI	= 1743,
    Xtensa_MOVI_N	= 1744,
    Xtensa_MOVLTZ	= 1745,
    Xtensa_MOVLTZ_S	= 1746,
    Xtensa_MOVNEZ	= 1747,
    Xtensa_MOVNEZ_S	= 1748,
    Xtensa_MOVSP	= 1749,
    Xtensa_MOVT	= 1750,
    Xtensa_MOVT_S	= 1751,
    Xtensa_MOV_N	= 1752,
    Xtensa_MOV_S	= 1753,
    Xtensa_MSUB_S	= 1754,
    Xtensa_MUL16S	= 1755,
    Xtensa_MUL16U	= 1756,
    Xtensa_MULA_AA_HH	= 1757,
    Xtensa_MULA_AA_HL	= 1758,
    Xtensa_MULA_AA_LH	= 1759,
    Xtensa_MULA_AA_LL	= 1760,
    Xtensa_MULA_AD_HH	= 1761,
    Xtensa_MULA_AD_HL	= 1762,
    Xtensa_MULA_AD_LH	= 1763,
    Xtensa_MULA_AD_LL	= 1764,
    Xtensa_MULA_DA_HH	= 1765,
    Xtensa_MULA_DA_HH_LDDEC	= 1766,
    Xtensa_MULA_DA_HH_LDINC	= 1767,
    Xtensa_MULA_DA_HL	= 1768,
    Xtensa_MULA_DA_HL_LDDEC	= 1769,
    Xtensa_MULA_DA_HL_LDINC	= 1770,
    Xtensa_MULA_DA_LH	= 1771,
    Xtensa_MULA_DA_LH_LDDEC	= 1772,
    Xtensa_MULA_DA_LH_LDINC	= 1773,
    Xtensa_MULA_DA_LL	= 1774,
    Xtensa_MULA_DA_LL_LDDEC	= 1775,
    Xtensa_MULA_DA_LL_LDINC	= 1776,
    Xtensa_MULA_DD_HH	= 1777,
    Xtensa_MULA_DD_HH_LDDEC	= 1778,
    Xtensa_MULA_DD_HH_LDINC	= 1779,
    Xtensa_MULA_DD_HL	= 1780,
    Xtensa_MULA_DD_HL_LDDEC	= 1781,
    Xtensa_MULA_DD_HL_LDINC	= 1782,
    Xtensa_MULA_DD_LH	= 1783,
    Xtensa_MULA_DD_LH_LDDEC	= 1784,
    Xtensa_MULA_DD_LH_LDINC	= 1785,
    Xtensa_MULA_DD_LL	= 1786,
    Xtensa_MULA_DD_LL_LDDEC	= 1787,
    Xtensa_MULA_DD_LL_LDINC	= 1788,
    Xtensa_MULL	= 1789,
    Xtensa_MULSH	= 1790,
    Xtensa_MULS_AA_HH	= 1791,
    Xtensa_MULS_AA_HL	= 1792,
    Xtensa_MULS_AA_LH	= 1793,
    Xtensa_MULS_AA_LL	= 1794,
    Xtensa_MULS_AD_HH	= 1795,
    Xtensa_MULS_AD_HL	= 1796,
    Xtensa_MULS_AD_LH	= 1797,
    Xtensa_MULS_AD_LL	= 1798,
    Xtensa_MULS_DA_HH	= 1799,
    Xtensa_MULS_DA_HL	= 1800,
    Xtensa_MULS_DA_LH	= 1801,
    Xtensa_MULS_DA_LL	= 1802,
    Xtensa_MULS_DD_HH	= 1803,
    Xtensa_MULS_DD_HL	= 1804,
    Xtensa_MULS_DD_LH	= 1805,
    Xtensa_MULS_DD_LL	= 1806,
    Xtensa_MULUH	= 1807,
    Xtensa_MUL_AA_HH	= 1808,
    Xtensa_MUL_AA_HL	= 1809,
    Xtensa_MUL_AA_LH	= 1810,
    Xtensa_MUL_AA_LL	= 1811,
    Xtensa_MUL_AD_HH	= 1812,
    Xtensa_MUL_AD_HL	= 1813,
    Xtensa_MUL_AD_LH	= 1814,
    Xtensa_MUL_AD_LL	= 1815,
    Xtensa_MUL_DA_HH	= 1816,
    Xtensa_MUL_DA_HL	= 1817,
    Xtensa_MUL_DA_LH	= 1818,
    Xtensa_MUL_DA_LL	= 1819,
    Xtensa_MUL_DD_HH	= 1820,
    Xtensa_MUL_DD_HL	= 1821,
    Xtensa_MUL_DD_LH	= 1822,
    Xtensa_MUL_DD_LL	= 1823,
    Xtensa_MUL_S	= 1824,
    Xtensa_NEG	= 1825,
    Xtensa_NEG_S	= 1826,
    Xtensa_NEXP01_S	= 1827,
    Xtensa_NOP	= 1828,
    Xtensa_NSA	= 1829,
    Xtensa_NSAU	= 1830,
    Xtensa_OEQ_S	= 1831,
    Xtensa_OLE_S	= 1832,
    Xtensa_OLT_S	= 1833,
    Xtensa_OR	= 1834,
    Xtensa_ORB	= 1835,
    Xtensa_ORBC	= 1836,
    Xtensa_QUOS	= 1837,
    Xtensa_QUOU	= 1838,
    Xtensa_RECIP0_S	= 1839,
    Xtensa_REMS	= 1840,
    Xtensa_REMU	= 1841,
    Xtensa_RER	= 1842,
    Xtensa_RET	= 1843,
    Xtensa_RETW	= 1844,
    Xtensa_RETW_N	= 1845,
    Xtensa_RET_N	= 1846,
    Xtensa_RFDE	= 1847,
    Xtensa_RFE	= 1848,
    Xtensa_RFI	= 1849,
    Xtensa_RFR	= 1850,
    Xtensa_RFWO	= 1851,
    Xtensa_RFWU	= 1852,
    Xtensa_ROTW	= 1853,
    Xtensa_ROUND_S	= 1854,
    Xtensa_RSIL	= 1855,
    Xtensa_RSQRT0_S	= 1856,
    Xtensa_RSR	= 1857,
    Xtensa_RSYNC	= 1858,
    Xtensa_RUR	= 1859,
    Xtensa_RUR_ACCX_0	= 1860,
    Xtensa_RUR_ACCX_1	= 1861,
    Xtensa_RUR_AE_BITHEAD	= 1862,
    Xtensa_RUR_AE_BITPTR	= 1863,
    Xtensa_RUR_AE_BITSUSED	= 1864,
    Xtensa_RUR_AE_CBEGIN0	= 1865,
    Xtensa_RUR_AE_CEND0	= 1866,
    Xtensa_RUR_AE_CWRAP	= 1867,
    Xtensa_RUR_AE_CW_SD_NO	= 1868,
    Xtensa_RUR_AE_FIRST_TS	= 1869,
    Xtensa_RUR_AE_NEXTOFFSET	= 1870,
    Xtensa_RUR_AE_OVERFLOW	= 1871,
    Xtensa_RUR_AE_OVF_SAR	= 1872,
    Xtensa_RUR_AE_SAR	= 1873,
    Xtensa_RUR_AE_SEARCHDONE	= 1874,
    Xtensa_RUR_AE_TABLESIZE	= 1875,
    Xtensa_RUR_AE_TS_FTS_BU_BP	= 1876,
    Xtensa_RUR_FFT_BIT_WIDTH	= 1877,
    Xtensa_RUR_GPIO_OUT	= 1878,
    Xtensa_RUR_QACC_H_0	= 1879,
    Xtensa_RUR_QACC_H_1	= 1880,
    Xtensa_RUR_QACC_H_2	= 1881,
    Xtensa_RUR_QACC_H_3	= 1882,
    Xtensa_RUR_QACC_H_4	= 1883,
    Xtensa_RUR_QACC_L_0	= 1884,
    Xtensa_RUR_QACC_L_1	= 1885,
    Xtensa_RUR_QACC_L_2	= 1886,
    Xtensa_RUR_QACC_L_3	= 1887,
    Xtensa_RUR_QACC_L_4	= 1888,
    Xtensa_RUR_SAR_BYTE	= 1889,
    Xtensa_RUR_UA_STATE_0	= 1890,
    Xtensa_RUR_UA_STATE_1	= 1891,
    Xtensa_RUR_UA_STATE_2	= 1892,
    Xtensa_RUR_UA_STATE_3	= 1893,
    Xtensa_S16I	= 1894,
    Xtensa_S32C1I	= 1895,
    Xtensa_S32E	= 1896,
    Xtensa_S32I	= 1897,
    Xtensa_S32I_N	= 1898,
    Xtensa_S8I	= 1899,
    Xtensa_SET_BIT_GPIO_OUT	= 1900,
    Xtensa_SEXT	= 1901,
    Xtensa_SIMCALL	= 1902,
    Xtensa_SLL	= 1903,
    Xtensa_SLLI	= 1904,
    Xtensa_SQRT0_S	= 1905,
    Xtensa_SRA	= 1906,
    Xtensa_SRAI	= 1907,
    Xtensa_SRC	= 1908,
    Xtensa_SRL	= 1909,
    Xtensa_SRLI	= 1910,
    Xtensa_SSA8L	= 1911,
    Xtensa_SSAI	= 1912,
    Xtensa_SSI	= 1913,
    Xtensa_SSIP	= 1914,
    Xtensa_SSL	= 1915,
    Xtensa_SSR	= 1916,
    Xtensa_SSX	= 1917,
    Xtensa_SSXP	= 1918,
    Xtensa_SUB	= 1919,
    Xtensa_SUBX2	= 1920,
    Xtensa_SUBX4	= 1921,
    Xtensa_SUBX8	= 1922,
    Xtensa_SUB_S	= 1923,
    Xtensa_SYSCALL	= 1924,
    Xtensa_TRUNC_S	= 1925,
    Xtensa_UEQ_S	= 1926,
    Xtensa_UFLOAT_S	= 1927,
    Xtensa_ULE_S	= 1928,
    Xtensa_ULT_S	= 1929,
    Xtensa_UMUL_AA_HH	= 1930,
    Xtensa_UMUL_AA_HL	= 1931,
    Xtensa_UMUL_AA_LH	= 1932,
    Xtensa_UMUL_AA_LL	= 1933,
    Xtensa_UN_S	= 1934,
    Xtensa_UTRUNC_S	= 1935,
    Xtensa_WAITI	= 1936,
    Xtensa_WDTLB	= 1937,
    Xtensa_WER	= 1938,
    Xtensa_WFR	= 1939,
    Xtensa_WITLB	= 1940,
    Xtensa_WR_MASK_GPIO_OUT	= 1941,
    Xtensa_WSR	= 1942,
    Xtensa_WUR	= 1943,
    Xtensa_WUR_ACCX_0	= 1944,
    Xtensa_WUR_ACCX_1	= 1945,
    Xtensa_WUR_AE_BITHEAD	= 1946,
    Xtensa_WUR_AE_BITPTR	= 1947,
    Xtensa_WUR_AE_BITSUSED	= 1948,
    Xtensa_WUR_AE_CBEGIN0	= 1949,
    Xtensa_WUR_AE_CEND0	= 1950,
    Xtensa_WUR_AE_CWRAP	= 1951,
    Xtensa_WUR_AE_CW_SD_NO	= 1952,
    Xtensa_WUR_AE_FIRST_TS	= 1953,
    Xtensa_WUR_AE_NEXTOFFSET	= 1954,
    Xtensa_WUR_AE_OVERFLOW	= 1955,
    Xtensa_WUR_AE_OVF_SAR	= 1956,
    Xtensa_WUR_AE_SAR	= 1957,
    Xtensa_WUR_AE_SEARCHDONE	= 1958,
    Xtensa_WUR_AE_TABLESIZE	= 1959,
    Xtensa_WUR_AE_TS_FTS_BU_BP	= 1960,
    Xtensa_WUR_FCR	= 1961,
    Xtensa_WUR_FFT_BIT_WIDTH	= 1962,
    Xtensa_WUR_FSR	= 1963,
    Xtensa_WUR_GPIO_OUT	= 1964,
    Xtensa_WUR_QACC_H_0	= 1965,
    Xtensa_WUR_QACC_H_1	= 1966,
    Xtensa_WUR_QACC_H_2	= 1967,
    Xtensa_WUR_QACC_H_3	= 1968,
    Xtensa_WUR_QACC_H_4	= 1969,
    Xtensa_WUR_QACC_L_0	= 1970,
    Xtensa_WUR_QACC_L_1	= 1971,
    Xtensa_WUR_QACC_L_2	= 1972,
    Xtensa_WUR_QACC_L_3	= 1973,
    Xtensa_WUR_QACC_L_4	= 1974,
    Xtensa_WUR_SAR_BYTE	= 1975,
    Xtensa_WUR_UA_STATE_0	= 1976,
    Xtensa_WUR_UA_STATE_1	= 1977,
    Xtensa_WUR_UA_STATE_2	= 1978,
    Xtensa_WUR_UA_STATE_3	= 1979,
    Xtensa_XOR	= 1980,
    Xtensa_XORB	= 1981,
    Xtensa_XSR	= 1982,
    Xtensa__L32I	= 1983,
    Xtensa__L32I_N	= 1984,
    Xtensa__MOVI	= 1985,
    Xtensa__S32I	= 1986,
    Xtensa__S32I_N	= 1987,
    Xtensa__SLLI	= 1988,
    Xtensa__SRLI	= 1989,
    Xtensa_mv_QR	= 1990,
    INSTRUCTION_LIST_END = 1991
  };

#endif // GET_INSTRINFO_ENUM

#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
typedef struct XtensaInstrTable {
  MCInstrDesc Insts[1991];
  MCOperandInfo OperandInfo[885];
  MCPhysReg ImplicitOps[19];
} XtensaInstrTable;

#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)

#ifdef GET_INSTRINFO_MC_DESC
#undef GET_INSTRINFO_MC_DESC

static const unsigned XtensaImpOpBase = sizeof(MCOperandInfo) / (sizeof(MCPhysReg));

static const XtensaInstrTable XtensaDescs = {
  {
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1990 = mv_QR
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1989 = _SRLI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1988 = _SLLI
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1987 = _S32I_N
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1986 = _S32I
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1985 = _MOVI
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1984 = _L32I_N
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1983 = _L32I
  { 4, &XtensaDescs.OperandInfo[881] },  // Inst #1982 = XSR
  { 3, &XtensaDescs.OperandInfo[505] },  // Inst #1981 = XORB
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1980 = XOR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1979 = WUR_UA_STATE_3
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1978 = WUR_UA_STATE_2
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1977 = WUR_UA_STATE_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1976 = WUR_UA_STATE_0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1975 = WUR_SAR_BYTE
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1974 = WUR_QACC_L_4
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1973 = WUR_QACC_L_3
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1972 = WUR_QACC_L_2
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1971 = WUR_QACC_L_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1970 = WUR_QACC_L_0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1969 = WUR_QACC_H_4
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1968 = WUR_QACC_H_3
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1967 = WUR_QACC_H_2
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1966 = WUR_QACC_H_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1965 = WUR_QACC_H_0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1964 = WUR_GPIO_OUT
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1963 = WUR_FSR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1962 = WUR_FFT_BIT_WIDTH
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1961 = WUR_FCR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1960 = WUR_AE_TS_FTS_BU_BP
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1959 = WUR_AE_TABLESIZE
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1958 = WUR_AE_SEARCHDONE
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1957 = WUR_AE_SAR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1956 = WUR_AE_OVF_SAR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1955 = WUR_AE_OVERFLOW
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1954 = WUR_AE_NEXTOFFSET
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1953 = WUR_AE_FIRST_TS
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1952 = WUR_AE_CW_SD_NO
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1951 = WUR_AE_CWRAP
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1950 = WUR_AE_CEND0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1949 = WUR_AE_CBEGIN0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1948 = WUR_AE_BITSUSED
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1947 = WUR_AE_BITPTR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1946 = WUR_AE_BITHEAD
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1945 = WUR_ACCX_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1944 = WUR_ACCX_0
  { 2, &XtensaDescs.OperandInfo[879] },  // Inst #1943 = WUR
  { 2, &XtensaDescs.OperandInfo[877] },  // Inst #1942 = WSR
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1941 = WR_MASK_GPIO_OUT
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1940 = WITLB
  { 2, &XtensaDescs.OperandInfo[875] },  // Inst #1939 = WFR
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1938 = WER
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1937 = WDTLB
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1936 = WAITI
  { 3, &XtensaDescs.OperandInfo[513] },  // Inst #1935 = UTRUNC_S
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1934 = UN_S
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1933 = UMUL_AA_LL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1932 = UMUL_AA_LH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1931 = UMUL_AA_HL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1930 = UMUL_AA_HH
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1929 = ULT_S
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1928 = ULE_S
  { 3, &XtensaDescs.OperandInfo[797] },  // Inst #1927 = UFLOAT_S
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1926 = UEQ_S
  { 3, &XtensaDescs.OperandInfo[513] },  // Inst #1925 = TRUNC_S
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1924 = SYSCALL
  { 3, &XtensaDescs.OperandInfo[346] },  // Inst #1923 = SUB_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1922 = SUBX8
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1921 = SUBX4
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1920 = SUBX2
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1919 = SUB
  { 4, &XtensaDescs.OperandInfo[871] },  // Inst #1918 = SSXP
  { 3, &XtensaDescs.OperandInfo[810] },  // Inst #1917 = SSX
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1916 = SSR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1915 = SSL
  { 4, &XtensaDescs.OperandInfo[867] },  // Inst #1914 = SSIP
  { 3, &XtensaDescs.OperandInfo[803] },  // Inst #1913 = SSI
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1912 = SSAI
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1911 = SSA8L
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1910 = SRLI
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1909 = SRL
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1908 = SRC
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1907 = SRAI
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1906 = SRA
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1905 = SQRT0_S
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1904 = SLLI
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1903 = SLL
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1902 = SIMCALL
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1901 = SEXT
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1900 = SET_BIT_GPIO_OUT
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1899 = S8I
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1898 = S32I_N
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1897 = S32I
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1896 = S32E
  { 4, &XtensaDescs.OperandInfo[863] },  // Inst #1895 = S32C1I
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1894 = S16I
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1893 = RUR_UA_STATE_3
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1892 = RUR_UA_STATE_2
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1891 = RUR_UA_STATE_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1890 = RUR_UA_STATE_0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1889 = RUR_SAR_BYTE
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1888 = RUR_QACC_L_4
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1887 = RUR_QACC_L_3
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1886 = RUR_QACC_L_2
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1885 = RUR_QACC_L_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1884 = RUR_QACC_L_0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1883 = RUR_QACC_H_4
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1882 = RUR_QACC_H_3
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1881 = RUR_QACC_H_2
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1880 = RUR_QACC_H_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1879 = RUR_QACC_H_0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1878 = RUR_GPIO_OUT
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1877 = RUR_FFT_BIT_WIDTH
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1876 = RUR_AE_TS_FTS_BU_BP
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1875 = RUR_AE_TABLESIZE
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1874 = RUR_AE_SEARCHDONE
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1873 = RUR_AE_SAR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1872 = RUR_AE_OVF_SAR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1871 = RUR_AE_OVERFLOW
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1870 = RUR_AE_NEXTOFFSET
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1869 = RUR_AE_FIRST_TS
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1868 = RUR_AE_CW_SD_NO
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1867 = RUR_AE_CWRAP
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1866 = RUR_AE_CEND0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1865 = RUR_AE_CBEGIN0
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1864 = RUR_AE_BITSUSED
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1863 = RUR_AE_BITPTR
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1862 = RUR_AE_BITHEAD
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1861 = RUR_ACCX_1
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1860 = RUR_ACCX_0
  { 2, &XtensaDescs.OperandInfo[861] },  // Inst #1859 = RUR
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1858 = RSYNC
  { 2, &XtensaDescs.OperandInfo[859] },  // Inst #1857 = RSR
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1856 = RSQRT0_S
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1855 = RSIL
  { 3, &XtensaDescs.OperandInfo[513] },  // Inst #1854 = ROUND_S
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1853 = ROTW
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1852 = RFWU
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1851 = RFWO
  { 2, &XtensaDescs.OperandInfo[857] },  // Inst #1850 = RFR
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1849 = RFI
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1848 = RFE
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1847 = RFDE
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1846 = RET_N
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1845 = RETW_N
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1844 = RETW
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1843 = RET
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1842 = RER
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1841 = REMU
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1840 = REMS
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1839 = RECIP0_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1838 = QUOU
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1837 = QUOS
  { 3, &XtensaDescs.OperandInfo[505] },  // Inst #1836 = ORBC
  { 3, &XtensaDescs.OperandInfo[505] },  // Inst #1835 = ORB
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1834 = OR
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1833 = OLT_S
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1832 = OLE_S
  { 3, &XtensaDescs.OperandInfo[854] },  // Inst #1831 = OEQ_S
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1830 = NSAU
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1829 = NSA
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1828 = NOP
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1827 = NEXP01_S
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1826 = NEG_S
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1825 = NEG
  { 3, &XtensaDescs.OperandInfo[346] },  // Inst #1824 = MUL_S
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1823 = MUL_DD_LL
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1822 = MUL_DD_LH
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1821 = MUL_DD_HL
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1820 = MUL_DD_HH
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1819 = MUL_DA_LL
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1818 = MUL_DA_LH
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1817 = MUL_DA_HL
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1816 = MUL_DA_HH
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1815 = MUL_AD_LL
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1814 = MUL_AD_LH
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1813 = MUL_AD_HL
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1812 = MUL_AD_HH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1811 = MUL_AA_LL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1810 = MUL_AA_LH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1809 = MUL_AA_HL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1808 = MUL_AA_HH
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1807 = MULUH
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1806 = MULS_DD_LL
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1805 = MULS_DD_LH
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1804 = MULS_DD_HL
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1803 = MULS_DD_HH
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1802 = MULS_DA_LL
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1801 = MULS_DA_LH
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1800 = MULS_DA_HL
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1799 = MULS_DA_HH
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1798 = MULS_AD_LL
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1797 = MULS_AD_LH
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1796 = MULS_AD_HL
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1795 = MULS_AD_HH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1794 = MULS_AA_LL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1793 = MULS_AA_LH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1792 = MULS_AA_HL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1791 = MULS_AA_HH
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1790 = MULSH
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1789 = MULL
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1788 = MULA_DD_LL_LDINC
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1787 = MULA_DD_LL_LDDEC
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1786 = MULA_DD_LL
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1785 = MULA_DD_LH_LDINC
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1784 = MULA_DD_LH_LDDEC
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1783 = MULA_DD_LH
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1782 = MULA_DD_HL_LDINC
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1781 = MULA_DD_HL_LDDEC
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1780 = MULA_DD_HL
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1779 = MULA_DD_HH_LDINC
  { 5, &XtensaDescs.OperandInfo[849] },  // Inst #1778 = MULA_DD_HH_LDDEC
  { 2, &XtensaDescs.OperandInfo[847] },  // Inst #1777 = MULA_DD_HH
  { 5, &XtensaDescs.OperandInfo[842] },  // Inst #1776 = MULA_DA_LL_LDINC
  { 5, &XtensaDescs.OperandInfo[837] },  // Inst #1775 = MULA_DA_LL_LDDEC
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1774 = MULA_DA_LL
  { 5, &XtensaDescs.OperandInfo[842] },  // Inst #1773 = MULA_DA_LH_LDINC
  { 5, &XtensaDescs.OperandInfo[837] },  // Inst #1772 = MULA_DA_LH_LDDEC
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1771 = MULA_DA_LH
  { 5, &XtensaDescs.OperandInfo[842] },  // Inst #1770 = MULA_DA_HL_LDINC
  { 5, &XtensaDescs.OperandInfo[837] },  // Inst #1769 = MULA_DA_HL_LDDEC
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1768 = MULA_DA_HL
  { 5, &XtensaDescs.OperandInfo[842] },  // Inst #1767 = MULA_DA_HH_LDINC
  { 5, &XtensaDescs.OperandInfo[837] },  // Inst #1766 = MULA_DA_HH_LDDEC
  { 2, &XtensaDescs.OperandInfo[835] },  // Inst #1765 = MULA_DA_HH
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1764 = MULA_AD_LL
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1763 = MULA_AD_LH
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1762 = MULA_AD_HL
  { 2, &XtensaDescs.OperandInfo[833] },  // Inst #1761 = MULA_AD_HH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1760 = MULA_AA_LL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1759 = MULA_AA_LH
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1758 = MULA_AA_HL
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1757 = MULA_AA_HH
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1756 = MUL16U
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1755 = MUL16S
  { 4, &XtensaDescs.OperandInfo[817] },  // Inst #1754 = MSUB_S
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1753 = MOV_S
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1752 = MOV_N
  { 4, &XtensaDescs.OperandInfo[829] },  // Inst #1751 = MOVT_S
  { 4, &XtensaDescs.OperandInfo[825] },  // Inst #1750 = MOVT
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1749 = MOVSP
  { 4, &XtensaDescs.OperandInfo[821] },  // Inst #1748 = MOVNEZ_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1747 = MOVNEZ
  { 4, &XtensaDescs.OperandInfo[821] },  // Inst #1746 = MOVLTZ_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1745 = MOVLTZ
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1744 = MOVI_N
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1743 = MOVI
  { 4, &XtensaDescs.OperandInfo[821] },  // Inst #1742 = MOVGEZ_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1741 = MOVGEZ
  { 4, &XtensaDescs.OperandInfo[829] },  // Inst #1740 = MOVF_S
  { 4, &XtensaDescs.OperandInfo[825] },  // Inst #1739 = MOVF
  { 4, &XtensaDescs.OperandInfo[821] },  // Inst #1738 = MOVEQZ_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1737 = MOVEQZ
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1736 = MKSADJ_S
  { 3, &XtensaDescs.OperandInfo[343] },  // Inst #1735 = MKDADJ_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1734 = MINU
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1733 = MIN
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1732 = MEMW
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1731 = MAXU
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1730 = MAX
  { 4, &XtensaDescs.OperandInfo[817] },  // Inst #1729 = MADD_S
  { 4, &XtensaDescs.OperandInfo[817] },  // Inst #1728 = MADDN_S
  { 4, &XtensaDescs.OperandInfo[813] },  // Inst #1727 = LSXP
  { 3, &XtensaDescs.OperandInfo[810] },  // Inst #1726 = LSX
  { 4, &XtensaDescs.OperandInfo[806] },  // Inst #1725 = LSIP
  { 3, &XtensaDescs.OperandInfo[803] },  // Inst #1724 = LSI
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1723 = LOOPNEZ
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1722 = LOOPGTZ
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1721 = LOOP
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1720 = LEA_ADD
  { 3, &XtensaDescs.OperandInfo[800] },  // Inst #1719 = LDINC
  { 3, &XtensaDescs.OperandInfo[800] },  // Inst #1718 = LDDEC
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1717 = L8UI
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1716 = L32R
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1715 = L32I_N
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1714 = L32I
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1713 = L32E
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1712 = L16UI
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #1711 = L16SI
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1710 = JX
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1709 = J
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1708 = ISYNC
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1707 = ILL_N
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1706 = ILL
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1705 = GET_GPIO_IN
  { 3, &XtensaDescs.OperandInfo[513] },  // Inst #1704 = FLOOR_S
  { 3, &XtensaDescs.OperandInfo[797] },  // Inst #1703 = FLOAT_S
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1702 = EXTW
  { 4, &XtensaDescs.OperandInfo[793] },  // Inst #1701 = EXTUI
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1700 = EXCW
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1699 = ESYNC
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1698 = ENTRY
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1697 = EE_ZERO_QACC
  { 1, &XtensaDescs.OperandInfo[646] },  // Inst #1696 = EE_ZERO_Q
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1695 = EE_ZERO_ACCX
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1694 = EE_XORQ
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1693 = EE_WR_MASK_GPIO_OUT
  { 4, &XtensaDescs.OperandInfo[789] },  // Inst #1692 = EE_VZIP_8
  { 4, &XtensaDescs.OperandInfo[789] },  // Inst #1691 = EE_VZIP_32
  { 4, &XtensaDescs.OperandInfo[789] },  // Inst #1690 = EE_VZIP_16
  { 4, &XtensaDescs.OperandInfo[789] },  // Inst #1689 = EE_VUNZIP_8
  { 4, &XtensaDescs.OperandInfo[789] },  // Inst #1688 = EE_VUNZIP_32
  { 4, &XtensaDescs.OperandInfo[789] },  // Inst #1687 = EE_VUNZIP_16
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1686 = EE_VSUBS_S8_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1685 = EE_VSUBS_S8_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1684 = EE_VSUBS_S8
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1683 = EE_VSUBS_S32_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1682 = EE_VSUBS_S32_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1681 = EE_VSUBS_S32
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1680 = EE_VSUBS_S16_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1679 = EE_VSUBS_S16_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1678 = EE_VSUBS_S16
  { 4, &XtensaDescs.OperandInfo[785] },  // Inst #1677 = EE_VST_L_64_XP
  { 4, &XtensaDescs.OperandInfo[593] },  // Inst #1676 = EE_VST_L_64_IP
  { 4, &XtensaDescs.OperandInfo[785] },  // Inst #1675 = EE_VST_H_64_XP
  { 4, &XtensaDescs.OperandInfo[593] },  // Inst #1674 = EE_VST_H_64_IP
  { 4, &XtensaDescs.OperandInfo[785] },  // Inst #1673 = EE_VST_128_XP
  { 4, &XtensaDescs.OperandInfo[593] },  // Inst #1672 = EE_VST_128_IP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1671 = EE_VSR_32
  { 6, &XtensaDescs.OperandInfo[779] },  // Inst #1670 = EE_VSMULAS_S8_QACC_LD_INCP
  { 3, &XtensaDescs.OperandInfo[776] },  // Inst #1669 = EE_VSMULAS_S8_QACC
  { 6, &XtensaDescs.OperandInfo[779] },  // Inst #1668 = EE_VSMULAS_S16_QACC_LD_INCP
  { 3, &XtensaDescs.OperandInfo[776] },  // Inst #1667 = EE_VSMULAS_S16_QACC
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1666 = EE_VSL_32
  { 4, &XtensaDescs.OperandInfo[772] },  // Inst #1665 = EE_VRELU_S8
  { 4, &XtensaDescs.OperandInfo[772] },  // Inst #1664 = EE_VRELU_S16
  { 4, &XtensaDescs.OperandInfo[768] },  // Inst #1663 = EE_VPRELU_S8
  { 4, &XtensaDescs.OperandInfo[768] },  // Inst #1662 = EE_VPRELU_S16
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1661 = EE_VMUL_U8_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1660 = EE_VMUL_U8_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1659 = EE_VMUL_U8
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1658 = EE_VMUL_U16_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1657 = EE_VMUL_U16_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1656 = EE_VMUL_U16
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1655 = EE_VMUL_S8_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1654 = EE_VMUL_S8_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1653 = EE_VMUL_S8
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1652 = EE_VMUL_S16_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1651 = EE_VMUL_S16_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1650 = EE_VMUL_S16
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1649 = EE_VMULAS_U8_QACC_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1648 = EE_VMULAS_U8_QACC_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1647 = EE_VMULAS_U8_QACC_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1646 = EE_VMULAS_U8_QACC_LD_IP
  { 8, &XtensaDescs.OperandInfo[760] },  // Inst #1645 = EE_VMULAS_U8_QACC_LDBC_INCP_QUP
  { 5, &XtensaDescs.OperandInfo[755] },  // Inst #1644 = EE_VMULAS_U8_QACC_LDBC_INCP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1643 = EE_VMULAS_U8_QACC
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1642 = EE_VMULAS_U8_ACCX_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1641 = EE_VMULAS_U8_ACCX_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1640 = EE_VMULAS_U8_ACCX_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1639 = EE_VMULAS_U8_ACCX_LD_IP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1638 = EE_VMULAS_U8_ACCX
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1637 = EE_VMULAS_U16_QACC_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1636 = EE_VMULAS_U16_QACC_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1635 = EE_VMULAS_U16_QACC_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1634 = EE_VMULAS_U16_QACC_LD_IP
  { 8, &XtensaDescs.OperandInfo[760] },  // Inst #1633 = EE_VMULAS_U16_QACC_LDBC_INCP_QUP
  { 5, &XtensaDescs.OperandInfo[755] },  // Inst #1632 = EE_VMULAS_U16_QACC_LDBC_INCP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1631 = EE_VMULAS_U16_QACC
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1630 = EE_VMULAS_U16_ACCX_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1629 = EE_VMULAS_U16_ACCX_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1628 = EE_VMULAS_U16_ACCX_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1627 = EE_VMULAS_U16_ACCX_LD_IP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1626 = EE_VMULAS_U16_ACCX
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1625 = EE_VMULAS_S8_QACC_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1624 = EE_VMULAS_S8_QACC_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1623 = EE_VMULAS_S8_QACC_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1622 = EE_VMULAS_S8_QACC_LD_IP
  { 8, &XtensaDescs.OperandInfo[760] },  // Inst #1621 = EE_VMULAS_S8_QACC_LDBC_INCP_QUP
  { 5, &XtensaDescs.OperandInfo[755] },  // Inst #1620 = EE_VMULAS_S8_QACC_LDBC_INCP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1619 = EE_VMULAS_S8_QACC
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1618 = EE_VMULAS_S8_ACCX_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1617 = EE_VMULAS_S8_ACCX_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1616 = EE_VMULAS_S8_ACCX_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1615 = EE_VMULAS_S8_ACCX_LD_IP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1614 = EE_VMULAS_S8_ACCX
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1613 = EE_VMULAS_S16_QACC_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1612 = EE_VMULAS_S16_QACC_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1611 = EE_VMULAS_S16_QACC_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1610 = EE_VMULAS_S16_QACC_LD_IP
  { 8, &XtensaDescs.OperandInfo[760] },  // Inst #1609 = EE_VMULAS_S16_QACC_LDBC_INCP_QUP
  { 5, &XtensaDescs.OperandInfo[755] },  // Inst #1608 = EE_VMULAS_S16_QACC_LDBC_INCP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1607 = EE_VMULAS_S16_QACC
  { 9, &XtensaDescs.OperandInfo[746] },  // Inst #1606 = EE_VMULAS_S16_ACCX_LD_XP_QUP
  { 6, &XtensaDescs.OperandInfo[740] },  // Inst #1605 = EE_VMULAS_S16_ACCX_LD_XP
  { 9, &XtensaDescs.OperandInfo[731] },  // Inst #1604 = EE_VMULAS_S16_ACCX_LD_IP_QUP
  { 6, &XtensaDescs.OperandInfo[725] },  // Inst #1603 = EE_VMULAS_S16_ACCX_LD_IP
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1602 = EE_VMULAS_S16_ACCX
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1601 = EE_VMIN_S8_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1600 = EE_VMIN_S8_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1599 = EE_VMIN_S8
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1598 = EE_VMIN_S32_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1597 = EE_VMIN_S32_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1596 = EE_VMIN_S32
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1595 = EE_VMIN_S16_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1594 = EE_VMIN_S16_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1593 = EE_VMIN_S16
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1592 = EE_VMAX_S8_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1591 = EE_VMAX_S8_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1590 = EE_VMAX_S8
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1589 = EE_VMAX_S32_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1588 = EE_VMAX_S32_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1587 = EE_VMAX_S32
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1586 = EE_VMAX_S16_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1585 = EE_VMAX_S16_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1584 = EE_VMAX_S16
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1583 = EE_VLD_L_64_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1582 = EE_VLD_L_64_IP
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1581 = EE_VLD_H_64_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1580 = EE_VLD_H_64_IP
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1579 = EE_VLD_128_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1578 = EE_VLD_128_IP
  { 4, &XtensaDescs.OperandInfo[721] },  // Inst #1577 = EE_VLDHBC_16_INCP
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1576 = EE_VLDBC_8_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1575 = EE_VLDBC_8_IP
  { 2, &XtensaDescs.OperandInfo[719] },  // Inst #1574 = EE_VLDBC_8
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1573 = EE_VLDBC_32_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1572 = EE_VLDBC_32_IP
  { 2, &XtensaDescs.OperandInfo[719] },  // Inst #1571 = EE_VLDBC_32
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1570 = EE_VLDBC_16_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1569 = EE_VLDBC_16_IP
  { 2, &XtensaDescs.OperandInfo[719] },  // Inst #1568 = EE_VLDBC_16
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1567 = EE_VCMP_LT_S8
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1566 = EE_VCMP_LT_S32
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1565 = EE_VCMP_LT_S16
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1564 = EE_VCMP_GT_S8
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1563 = EE_VCMP_GT_S32
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1562 = EE_VCMP_GT_S16
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1561 = EE_VCMP_EQ_S8
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1560 = EE_VCMP_EQ_S32
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1559 = EE_VCMP_EQ_S16
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1558 = EE_VADDS_S8_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1557 = EE_VADDS_S8_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1556 = EE_VADDS_S8
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1555 = EE_VADDS_S32_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1554 = EE_VADDS_S32_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1553 = EE_VADDS_S32
  { 6, &XtensaDescs.OperandInfo[713] },  // Inst #1552 = EE_VADDS_S16_ST_INCP
  { 6, &XtensaDescs.OperandInfo[707] },  // Inst #1551 = EE_VADDS_S16_LD_INCP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1550 = EE_VADDS_S16
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1549 = EE_ST_UA_STATE_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1548 = EE_ST_QACC_L_L_128_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1547 = EE_ST_QACC_L_H_32_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1546 = EE_ST_QACC_H_L_128_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1545 = EE_ST_QACC_H_H_32_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1544 = EE_ST_ACCX_IP
  { 5, &XtensaDescs.OperandInfo[627] },  // Inst #1543 = EE_STXQ_32
  { 5, &XtensaDescs.OperandInfo[702] },  // Inst #1542 = EE_STF_64_XP
  { 5, &XtensaDescs.OperandInfo[697] },  // Inst #1541 = EE_STF_64_IP
  { 7, &XtensaDescs.OperandInfo[690] },  // Inst #1540 = EE_STF_128_XP
  { 7, &XtensaDescs.OperandInfo[683] },  // Inst #1539 = EE_STF_128_IP
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1538 = EE_SRS_ACCX
  { 4, &XtensaDescs.OperandInfo[679] },  // Inst #1537 = EE_SRC_Q_QUP
  { 7, &XtensaDescs.OperandInfo[672] },  // Inst #1536 = EE_SRC_Q_LD_XP
  { 7, &XtensaDescs.OperandInfo[665] },  // Inst #1535 = EE_SRC_Q_LD_IP
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1534 = EE_SRC_Q
  { 7, &XtensaDescs.OperandInfo[654] },  // Inst #1533 = EE_SRCXXP_2Q
  { 4, &XtensaDescs.OperandInfo[661] },  // Inst #1532 = EE_SRCQ_128_ST_INCP
  { 3, &XtensaDescs.OperandInfo[643] },  // Inst #1531 = EE_SRCMB_S8_QACC
  { 3, &XtensaDescs.OperandInfo[643] },  // Inst #1530 = EE_SRCMB_S16_QACC
  { 5, &XtensaDescs.OperandInfo[649] },  // Inst #1529 = EE_SRCI_2Q
  { 7, &XtensaDescs.OperandInfo[654] },  // Inst #1528 = EE_SLCXXP_2Q
  { 5, &XtensaDescs.OperandInfo[649] },  // Inst #1527 = EE_SLCI_2Q
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1526 = EE_SET_BIT_GPIO_OUT
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1525 = EE_ORQ
  { 2, &XtensaDescs.OperandInfo[647] },  // Inst #1524 = EE_NOTQ
  { 1, &XtensaDescs.OperandInfo[646] },  // Inst #1523 = EE_MOV_U8_QACC
  { 1, &XtensaDescs.OperandInfo[646] },  // Inst #1522 = EE_MOV_U16_QACC
  { 1, &XtensaDescs.OperandInfo[646] },  // Inst #1521 = EE_MOV_S8_QACC
  { 1, &XtensaDescs.OperandInfo[646] },  // Inst #1520 = EE_MOV_S16_QACC
  { 3, &XtensaDescs.OperandInfo[643] },  // Inst #1519 = EE_MOVI_32_Q
  { 3, &XtensaDescs.OperandInfo[640] },  // Inst #1518 = EE_MOVI_32_A
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1517 = EE_LD_UA_STATE_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1516 = EE_LD_QACC_L_L_128_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1515 = EE_LD_QACC_L_H_32_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1514 = EE_LD_QACC_H_L_128_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1513 = EE_LD_QACC_H_H_32_IP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1512 = EE_LD_ACCX_IP
  { 4, &XtensaDescs.OperandInfo[636] },  // Inst #1511 = EE_LD_128_USAR_XP
  { 4, &XtensaDescs.OperandInfo[632] },  // Inst #1510 = EE_LD_128_USAR_IP
  { 5, &XtensaDescs.OperandInfo[627] },  // Inst #1509 = EE_LDXQ_32
  { 3, &XtensaDescs.OperandInfo[624] },  // Inst #1508 = EE_LDQA_U8_128_XP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1507 = EE_LDQA_U8_128_IP
  { 3, &XtensaDescs.OperandInfo[624] },  // Inst #1506 = EE_LDQA_U16_128_XP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1505 = EE_LDQA_U16_128_IP
  { 3, &XtensaDescs.OperandInfo[624] },  // Inst #1504 = EE_LDQA_S8_128_XP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1503 = EE_LDQA_S8_128_IP
  { 3, &XtensaDescs.OperandInfo[624] },  // Inst #1502 = EE_LDQA_S16_128_XP
  { 3, &XtensaDescs.OperandInfo[621] },  // Inst #1501 = EE_LDQA_S16_128_IP
  { 5, &XtensaDescs.OperandInfo[616] },  // Inst #1500 = EE_LDF_64_XP
  { 5, &XtensaDescs.OperandInfo[611] },  // Inst #1499 = EE_LDF_64_IP
  { 7, &XtensaDescs.OperandInfo[604] },  // Inst #1498 = EE_LDF_128_XP
  { 7, &XtensaDescs.OperandInfo[597] },  // Inst #1497 = EE_LDF_128_IP
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1496 = EE_GET_GPIO_IN
  { 4, &XtensaDescs.OperandInfo[593] },  // Inst #1495 = EE_FFT_VST_R32_DECP
  { 6, &XtensaDescs.OperandInfo[587] },  // Inst #1494 = EE_FFT_R2BF_S16_ST_INCP
  { 5, &XtensaDescs.OperandInfo[582] },  // Inst #1493 = EE_FFT_R2BF_S16
  { 9, &XtensaDescs.OperandInfo[573] },  // Inst #1492 = EE_FFT_CMUL_S16_ST_XP
  { 8, &XtensaDescs.OperandInfo[565] },  // Inst #1491 = EE_FFT_CMUL_S16_LD_XP
  { 10, &XtensaDescs.OperandInfo[555] },  // Inst #1490 = EE_FFT_AMS_S16_ST_INCP
  { 9, &XtensaDescs.OperandInfo[546] },  // Inst #1489 = EE_FFT_AMS_S16_LD_R32_DECP
  { 9, &XtensaDescs.OperandInfo[546] },  // Inst #1488 = EE_FFT_AMS_S16_LD_INCP_UAUP
  { 9, &XtensaDescs.OperandInfo[546] },  // Inst #1487 = EE_FFT_AMS_S16_LD_INCP
  { 7, &XtensaDescs.OperandInfo[539] },  // Inst #1486 = EE_CMUL_S16_ST_INCP
  { 7, &XtensaDescs.OperandInfo[532] },  // Inst #1485 = EE_CMUL_S16_LD_INCP
  { 4, &XtensaDescs.OperandInfo[528] },  // Inst #1484 = EE_CMUL_S16
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1483 = EE_CLR_BIT_GPIO_OUT
  { 3, &XtensaDescs.OperandInfo[525] },  // Inst #1482 = EE_BITREV
  { 3, &XtensaDescs.OperandInfo[522] },  // Inst #1481 = EE_ANDQ
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1480 = DSYNC
  { 4, &XtensaDescs.OperandInfo[518] },  // Inst #1479 = DIVN_S
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #1478 = DIV0_S
  { 2, &XtensaDescs.OperandInfo[516] },  // Inst #1477 = CONST_S
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1476 = CLR_BIT_GPIO_OUT
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1475 = CLAMPS
  { 3, &XtensaDescs.OperandInfo[513] },  // Inst #1474 = CEIL_S
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1473 = CALLX8
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1472 = CALLX4
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1471 = CALLX12
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1470 = CALLX0
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1469 = CALL8
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1468 = CALL4
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1467 = CALL12
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1466 = CALL0
  { 2, &XtensaDescs.OperandInfo[511] },  // Inst #1465 = BT
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #1464 = BREAK_N
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #1463 = BREAK
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1462 = BNONE
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1461 = BNEZ
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1460 = BNEI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1459 = BNE
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1458 = BNALL
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1457 = BLTZ
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1456 = BLTUI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1455 = BLTU
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1454 = BLTI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1453 = BLT
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1452 = BGEZ
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1451 = BGEUI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1450 = BGEU
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1449 = BGEI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1448 = BGE
  { 2, &XtensaDescs.OperandInfo[511] },  // Inst #1447 = BF
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #1446 = BEQZ
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1445 = BEQI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1444 = BEQ
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1443 = BBSI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1442 = BBS
  { 3, &XtensaDescs.OperandInfo[508] },  // Inst #1441 = BBCI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1440 = BBC
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1439 = BANY
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #1438 = BALL
  { 2, &XtensaDescs.OperandInfo[503] },  // Inst #1437 = ANY8
  { 2, &XtensaDescs.OperandInfo[503] },  // Inst #1436 = ANY4
  { 3, &XtensaDescs.OperandInfo[505] },  // Inst #1435 = ANDBC
  { 3, &XtensaDescs.OperandInfo[505] },  // Inst #1434 = ANDB
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #1433 = AND
  { 2, &XtensaDescs.OperandInfo[503] },  // Inst #1432 = ALL8
  { 2, &XtensaDescs.OperandInfo[503] },  // Inst #1431 = ALL4
  { 1, &XtensaDescs.OperandInfo[502] },  // Inst #1430 = AE_ZALIGN64
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1429 = AE_XOR
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1428 = AE_VLES16C_IP
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1427 = AE_VLES16C_IC
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1426 = AE_VLES16C
  { 4, &XtensaDescs.OperandInfo[498] },  // Inst #1425 = AE_VLEL32T
  { 4, &XtensaDescs.OperandInfo[498] },  // Inst #1424 = AE_VLEL16T
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #1423 = AE_VLDSHT
  { 3, &XtensaDescs.OperandInfo[495] },  // Inst #1422 = AE_VLDL32T
  { 3, &XtensaDescs.OperandInfo[495] },  // Inst #1421 = AE_VLDL16T
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1420 = AE_VLDL16C_IP
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1419 = AE_VLDL16C_IC
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1418 = AE_VLDL16C
  { 4, &XtensaDescs.OperandInfo[481] },  // Inst #1417 = AE_TRUNCI32X2F64S
  { 4, &XtensaDescs.OperandInfo[481] },  // Inst #1416 = AE_TRUNCI32F64S_L
  { 4, &XtensaDescs.OperandInfo[491] },  // Inst #1415 = AE_TRUNCA32X2F64S
  { 4, &XtensaDescs.OperandInfo[491] },  // Inst #1414 = AE_TRUNCA32F64S_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1413 = AE_SUBADD32S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1412 = AE_SUBADD32
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1411 = AE_SUB64S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1410 = AE_SUB64
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1409 = AE_SUB32S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1408 = AE_SUB32
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1407 = AE_SUB24S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1406 = AE_SUB16S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1405 = AE_SUB16
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1404 = AE_SRLS64
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1403 = AE_SRLS32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1402 = AE_SRLS24
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1401 = AE_SRLI64
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1400 = AE_SRLI32
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1399 = AE_SRLI24
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1398 = AE_SRLA64
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1397 = AE_SRLA32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1396 = AE_SRAS64
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1395 = AE_SRAS32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1394 = AE_SRAS24
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1393 = AE_SRAI64
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1392 = AE_SRAI32R
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1391 = AE_SRAI32
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1390 = AE_SRAI24
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1389 = AE_SRAI16R
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1388 = AE_SRAI16
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1387 = AE_SRAA64
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1386 = AE_SRAA32S
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1385 = AE_SRAA32RS
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1384 = AE_SRAA32
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1383 = AE_SRAA16S
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1382 = AE_SRAA16RS
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1381 = AE_SRA64_32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1380 = AE_SLASSQ56S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1379 = AE_SLASQ56
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1378 = AE_SLAS64S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1377 = AE_SLAS64
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1376 = AE_SLAS32S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1375 = AE_SLAS32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1374 = AE_SLAS24S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1373 = AE_SLAS24
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1372 = AE_SLAISQ56S
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1371 = AE_SLAI64S
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1370 = AE_SLAI64
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1369 = AE_SLAI32S
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1368 = AE_SLAI32
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1367 = AE_SLAI24S
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1366 = AE_SLAI24
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1365 = AE_SLAI16S
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1364 = AE_SLAAQ56
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1363 = AE_SLAA64S
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1362 = AE_SLAA64
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1361 = AE_SLAA32S
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1360 = AE_SLAA32
  { 3, &XtensaDescs.OperandInfo[488] },  // Inst #1359 = AE_SLAA16S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1358 = AE_SHORTSWAP
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #1357 = AE_SHA32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1356 = AE_SEXT32X2D16_32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1355 = AE_SEXT32X2D16_10
  { 3, &XtensaDescs.OperandInfo[485] },  // Inst #1354 = AE_SEXT32
  { 4, &XtensaDescs.OperandInfo[481] },  // Inst #1353 = AE_SEL16I_N
  { 4, &XtensaDescs.OperandInfo[481] },  // Inst #1352 = AE_SEL16I
  { 3, &XtensaDescs.OperandInfo[358] },  // Inst #1351 = AE_SB_IP
  { 3, &XtensaDescs.OperandInfo[358] },  // Inst #1350 = AE_SB_IC
  { 4, &XtensaDescs.OperandInfo[477] },  // Inst #1349 = AE_SBI_IP
  { 4, &XtensaDescs.OperandInfo[477] },  // Inst #1348 = AE_SBI_IC
  { 4, &XtensaDescs.OperandInfo[477] },  // Inst #1347 = AE_SBI
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1346 = AE_SBF_IP
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1345 = AE_SBF_IC
  { 2, &XtensaDescs.OperandInfo[475] },  // Inst #1344 = AE_SBF
  { 3, &XtensaDescs.OperandInfo[358] },  // Inst #1343 = AE_SB
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1342 = AE_SATQ56S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1341 = AE_SAT48S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1340 = AE_SAT24S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1339 = AE_SAT16X4
  { 3, &XtensaDescs.OperandInfo[403] },  // Inst #1338 = AE_SALIGN64_I
  { 3, &XtensaDescs.OperandInfo[472] },  // Inst #1337 = AE_SA64POS_FP
  { 3, &XtensaDescs.OperandInfo[472] },  // Inst #1336 = AE_SA64NEG_FP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1335 = AE_SA32X2_RIP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1334 = AE_SA32X2_RIC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1333 = AE_SA32X2_IP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1332 = AE_SA32X2_IC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1331 = AE_SA32X2F24_RIP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1330 = AE_SA32X2F24_RIC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1329 = AE_SA32X2F24_IP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1328 = AE_SA32X2F24_IC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1327 = AE_SA24_L_RIP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1326 = AE_SA24_L_RIC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1325 = AE_SA24_L_IP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1324 = AE_SA24_L_IC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1323 = AE_SA24X2_RIP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1322 = AE_SA24X2_RIC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1321 = AE_SA24X2_IP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1320 = AE_SA24X2_IC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1319 = AE_SA16X4_RIP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1318 = AE_SA16X4_RIC
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1317 = AE_SA16X4_IP
  { 5, &XtensaDescs.OperandInfo[467] },  // Inst #1316 = AE_SA16X4_IC
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1315 = AE_S64_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1314 = AE_S64_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1313 = AE_S64_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1312 = AE_S64_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1311 = AE_S64_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1310 = AE_S32_L_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1309 = AE_S32_L_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1308 = AE_S32_L_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1307 = AE_S32_L_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1306 = AE_S32_L_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1305 = AE_S32X2_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1304 = AE_S32X2_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1303 = AE_S32X2_X
  { 3, &XtensaDescs.OperandInfo[460] },  // Inst #1302 = AE_S32X2_RIP
  { 3, &XtensaDescs.OperandInfo[460] },  // Inst #1301 = AE_S32X2_RIC
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1300 = AE_S32X2_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1299 = AE_S32X2_I
  { 4, &XtensaDescs.OperandInfo[463] },  // Inst #1298 = AE_S32X2RA64S_IP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1297 = AE_S32X2F24_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1296 = AE_S32X2F24_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1295 = AE_S32X2F24_X
  { 3, &XtensaDescs.OperandInfo[460] },  // Inst #1294 = AE_S32X2F24_RIP
  { 3, &XtensaDescs.OperandInfo[460] },  // Inst #1293 = AE_S32X2F24_RIC
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1292 = AE_S32X2F24_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1291 = AE_S32X2F24_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1290 = AE_S32RA64S_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1289 = AE_S32RA64S_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1288 = AE_S32RA64S_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1287 = AE_S32RA64S_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1286 = AE_S32RA64S_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1285 = AE_S32M_XU
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1284 = AE_S32M_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1283 = AE_S32M_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1282 = AE_S32M_IU
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1281 = AE_S32M_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1280 = AE_S32F24_L_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1279 = AE_S32F24_L_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1278 = AE_S32F24_L_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1277 = AE_S32F24_L_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1276 = AE_S32F24_L_I
  { 4, &XtensaDescs.OperandInfo[463] },  // Inst #1275 = AE_S24X2RA64S_IP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1274 = AE_S24RA64S_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1273 = AE_S24RA64S_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1272 = AE_S24RA64S_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1271 = AE_S24RA64S_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1270 = AE_S24RA64S_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1269 = AE_S16_0_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1268 = AE_S16_0_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1267 = AE_S16_0_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1266 = AE_S16_0_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1265 = AE_S16_0_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1264 = AE_S16X4_XP
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1263 = AE_S16X4_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1262 = AE_S16X4_X
  { 3, &XtensaDescs.OperandInfo[460] },  // Inst #1261 = AE_S16X4_RIP
  { 3, &XtensaDescs.OperandInfo[460] },  // Inst #1260 = AE_S16X4_RIC
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1259 = AE_S16X4_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1258 = AE_S16X4_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1257 = AE_S16X2M_XU
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1256 = AE_S16X2M_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1255 = AE_S16X2M_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1254 = AE_S16X2M_IU
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1253 = AE_S16X2M_I
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1252 = AE_S16M_L_XU
  { 4, &XtensaDescs.OperandInfo[456] },  // Inst #1251 = AE_S16M_L_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #1250 = AE_S16M_L_X
  { 4, &XtensaDescs.OperandInfo[452] },  // Inst #1249 = AE_S16M_L_IU
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #1248 = AE_S16M_L_I
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1247 = AE_ROUNDSQ32F48SYM
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1246 = AE_ROUNDSQ32F48ASYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1245 = AE_ROUNDSP16Q48X2SYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1244 = AE_ROUNDSP16Q48X2ASYM
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1243 = AE_ROUNDSP16F24SYM
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1242 = AE_ROUNDSP16F24ASYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1241 = AE_ROUND32X2F64SSYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1240 = AE_ROUND32X2F64SASYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1239 = AE_ROUND32X2F48SSYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1238 = AE_ROUND32X2F48SASYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1237 = AE_ROUND24X2F48SSYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1236 = AE_ROUND24X2F48SASYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1235 = AE_ROUND16X4F32SSYM
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1234 = AE_ROUND16X4F32SASYM
  { 4, &XtensaDescs.OperandInfo[448] },  // Inst #1233 = AE_PKSR32
  { 4, &XtensaDescs.OperandInfo[448] },  // Inst #1232 = AE_PKSR24
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1231 = AE_OR
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #1230 = AE_NSAZ32_L
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #1229 = AE_NSAZ16_0
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #1228 = AE_NSA64
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1227 = AE_NEG64S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1226 = AE_NEG64
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1225 = AE_NEG32S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1224 = AE_NEG32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1223 = AE_NEG24S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #1222 = AE_NEG16S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1221 = AE_NAND
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1220 = AE_MULZSSFD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1219 = AE_MULZSSFD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1218 = AE_MULZSSFD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1217 = AE_MULZSSFD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1216 = AE_MULZSSFD24_HL_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1215 = AE_MULZSSFD24_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1214 = AE_MULZSSFD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1213 = AE_MULZSSFD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1212 = AE_MULZSSFD16SS_33_22_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1211 = AE_MULZSSFD16SS_33_22
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1210 = AE_MULZSSFD16SS_13_02_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1209 = AE_MULZSSFD16SS_13_02
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1208 = AE_MULZSSFD16SS_11_00_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1207 = AE_MULZSSFD16SS_11_00
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1206 = AE_MULZSSD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1205 = AE_MULZSSD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1204 = AE_MULZSSD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1203 = AE_MULZSSD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1202 = AE_MULZSSD24_HL_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1201 = AE_MULZSSD24_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1200 = AE_MULZSSD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1199 = AE_MULZSSD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1198 = AE_MULZSAFD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1197 = AE_MULZSAFD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1196 = AE_MULZSAFD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1195 = AE_MULZSAFD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1194 = AE_MULZSAFD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1193 = AE_MULZSAFD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1192 = AE_MULZSAD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1191 = AE_MULZSAD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1190 = AE_MULZSAD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1189 = AE_MULZSAD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1188 = AE_MULZSAD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1187 = AE_MULZSAD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1186 = AE_MULZASFD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1185 = AE_MULZASFD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1184 = AE_MULZASFD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1183 = AE_MULZASFD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1182 = AE_MULZASFD24_HL_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1181 = AE_MULZASFD24_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1180 = AE_MULZASFD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1179 = AE_MULZASFD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1178 = AE_MULZASD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1177 = AE_MULZASD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1176 = AE_MULZASD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1175 = AE_MULZASD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1174 = AE_MULZASD24_HL_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1173 = AE_MULZASD24_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1172 = AE_MULZASD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1171 = AE_MULZASD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1170 = AE_MULZAAFD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1169 = AE_MULZAAFD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1168 = AE_MULZAAFD32X16_H2_L3_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1167 = AE_MULZAAFD32X16_H2_L3
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1166 = AE_MULZAAFD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1165 = AE_MULZAAFD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1164 = AE_MULZAAFD32X16_H0_L1_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1163 = AE_MULZAAFD32X16_H0_L1
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1162 = AE_MULZAAFD24_HL_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1161 = AE_MULZAAFD24_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1160 = AE_MULZAAFD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1159 = AE_MULZAAFD24_HH_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1158 = AE_MULZAAFD16SS_33_22_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1157 = AE_MULZAAFD16SS_33_22
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1156 = AE_MULZAAFD16SS_13_02_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1155 = AE_MULZAAFD16SS_13_02
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1154 = AE_MULZAAFD16SS_11_00_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1153 = AE_MULZAAFD16SS_11_00
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1152 = AE_MULZAAD32X16_H3_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1151 = AE_MULZAAD32X16_H3_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1150 = AE_MULZAAD32X16_H2_L3_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1149 = AE_MULZAAD32X16_H2_L3
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1148 = AE_MULZAAD32X16_H1_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1147 = AE_MULZAAD32X16_H1_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1146 = AE_MULZAAD32X16_H0_L1_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1145 = AE_MULZAAD32X16_H0_L1
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1144 = AE_MULZAAD24_HL_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1143 = AE_MULZAAD24_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1142 = AE_MULZAAD24_HH_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1141 = AE_MULZAAD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1140 = AE_MULSSFD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1139 = AE_MULSSFD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1138 = AE_MULSSFD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1137 = AE_MULSSFD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1136 = AE_MULSSFD24_HL_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1135 = AE_MULSSFD24_HL_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1134 = AE_MULSSFD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1133 = AE_MULSSFD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1132 = AE_MULSSFD16SS_33_22_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1131 = AE_MULSSFD16SS_33_22
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1130 = AE_MULSSFD16SS_13_02_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1129 = AE_MULSSFD16SS_13_02
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1128 = AE_MULSSFD16SS_11_00_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1127 = AE_MULSSFD16SS_11_00
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1126 = AE_MULSSD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1125 = AE_MULSSD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1124 = AE_MULSSD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1123 = AE_MULSSD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1122 = AE_MULSSD24_HL_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1121 = AE_MULSSD24_HL_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1120 = AE_MULSSD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1119 = AE_MULSSD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1118 = AE_MULSS32F48P16S_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1117 = AE_MULSS32F48P16S_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1116 = AE_MULSS32F48P16S_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1115 = AE_MULSS32F48P16S_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1114 = AE_MULSS32F48P16S_HH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1113 = AE_MULSS32F48P16S_HH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1112 = AE_MULSRFQ32SP24S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1111 = AE_MULSRFQ32SP24S_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1110 = AE_MULSQ32SP16U_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1109 = AE_MULSQ32SP16S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1108 = AE_MULSP32X2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1107 = AE_MULSP32X16X2_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1106 = AE_MULSP32X16X2_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1105 = AE_MULSP24X2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1104 = AE_MULSP24X2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1103 = AE_MULSFQ32SP24S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1102 = AE_MULSFQ32SP24S_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1101 = AE_MULSFP32X2RS
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1100 = AE_MULSFP32X2RAS
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1099 = AE_MULSFP32X16X2RS_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1098 = AE_MULSFP32X16X2RS_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1097 = AE_MULSFP32X16X2RS_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1096 = AE_MULSFP32X16X2RS_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1095 = AE_MULSFP32X16X2RAS_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1094 = AE_MULSFP32X16X2RAS_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1093 = AE_MULSFP32X16X2RAS_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1092 = AE_MULSFP32X16X2RAS_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1091 = AE_MULSFP24X2R_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1090 = AE_MULSFP24X2RA_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1089 = AE_MULSFP24X2RA
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1088 = AE_MULSFP24X2R
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1087 = AE_MULSF48Q32SP16U_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1086 = AE_MULSF48Q32SP16U_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1085 = AE_MULSF48Q32SP16S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1084 = AE_MULSF48Q32SP16S_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1083 = AE_MULSF32X16_L3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1082 = AE_MULSF32X16_L3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1081 = AE_MULSF32X16_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1080 = AE_MULSF32X16_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1079 = AE_MULSF32X16_L1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1078 = AE_MULSF32X16_L1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1077 = AE_MULSF32X16_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1076 = AE_MULSF32X16_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1075 = AE_MULSF32X16_H3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1074 = AE_MULSF32X16_H3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1073 = AE_MULSF32X16_H2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1072 = AE_MULSF32X16_H2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1071 = AE_MULSF32X16_H1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1070 = AE_MULSF32X16_H1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1069 = AE_MULSF32X16_H0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1068 = AE_MULSF32X16_H0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1067 = AE_MULSF32S_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1066 = AE_MULSF32S_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1065 = AE_MULSF32S_HH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1064 = AE_MULSF32R_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1063 = AE_MULSF32R_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1062 = AE_MULSF32R_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1061 = AE_MULSF32R_HH
  { 6, &XtensaDescs.OperandInfo[426] },  // Inst #1060 = AE_MULSF16X4SS
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1059 = AE_MULSF16SS_33
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1058 = AE_MULSF16SS_32
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1057 = AE_MULSF16SS_31
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1056 = AE_MULSF16SS_30
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1055 = AE_MULSF16SS_22
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1054 = AE_MULSF16SS_21
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1053 = AE_MULSF16SS_20
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1052 = AE_MULSF16SS_11
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1051 = AE_MULSF16SS_10
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1050 = AE_MULSF16SS_00_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1049 = AE_MULSF16SS_00
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1048 = AE_MULSAFD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1047 = AE_MULSAFD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1046 = AE_MULSAFD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1045 = AE_MULSAFD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1044 = AE_MULSAFD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1043 = AE_MULSAFD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1042 = AE_MULSAD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1041 = AE_MULSAD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1040 = AE_MULSAD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1039 = AE_MULSAD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1038 = AE_MULSAD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1037 = AE_MULSAD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1036 = AE_MULS32_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1035 = AE_MULS32_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1034 = AE_MULS32_HH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1033 = AE_MULS32X16_L3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1032 = AE_MULS32X16_L3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1031 = AE_MULS32X16_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1030 = AE_MULS32X16_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1029 = AE_MULS32X16_L1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1028 = AE_MULS32X16_L1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1027 = AE_MULS32X16_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1026 = AE_MULS32X16_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1025 = AE_MULS32X16_H3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1024 = AE_MULS32X16_H3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1023 = AE_MULS32X16_H2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1022 = AE_MULS32X16_H2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1021 = AE_MULS32X16_H1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1020 = AE_MULS32X16_H1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1019 = AE_MULS32X16_H0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1018 = AE_MULS32X16_H0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #1017 = AE_MULS32U_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1016 = AE_MULS32F48P16S_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1015 = AE_MULS32F48P16S_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1014 = AE_MULS32F48P16S_LH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1013 = AE_MULS32F48P16S_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1012 = AE_MULS32F48P16S_HH_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1011 = AE_MULS32F48P16S_HH
  { 6, &XtensaDescs.OperandInfo[426] },  // Inst #1010 = AE_MULS16X4
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1009 = AE_MULRFQ32SP24S_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1008 = AE_MULRFQ32SP24S_H_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1007 = AE_MULQ32SP16U_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1006 = AE_MULQ32SP16S_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1005 = AE_MULP32X2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1004 = AE_MULP32X16X2_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1003 = AE_MULP32X16X2_H
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1002 = AE_MULP24X2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1001 = AE_MULP24X2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #1000 = AE_MULFQ32SP24S_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #999 = AE_MULFQ32SP24S_H_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #998 = AE_MULFP32X2RS
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #997 = AE_MULFP32X2RAS
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #996 = AE_MULFP32X16X2RS_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #995 = AE_MULFP32X16X2RS_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #994 = AE_MULFP32X16X2RS_H_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #993 = AE_MULFP32X16X2RS_H
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #992 = AE_MULFP32X16X2RAS_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #991 = AE_MULFP32X16X2RAS_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #990 = AE_MULFP32X16X2RAS_H_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #989 = AE_MULFP32X16X2RAS_H
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #988 = AE_MULFP24X2R_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #987 = AE_MULFP24X2RA_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #986 = AE_MULFP24X2RA
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #985 = AE_MULFP24X2R
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #984 = AE_MULFP16X4S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #983 = AE_MULFP16X4RAS
  { 5, &XtensaDescs.OperandInfo[443] },  // Inst #982 = AE_MULFD32X16X2_FIR_LL
  { 5, &XtensaDescs.OperandInfo[443] },  // Inst #981 = AE_MULFD32X16X2_FIR_LH
  { 5, &XtensaDescs.OperandInfo[443] },  // Inst #980 = AE_MULFD32X16X2_FIR_HL
  { 5, &XtensaDescs.OperandInfo[443] },  // Inst #979 = AE_MULFD32X16X2_FIR_HH
  { 5, &XtensaDescs.OperandInfo[443] },  // Inst #978 = AE_MULFD24X2_FIR_L
  { 5, &XtensaDescs.OperandInfo[443] },  // Inst #977 = AE_MULFD24X2_FIR_H
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #976 = AE_MULFC32X16RAS_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #975 = AE_MULFC32X16RAS_H
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #974 = AE_MULFC24RA
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #973 = AE_MULF48Q32SP16U_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #972 = AE_MULF48Q32SP16U_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #971 = AE_MULF48Q32SP16S_L_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #970 = AE_MULF48Q32SP16S_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #969 = AE_MULF32X16_L3_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #968 = AE_MULF32X16_L3
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #967 = AE_MULF32X16_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #966 = AE_MULF32X16_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #965 = AE_MULF32X16_L1_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #964 = AE_MULF32X16_L1
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #963 = AE_MULF32X16_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #962 = AE_MULF32X16_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #961 = AE_MULF32X16_H3_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #960 = AE_MULF32X16_H3
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #959 = AE_MULF32X16_H2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #958 = AE_MULF32X16_H2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #957 = AE_MULF32X16_H1_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #956 = AE_MULF32X16_H1
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #955 = AE_MULF32X16_H0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #954 = AE_MULF32X16_H0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #953 = AE_MULF32S_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #952 = AE_MULF32S_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #951 = AE_MULF32S_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #950 = AE_MULF32S_HH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #949 = AE_MULF32R_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #948 = AE_MULF32R_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #947 = AE_MULF32R_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #946 = AE_MULF32R_HH
  { 4, &XtensaDescs.OperandInfo[422] },  // Inst #945 = AE_MULF16X4SS
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #944 = AE_MULF16SS_33
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #943 = AE_MULF16SS_32
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #942 = AE_MULF16SS_31
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #941 = AE_MULF16SS_30
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #940 = AE_MULF16SS_22
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #939 = AE_MULF16SS_21
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #938 = AE_MULF16SS_20
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #937 = AE_MULF16SS_11
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #936 = AE_MULF16SS_10
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #935 = AE_MULF16SS_00_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #934 = AE_MULF16SS_00
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #933 = AE_MULC32X16_L
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #932 = AE_MULC32X16_H
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #931 = AE_MULC24
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #930 = AE_MULASFD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #929 = AE_MULASFD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #928 = AE_MULASFD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #927 = AE_MULASFD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #926 = AE_MULASFD24_HL_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #925 = AE_MULASFD24_HL_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #924 = AE_MULASFD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #923 = AE_MULASFD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #922 = AE_MULASD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #921 = AE_MULASD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #920 = AE_MULASD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #919 = AE_MULASD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #918 = AE_MULASD24_HL_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #917 = AE_MULASD24_HL_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #916 = AE_MULASD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #915 = AE_MULASD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #914 = AE_MULAS32F48P16S_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #913 = AE_MULAS32F48P16S_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #912 = AE_MULAS32F48P16S_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #911 = AE_MULAS32F48P16S_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #910 = AE_MULAS32F48P16S_HH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #909 = AE_MULAS32F48P16S_HH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #908 = AE_MULARFQ32SP24S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #907 = AE_MULARFQ32SP24S_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #906 = AE_MULAQ32SP16U_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #905 = AE_MULAQ32SP16S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #904 = AE_MULAP32X2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #903 = AE_MULAP32X16X2_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #902 = AE_MULAP32X16X2_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #901 = AE_MULAP24X2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #900 = AE_MULAP24X2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #899 = AE_MULAFQ32SP24S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #898 = AE_MULAFQ32SP24S_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #897 = AE_MULAFP32X2RS
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #896 = AE_MULAFP32X2RAS
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #895 = AE_MULAFP32X16X2RS_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #894 = AE_MULAFP32X16X2RS_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #893 = AE_MULAFP32X16X2RS_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #892 = AE_MULAFP32X16X2RS_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #891 = AE_MULAFP32X16X2RAS_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #890 = AE_MULAFP32X16X2RAS_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #889 = AE_MULAFP32X16X2RAS_H_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #888 = AE_MULAFP32X16X2RAS_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #887 = AE_MULAFP24X2R_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #886 = AE_MULAFP24X2RA_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #885 = AE_MULAFP24X2RA
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #884 = AE_MULAFP24X2R
  { 7, &XtensaDescs.OperandInfo[436] },  // Inst #883 = AE_MULAFD32X16X2_FIR_LL
  { 7, &XtensaDescs.OperandInfo[436] },  // Inst #882 = AE_MULAFD32X16X2_FIR_LH
  { 7, &XtensaDescs.OperandInfo[436] },  // Inst #881 = AE_MULAFD32X16X2_FIR_HL
  { 7, &XtensaDescs.OperandInfo[436] },  // Inst #880 = AE_MULAFD32X16X2_FIR_HH
  { 7, &XtensaDescs.OperandInfo[436] },  // Inst #879 = AE_MULAFD24X2_FIR_L
  { 7, &XtensaDescs.OperandInfo[436] },  // Inst #878 = AE_MULAFD24X2_FIR_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #877 = AE_MULAFC32X16RAS_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #876 = AE_MULAFC32X16RAS_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #875 = AE_MULAFC24RA
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #874 = AE_MULAF48Q32SP16U_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #873 = AE_MULAF48Q32SP16U_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #872 = AE_MULAF48Q32SP16S_L_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #871 = AE_MULAF48Q32SP16S_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #870 = AE_MULAF32X16_L3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #869 = AE_MULAF32X16_L3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #868 = AE_MULAF32X16_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #867 = AE_MULAF32X16_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #866 = AE_MULAF32X16_L1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #865 = AE_MULAF32X16_L1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #864 = AE_MULAF32X16_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #863 = AE_MULAF32X16_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #862 = AE_MULAF32X16_H3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #861 = AE_MULAF32X16_H3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #860 = AE_MULAF32X16_H2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #859 = AE_MULAF32X16_H2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #858 = AE_MULAF32X16_H1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #857 = AE_MULAF32X16_H1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #856 = AE_MULAF32X16_H0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #855 = AE_MULAF32X16_H0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #854 = AE_MULAF32S_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #853 = AE_MULAF32S_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #852 = AE_MULAF32S_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #851 = AE_MULAF32S_HH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #850 = AE_MULAF32R_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #849 = AE_MULAF32R_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #848 = AE_MULAF32R_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #847 = AE_MULAF32R_HH
  { 6, &XtensaDescs.OperandInfo[426] },  // Inst #846 = AE_MULAF16X4SS
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #845 = AE_MULAF16SS_33
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #844 = AE_MULAF16SS_32
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #843 = AE_MULAF16SS_31
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #842 = AE_MULAF16SS_30
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #841 = AE_MULAF16SS_22
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #840 = AE_MULAF16SS_21
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #839 = AE_MULAF16SS_20
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #838 = AE_MULAF16SS_11
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #837 = AE_MULAF16SS_10
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #836 = AE_MULAF16SS_00_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #835 = AE_MULAF16SS_00
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #834 = AE_MULAC32X16_L
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #833 = AE_MULAC32X16_H
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #832 = AE_MULAC24
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #831 = AE_MULAAFD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #830 = AE_MULAAFD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #829 = AE_MULAAFD32X16_H2_L3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #828 = AE_MULAAFD32X16_H2_L3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #827 = AE_MULAAFD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #826 = AE_MULAAFD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #825 = AE_MULAAFD32X16_H0_L1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #824 = AE_MULAAFD32X16_H0_L1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #823 = AE_MULAAFD24_HL_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #822 = AE_MULAAFD24_HL_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #821 = AE_MULAAFD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #820 = AE_MULAAFD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #819 = AE_MULAAFD16SS_33_22_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #818 = AE_MULAAFD16SS_33_22
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #817 = AE_MULAAFD16SS_13_02_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #816 = AE_MULAAFD16SS_13_02
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #815 = AE_MULAAFD16SS_11_00_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #814 = AE_MULAAFD16SS_11_00
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #813 = AE_MULAAD32X16_H3_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #812 = AE_MULAAD32X16_H3_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #811 = AE_MULAAD32X16_H2_L3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #810 = AE_MULAAD32X16_H2_L3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #809 = AE_MULAAD32X16_H1_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #808 = AE_MULAAD32X16_H1_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #807 = AE_MULAAD32X16_H0_L1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #806 = AE_MULAAD32X16_H0_L1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #805 = AE_MULAAD24_HL_LH_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #804 = AE_MULAAD24_HL_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #803 = AE_MULAAD24_HH_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #802 = AE_MULAAD24_HH_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #801 = AE_MULA32_LL_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #800 = AE_MULA32_LL
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #799 = AE_MULA32_LH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #798 = AE_MULA32_HH
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #797 = AE_MULA32X16_L3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #796 = AE_MULA32X16_L3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #795 = AE_MULA32X16_L2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #794 = AE_MULA32X16_L2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #793 = AE_MULA32X16_L1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #792 = AE_MULA32X16_L1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #791 = AE_MULA32X16_L0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #790 = AE_MULA32X16_L0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #789 = AE_MULA32X16_H3_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #788 = AE_MULA32X16_H3
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #787 = AE_MULA32X16_H2_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #786 = AE_MULA32X16_H2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #785 = AE_MULA32X16_H1_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #784 = AE_MULA32X16_H1
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #783 = AE_MULA32X16_H0_S2
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #782 = AE_MULA32X16_H0
  { 4, &XtensaDescs.OperandInfo[432] },  // Inst #781 = AE_MULA32U_LL
  { 6, &XtensaDescs.OperandInfo[426] },  // Inst #780 = AE_MULA16X4
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #779 = AE_MUL32_LL_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #778 = AE_MUL32_LL
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #777 = AE_MUL32_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #776 = AE_MUL32_HH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #775 = AE_MUL32X16_L3_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #774 = AE_MUL32X16_L3
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #773 = AE_MUL32X16_L2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #772 = AE_MUL32X16_L2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #771 = AE_MUL32X16_L1_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #770 = AE_MUL32X16_L1
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #769 = AE_MUL32X16_L0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #768 = AE_MUL32X16_L0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #767 = AE_MUL32X16_H3_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #766 = AE_MUL32X16_H3
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #765 = AE_MUL32X16_H2_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #764 = AE_MUL32X16_H2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #763 = AE_MUL32X16_H1_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #762 = AE_MUL32X16_H1
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #761 = AE_MUL32X16_H0_S2
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #760 = AE_MUL32X16_H0
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #759 = AE_MUL32U_LL
  { 4, &XtensaDescs.OperandInfo[422] },  // Inst #758 = AE_MUL16X4
  { 4, &XtensaDescs.OperandInfo[416] },  // Inst #757 = AE_MOVT64
  { 4, &XtensaDescs.OperandInfo[412] },  // Inst #756 = AE_MOVT32X2
  { 4, &XtensaDescs.OperandInfo[408] },  // Inst #755 = AE_MOVT16X4
  { 2, &XtensaDescs.OperandInfo[420] },  // Inst #754 = AE_MOVI
  { 4, &XtensaDescs.OperandInfo[416] },  // Inst #753 = AE_MOVF64
  { 4, &XtensaDescs.OperandInfo[412] },  // Inst #752 = AE_MOVF32X2
  { 4, &XtensaDescs.OperandInfo[408] },  // Inst #751 = AE_MOVF16X4
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #750 = AE_MOVDA32X2
  { 2, &XtensaDescs.OperandInfo[354] },  // Inst #749 = AE_MOVDA32
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #748 = AE_MOVDA16X2
  { 2, &XtensaDescs.OperandInfo[354] },  // Inst #747 = AE_MOVDA16
  { 2, &XtensaDescs.OperandInfo[406] },  // Inst #746 = AE_MOVALIGN
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #745 = AE_MOVAD32_L
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #744 = AE_MOVAD32_H
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #743 = AE_MOVAD16_3
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #742 = AE_MOVAD16_2
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #741 = AE_MOVAD16_1
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #740 = AE_MOVAD16_0
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #739 = AE_MOV
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #738 = AE_MINABS64S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #737 = AE_MINABS32S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #736 = AE_MIN64
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #735 = AE_MIN32
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #734 = AE_MAXABS64S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #733 = AE_MAXABS32S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #732 = AE_MAX64
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #731 = AE_MAX32
  { 3, &XtensaDescs.OperandInfo[373] },  // Inst #730 = AE_LT64
  { 3, &XtensaDescs.OperandInfo[370] },  // Inst #729 = AE_LT32
  { 3, &XtensaDescs.OperandInfo[367] },  // Inst #728 = AE_LT16
  { 3, &XtensaDescs.OperandInfo[373] },  // Inst #727 = AE_LE64
  { 3, &XtensaDescs.OperandInfo[370] },  // Inst #726 = AE_LE32
  { 3, &XtensaDescs.OperandInfo[367] },  // Inst #725 = AE_LE16
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #724 = AE_LBSI
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #723 = AE_LBS
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #722 = AE_LBKI
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #721 = AE_LBK
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #720 = AE_LBI
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #719 = AE_LB
  { 3, &XtensaDescs.OperandInfo[403] },  // Inst #718 = AE_LALIGN64_I
  { 2, &XtensaDescs.OperandInfo[401] },  // Inst #717 = AE_LA64_PP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #716 = AE_LA32X2_RIP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #715 = AE_LA32X2_RIC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #714 = AE_LA32X2_IP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #713 = AE_LA32X2_IC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #712 = AE_LA32X2POS_PC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #711 = AE_LA32X2NEG_PC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #710 = AE_LA32X2F24_RIP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #709 = AE_LA32X2F24_RIC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #708 = AE_LA32X2F24_IP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #707 = AE_LA32X2F24_IC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #706 = AE_LA24_RIP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #705 = AE_LA24_RIC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #704 = AE_LA24_IP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #703 = AE_LA24_IC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #702 = AE_LA24X2_RIP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #701 = AE_LA24X2_RIC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #700 = AE_LA24X2_IP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #699 = AE_LA24X2_IC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #698 = AE_LA24X2POS_PC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #697 = AE_LA24X2NEG_PC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #696 = AE_LA24POS_PC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #695 = AE_LA24NEG_PC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #694 = AE_LA16X4_RIP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #693 = AE_LA16X4_RIC
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #692 = AE_LA16X4_IP
  { 5, &XtensaDescs.OperandInfo[396] },  // Inst #691 = AE_LA16X4_IC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #690 = AE_LA16X4POS_PC
  { 3, &XtensaDescs.OperandInfo[393] },  // Inst #689 = AE_LA16X4NEG_PC
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #688 = AE_L64_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #687 = AE_L64_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #686 = AE_L64_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #685 = AE_L64_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #684 = AE_L64_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #683 = AE_L32_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #682 = AE_L32_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #681 = AE_L32_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #680 = AE_L32_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #679 = AE_L32_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #678 = AE_L32X2_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #677 = AE_L32X2_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #676 = AE_L32X2_X
  { 3, &XtensaDescs.OperandInfo[390] },  // Inst #675 = AE_L32X2_RIP
  { 3, &XtensaDescs.OperandInfo[390] },  // Inst #674 = AE_L32X2_RIC
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #673 = AE_L32X2_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #672 = AE_L32X2_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #671 = AE_L32X2F24_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #670 = AE_L32X2F24_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #669 = AE_L32X2F24_X
  { 3, &XtensaDescs.OperandInfo[390] },  // Inst #668 = AE_L32X2F24_RIP
  { 3, &XtensaDescs.OperandInfo[390] },  // Inst #667 = AE_L32X2F24_RIC
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #666 = AE_L32X2F24_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #665 = AE_L32X2F24_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #664 = AE_L32M_XU
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #663 = AE_L32M_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #662 = AE_L32M_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #661 = AE_L32M_IU
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #660 = AE_L32M_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #659 = AE_L32F24_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #658 = AE_L32F24_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #657 = AE_L32F24_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #656 = AE_L32F24_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #655 = AE_L32F24_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #654 = AE_L16_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #653 = AE_L16_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #652 = AE_L16_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #651 = AE_L16_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #650 = AE_L16_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #649 = AE_L16X4_XP
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #648 = AE_L16X4_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #647 = AE_L16X4_X
  { 3, &XtensaDescs.OperandInfo[390] },  // Inst #646 = AE_L16X4_RIP
  { 3, &XtensaDescs.OperandInfo[390] },  // Inst #645 = AE_L16X4_RIC
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #644 = AE_L16X4_IP
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #643 = AE_L16X4_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #642 = AE_L16X2M_XU
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #641 = AE_L16X2M_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #640 = AE_L16X2M_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #639 = AE_L16X2M_IU
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #638 = AE_L16X2M_I
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #637 = AE_L16M_XU
  { 4, &XtensaDescs.OperandInfo[386] },  // Inst #636 = AE_L16M_XC
  { 3, &XtensaDescs.OperandInfo[383] },  // Inst #635 = AE_L16M_X
  { 4, &XtensaDescs.OperandInfo[379] },  // Inst #634 = AE_L16M_IU
  { 3, &XtensaDescs.OperandInfo[376] },  // Inst #633 = AE_L16M_I
  { 3, &XtensaDescs.OperandInfo[373] },  // Inst #632 = AE_EQ64
  { 3, &XtensaDescs.OperandInfo[370] },  // Inst #631 = AE_EQ32
  { 3, &XtensaDescs.OperandInfo[367] },  // Inst #630 = AE_EQ16
  { 3, &XtensaDescs.OperandInfo[364] },  // Inst #629 = AE_DIV64D32_L
  { 3, &XtensaDescs.OperandInfo[364] },  // Inst #628 = AE_DIV64D32_H
  { 3, &XtensaDescs.OperandInfo[358] },  // Inst #627 = AE_DB_IP
  { 3, &XtensaDescs.OperandInfo[358] },  // Inst #626 = AE_DB_IC
  { 3, &XtensaDescs.OperandInfo[361] },  // Inst #625 = AE_DBI_IP
  { 3, &XtensaDescs.OperandInfo[361] },  // Inst #624 = AE_DBI_IC
  { 3, &XtensaDescs.OperandInfo[361] },  // Inst #623 = AE_DBI
  { 3, &XtensaDescs.OperandInfo[358] },  // Inst #622 = AE_DB
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #621 = AE_CVTQ56P32S_L
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #620 = AE_CVTQ56P32S_H
  { 2, &XtensaDescs.OperandInfo[354] },  // Inst #619 = AE_CVTQ56A32S
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #618 = AE_CVTA32F24S_L
  { 2, &XtensaDescs.OperandInfo[356] },  // Inst #617 = AE_CVTA32F24S_H
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #616 = AE_CVT64F32_H
  { 2, &XtensaDescs.OperandInfo[354] },  // Inst #615 = AE_CVT64A32
  { 2, &XtensaDescs.OperandInfo[354] },  // Inst #614 = AE_CVT48A32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #613 = AE_CVT32X2F16_32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #612 = AE_CVT32X2F16_10
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #611 = AE_AND
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #610 = AE_ADDSUB32S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #609 = AE_ADDSUB32
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #608 = AE_ADDBRBA32
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #607 = AE_ADD64S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #606 = AE_ADD64
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #605 = AE_ADD32_HL_LH
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #604 = AE_ADD32S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #603 = AE_ADD32
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #602 = AE_ADD24S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #601 = AE_ADD16S
  { 3, &XtensaDescs.OperandInfo[351] },  // Inst #600 = AE_ADD16
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #599 = AE_ABS64S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #598 = AE_ABS64
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #597 = AE_ABS32S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #596 = AE_ABS32
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #595 = AE_ABS24S
  { 2, &XtensaDescs.OperandInfo[349] },  // Inst #594 = AE_ABS16S
  { 3, &XtensaDescs.OperandInfo[346] },  // Inst #593 = ADD_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #592 = ADD_N
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #591 = ADDX8
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #590 = ADDX4
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #589 = ADDX2
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #588 = ADDMI
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #587 = ADDI_N
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #586 = ADDI
  { 3, &XtensaDescs.OperandInfo[343] },  // Inst #585 = ADDEXP_S
  { 3, &XtensaDescs.OperandInfo[343] },  // Inst #584 = ADDEXPM_S
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #583 = ADD
  { 2, &XtensaDescs.OperandInfo[341] },  // Inst #582 = ABS_S
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #581 = ABS
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #580 = mv_QR_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #579 = XSR_M3_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #578 = XSR_M2_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #577 = XSR_M1_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #576 = XSR_M0_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #575 = XSR_ACCLO_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #574 = XSR_ACCHI_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #573 = WSR_M3_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #572 = WSR_M2_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #571 = WSR_M1_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #570 = WSR_M0_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #569 = WSR_ACCLO_P
  { 1, &XtensaDescs.OperandInfo[340] },  // Inst #568 = WSR_ACCHI_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #567 = SRL_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #566 = SRA_P
  { 3, &XtensaDescs.OperandInfo[313] },  // Inst #565 = SPILL_BOOL
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #564 = SLL_P
  { 3, &XtensaDescs.OperandInfo[285] },  // Inst #563 = SLLI_BR_P
  { 6, &XtensaDescs.OperandInfo[334] },  // Inst #562 = SELECT_CC_INT_FP
  { 6, &XtensaDescs.OperandInfo[328] },  // Inst #561 = SELECT_CC_FP_INT
  { 6, &XtensaDescs.OperandInfo[322] },  // Inst #560 = SELECT_CC_FP_FP
  { 6, &XtensaDescs.OperandInfo[316] },  // Inst #559 = SELECT
  { 3, &XtensaDescs.OperandInfo[313] },  // Inst #558 = RESTORE_BOOL
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #557 = MULA_DD_LL_LDINC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #556 = MULA_DD_LL_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #555 = MULA_DD_LH_LDINC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #554 = MULA_DD_LH_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #553 = MULA_DD_HL_LDINC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #552 = MULA_DD_HL_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #551 = MULA_DD_HH_LDINC_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #550 = MULA_DD_HH_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #549 = MULA_DA_LL_LDINC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #548 = MULA_DA_LL_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #547 = MULA_DA_LH_LDINC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #546 = MULA_DA_LH_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #545 = MULA_DA_HL_LDINC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #544 = MULA_DA_HL_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #543 = MULA_DA_HH_LDINC_P
  { 4, &XtensaDescs.OperandInfo[309] },  // Inst #542 = MULA_DA_HH_LDDEC_P
  { 4, &XtensaDescs.OperandInfo[305] },  // Inst #541 = MOVBA_P2
  { 2, &XtensaDescs.OperandInfo[303] },  // Inst #540 = MOVBA_P
  { 4, &XtensaDescs.OperandInfo[299] },  // Inst #539 = MOVBA4_P2
  { 2, &XtensaDescs.OperandInfo[297] },  // Inst #538 = MOVBA4_P
  { 4, &XtensaDescs.OperandInfo[293] },  // Inst #537 = MOVBA2_P2
  { 2, &XtensaDescs.OperandInfo[291] },  // Inst #536 = MOVBA2_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #535 = LOOPSTART
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #534 = LOOPINIT
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #533 = LOOPEND
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #532 = LOOPDEC
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #531 = LOOPBR
  { 2, &XtensaDescs.OperandInfo[156] },  // Inst #530 = LDINC_P
  { 2, &XtensaDescs.OperandInfo[156] },  // Inst #529 = LDDEC_P
  { 3, &XtensaDescs.OperandInfo[288] },  // Inst #528 = L8I_P
  { 3, &XtensaDescs.OperandInfo[285] },  // Inst #527 = EXTUI_BR_P
  { 3, &XtensaDescs.OperandInfo[282] },  // Inst #526 = EXTUI_BR4_P
  { 3, &XtensaDescs.OperandInfo[279] },  // Inst #525 = EXTUI_BR2_P
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #524 = EE_ZERO_Q_P
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #523 = EE_ZERO_QACC_P
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #522 = EE_ZERO_ACCX_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #521 = EE_XORQ_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #520 = EE_VZIP_8_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #519 = EE_VZIP_32_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #518 = EE_VZIP_16_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #517 = EE_VUNZIP_8_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #516 = EE_VUNZIP_32_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #515 = EE_VUNZIP_16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #514 = EE_VSUBS_S8_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #513 = EE_VSUBS_S8_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #512 = EE_VSUBS_S8_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #511 = EE_VSUBS_S32_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #510 = EE_VSUBS_S32_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #509 = EE_VSUBS_S32_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #508 = EE_VSUBS_S16_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #507 = EE_VSUBS_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #506 = EE_VSUBS_S16_LD_INCP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #505 = EE_VST_L_64_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #504 = EE_VST_L_64_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #503 = EE_VST_H_64_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #502 = EE_VST_H_64_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #501 = EE_VST_128_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #500 = EE_VST_128_IP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #499 = EE_VSR_32_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #498 = EE_VSMULAS_S8_QACC_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #497 = EE_VSMULAS_S8_QACC_LD_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #496 = EE_VSMULAS_S16_QACC_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #495 = EE_VSMULAS_S16_QACC_LD_INCP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #494 = EE_VSL_32_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #493 = EE_VRELU_S8_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #492 = EE_VRELU_S16_P
  { 4, &XtensaDescs.OperandInfo[275] },  // Inst #491 = EE_VPRELU_S8_P
  { 4, &XtensaDescs.OperandInfo[275] },  // Inst #490 = EE_VPRELU_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #489 = EE_VMUL_U8_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #488 = EE_VMUL_U8_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #487 = EE_VMUL_U8_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #486 = EE_VMUL_U16_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #485 = EE_VMUL_U16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #484 = EE_VMUL_U16_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #483 = EE_VMUL_S8_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #482 = EE_VMUL_S8_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #481 = EE_VMUL_S8_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #480 = EE_VMUL_S16_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #479 = EE_VMUL_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #478 = EE_VMUL_S16_LD_INCP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #477 = EE_VMULAS_U8_QACC_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #476 = EE_VMULAS_U8_QACC_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #475 = EE_VMULAS_U8_QACC_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #474 = EE_VMULAS_U8_QACC_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #473 = EE_VMULAS_U8_QACC_LD_IP_P
  { 6, &XtensaDescs.OperandInfo[158] },  // Inst #472 = EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #471 = EE_VMULAS_U8_QACC_LDBC_INCP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #470 = EE_VMULAS_U8_ACCX_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #469 = EE_VMULAS_U8_ACCX_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #468 = EE_VMULAS_U8_ACCX_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #467 = EE_VMULAS_U8_ACCX_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #466 = EE_VMULAS_U8_ACCX_LD_IP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #465 = EE_VMULAS_U16_QACC_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #464 = EE_VMULAS_U16_QACC_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #463 = EE_VMULAS_U16_QACC_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #462 = EE_VMULAS_U16_QACC_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #461 = EE_VMULAS_U16_QACC_LD_IP_P
  { 6, &XtensaDescs.OperandInfo[158] },  // Inst #460 = EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #459 = EE_VMULAS_U16_QACC_LDBC_INCP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #458 = EE_VMULAS_U16_ACCX_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #457 = EE_VMULAS_U16_ACCX_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #456 = EE_VMULAS_U16_ACCX_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #455 = EE_VMULAS_U16_ACCX_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #454 = EE_VMULAS_U16_ACCX_LD_IP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #453 = EE_VMULAS_S8_QACC_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #452 = EE_VMULAS_S8_QACC_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #451 = EE_VMULAS_S8_QACC_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #450 = EE_VMULAS_S8_QACC_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #449 = EE_VMULAS_S8_QACC_LD_IP_P
  { 6, &XtensaDescs.OperandInfo[158] },  // Inst #448 = EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #447 = EE_VMULAS_S8_QACC_LDBC_INCP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #446 = EE_VMULAS_S8_ACCX_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #445 = EE_VMULAS_S8_ACCX_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #444 = EE_VMULAS_S8_ACCX_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #443 = EE_VMULAS_S8_ACCX_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #442 = EE_VMULAS_S8_ACCX_LD_IP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #441 = EE_VMULAS_S16_QACC_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #440 = EE_VMULAS_S16_QACC_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #439 = EE_VMULAS_S16_QACC_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #438 = EE_VMULAS_S16_QACC_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #437 = EE_VMULAS_S16_QACC_LD_IP_P
  { 6, &XtensaDescs.OperandInfo[158] },  // Inst #436 = EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
  { 4, &XtensaDescs.OperandInfo[271] },  // Inst #435 = EE_VMULAS_S16_QACC_LDBC_INCP_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #434 = EE_VMULAS_S16_ACCX_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #433 = EE_VMULAS_S16_ACCX_LD_XP_QUP_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #432 = EE_VMULAS_S16_ACCX_LD_XP_P
  { 7, &XtensaDescs.OperandInfo[264] },  // Inst #431 = EE_VMULAS_S16_ACCX_LD_IP_QUP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #430 = EE_VMULAS_S16_ACCX_LD_IP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #429 = EE_VMIN_S8_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #428 = EE_VMIN_S8_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #427 = EE_VMIN_S8_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #426 = EE_VMIN_S32_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #425 = EE_VMIN_S32_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #424 = EE_VMIN_S32_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #423 = EE_VMIN_S16_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #422 = EE_VMIN_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #421 = EE_VMIN_S16_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #420 = EE_VMAX_S8_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #419 = EE_VMAX_S8_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #418 = EE_VMAX_S8_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #417 = EE_VMAX_S32_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #416 = EE_VMAX_S32_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #415 = EE_VMAX_S32_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #414 = EE_VMAX_S16_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #413 = EE_VMAX_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #412 = EE_VMAX_S16_LD_INCP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #411 = EE_VLD_L_64_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #410 = EE_VLD_L_64_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #409 = EE_VLD_H_64_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #408 = EE_VLD_H_64_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #407 = EE_VLD_128_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #406 = EE_VLD_128_IP_P
  { 3, &XtensaDescs.OperandInfo[248] },  // Inst #405 = EE_VLDHBC_16_INCP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #404 = EE_VLDBC_8_XP_P
  { 2, &XtensaDescs.OperandInfo[156] },  // Inst #403 = EE_VLDBC_8_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #402 = EE_VLDBC_8_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #401 = EE_VLDBC_32_XP_P
  { 2, &XtensaDescs.OperandInfo[156] },  // Inst #400 = EE_VLDBC_32_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #399 = EE_VLDBC_32_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #398 = EE_VLDBC_16_XP_P
  { 2, &XtensaDescs.OperandInfo[156] },  // Inst #397 = EE_VLDBC_16_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #396 = EE_VLDBC_16_IP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #395 = EE_VCMP_LT_S8_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #394 = EE_VCMP_LT_S32_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #393 = EE_VCMP_LT_S16_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #392 = EE_VCMP_GT_S8_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #391 = EE_VCMP_GT_S32_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #390 = EE_VCMP_GT_S16_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #389 = EE_VCMP_EQ_S8_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #388 = EE_VCMP_EQ_S32_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #387 = EE_VCMP_EQ_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #386 = EE_VADDS_S8_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #385 = EE_VADDS_S8_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #384 = EE_VADDS_S8_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #383 = EE_VADDS_S32_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #382 = EE_VADDS_S32_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #381 = EE_VADDS_S32_LD_INCP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #380 = EE_VADDS_S16_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #379 = EE_VADDS_S16_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #378 = EE_VADDS_S16_LD_INCP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #377 = EE_ST_UA_STATE_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #376 = EE_ST_QACC_L_L_128_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #375 = EE_ST_QACC_L_H_32_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #374 = EE_ST_QACC_H_L_128_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #373 = EE_ST_QACC_H_H_32_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #372 = EE_ST_ACCX_IP_P
  { 5, &XtensaDescs.OperandInfo[236] },  // Inst #371 = EE_STXQ_32_P
  { 4, &XtensaDescs.OperandInfo[228] },  // Inst #370 = EE_STF_64_XP_P
  { 4, &XtensaDescs.OperandInfo[224] },  // Inst #369 = EE_STF_64_IP_P
  { 6, &XtensaDescs.OperandInfo[218] },  // Inst #368 = EE_STF_128_XP_P
  { 6, &XtensaDescs.OperandInfo[212] },  // Inst #367 = EE_STF_128_IP_P
  { 3, &XtensaDescs.OperandInfo[261] },  // Inst #366 = EE_SRS_ACCX_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #365 = EE_SRC_Q_QUP_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #364 = EE_SRC_Q_P
  { 5, &XtensaDescs.OperandInfo[256] },  // Inst #363 = EE_SRC_Q_LD_XP_P
  { 5, &XtensaDescs.OperandInfo[251] },  // Inst #362 = EE_SRC_Q_LD_IP_P
  { 4, &XtensaDescs.OperandInfo[244] },  // Inst #361 = EE_SRCXXP_2Q_P
  { 3, &XtensaDescs.OperandInfo[248] },  // Inst #360 = EE_SRCQ_128_ST_INCP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #359 = EE_SRCMB_S8_QACC_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #358 = EE_SRCMB_S16_QACC_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #357 = EE_SRCI_2Q_P
  { 4, &XtensaDescs.OperandInfo[244] },  // Inst #356 = EE_SLCXXP_2Q_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #355 = EE_SLCI_2Q_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #354 = EE_ORQ_P
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #353 = EE_NOTQ_P
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #352 = EE_MOV_U8_QACC_P
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #351 = EE_MOV_U16_QACC_P
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #350 = EE_MOV_S8_QACC_P
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #349 = EE_MOV_S16_QACC_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #348 = EE_MOVI_32_Q_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #347 = EE_MOVI_32_A_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #346 = EE_LD_UA_STATE_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #345 = EE_LD_QACC_L_L_128_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #344 = EE_LD_QACC_L_H_32_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #343 = EE_LD_QACC_H_L_128_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #342 = EE_LD_QACC_H_H_32_IP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #341 = EE_LD_ACCX_IP_P
  { 3, &XtensaDescs.OperandInfo[241] },  // Inst #340 = EE_LD_128_USAR_XP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #339 = EE_LD_128_USAR_IP_P
  { 5, &XtensaDescs.OperandInfo[236] },  // Inst #338 = EE_LDXQ_32_P
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #337 = EE_LDQA_U8_128_XP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #336 = EE_LDQA_U8_128_IP_P
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #335 = EE_LDQA_U16_128_XP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #334 = EE_LDQA_U16_128_IP_P
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #333 = EE_LDQA_S8_128_XP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #332 = EE_LDQA_S8_128_IP_P
  { 2, &XtensaDescs.OperandInfo[234] },  // Inst #331 = EE_LDQA_S16_128_XP_P
  { 2, &XtensaDescs.OperandInfo[232] },  // Inst #330 = EE_LDQA_S16_128_IP_P
  { 4, &XtensaDescs.OperandInfo[228] },  // Inst #329 = EE_LDF_64_XP_P
  { 4, &XtensaDescs.OperandInfo[224] },  // Inst #328 = EE_LDF_64_IP_P
  { 6, &XtensaDescs.OperandInfo[218] },  // Inst #327 = EE_LDF_128_XP_P
  { 6, &XtensaDescs.OperandInfo[212] },  // Inst #326 = EE_LDF_128_IP_P
  { 3, &XtensaDescs.OperandInfo[209] },  // Inst #325 = EE_FFT_VST_R32_DECP_P
  { 5, &XtensaDescs.OperandInfo[204] },  // Inst #324 = EE_FFT_R2BF_S16_ST_INCP_P
  { 5, &XtensaDescs.OperandInfo[199] },  // Inst #323 = EE_FFT_R2BF_S16_P
  { 8, &XtensaDescs.OperandInfo[191] },  // Inst #322 = EE_FFT_CMUL_S16_ST_XP_P
  { 7, &XtensaDescs.OperandInfo[184] },  // Inst #321 = EE_FFT_CMUL_S16_LD_XP_P
  { 8, &XtensaDescs.OperandInfo[176] },  // Inst #320 = EE_FFT_AMS_S16_ST_INCP_P
  { 8, &XtensaDescs.OperandInfo[168] },  // Inst #319 = EE_FFT_AMS_S16_LD_R32_DECP_P
  { 8, &XtensaDescs.OperandInfo[168] },  // Inst #318 = EE_FFT_AMS_S16_LD_INCP_UAUP_P
  { 8, &XtensaDescs.OperandInfo[168] },  // Inst #317 = EE_FFT_AMS_S16_LD_INCP_P
  { 6, &XtensaDescs.OperandInfo[158] },  // Inst #316 = EE_CMUL_S16_ST_INCP_P
  { 4, &XtensaDescs.OperandInfo[164] },  // Inst #315 = EE_CMUL_S16_P
  { 6, &XtensaDescs.OperandInfo[158] },  // Inst #314 = EE_CMUL_S16_LD_INCP_P
  { 2, &XtensaDescs.OperandInfo[156] },  // Inst #313 = EE_BITREV_P
  { 3, &XtensaDescs.OperandInfo[153] },  // Inst #312 = EE_ANDQ_P
  { 3, &XtensaDescs.OperandInfo[2] },  // Inst #311 = CONSTPOOL_ENTRY
  { 2, &XtensaDescs.OperandInfo[151] },  // Inst #310 = BR_JT
  { 4, &XtensaDescs.OperandInfo[147] },  // Inst #309 = BRCC_FP
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #308 = ATOMIC_SWAP_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #307 = ATOMIC_SWAP_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #306 = ATOMIC_SWAP_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #305 = ATOMIC_LOAD_XOR_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #304 = ATOMIC_LOAD_XOR_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #303 = ATOMIC_LOAD_XOR_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #302 = ATOMIC_LOAD_UMIN_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #301 = ATOMIC_LOAD_UMIN_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #300 = ATOMIC_LOAD_UMIN_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #299 = ATOMIC_LOAD_UMAX_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #298 = ATOMIC_LOAD_UMAX_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #297 = ATOMIC_LOAD_UMAX_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #296 = ATOMIC_LOAD_SUB_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #295 = ATOMIC_LOAD_SUB_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #294 = ATOMIC_LOAD_SUB_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #293 = ATOMIC_LOAD_OR_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #292 = ATOMIC_LOAD_OR_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #291 = ATOMIC_LOAD_OR_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #290 = ATOMIC_LOAD_NAND_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #289 = ATOMIC_LOAD_NAND_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #288 = ATOMIC_LOAD_NAND_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #287 = ATOMIC_LOAD_MIN_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #286 = ATOMIC_LOAD_MIN_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #285 = ATOMIC_LOAD_MIN_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #284 = ATOMIC_LOAD_MAX_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #283 = ATOMIC_LOAD_MAX_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #282 = ATOMIC_LOAD_MAX_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #281 = ATOMIC_LOAD_AND_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #280 = ATOMIC_LOAD_AND_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #279 = ATOMIC_LOAD_AND_16_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #278 = ATOMIC_LOAD_ADD_8_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #277 = ATOMIC_LOAD_ADD_32_P
  { 3, &XtensaDescs.OperandInfo[144] },  // Inst #276 = ATOMIC_LOAD_ADD_16_P
  { 4, &XtensaDescs.OperandInfo[140] },  // Inst #275 = ATOMIC_CMP_SWAP_8_P
  { 4, &XtensaDescs.OperandInfo[140] },  // Inst #274 = ATOMIC_CMP_SWAP_32_P
  { 4, &XtensaDescs.OperandInfo[140] },  // Inst #273 = ATOMIC_CMP_SWAP_16_P
  { 2, &XtensaDescs.OperandInfo[21] },  // Inst #272 = ADJCALLSTACKUP
  { 2, &XtensaDescs.OperandInfo[21] },  // Inst #271 = ADJCALLSTACKDOWN
  { 4, &XtensaDescs.OperandInfo[136] },  // Inst #270 = G_UBFX
  { 4, &XtensaDescs.OperandInfo[136] },  // Inst #269 = G_SBFX
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #268 = G_VECREDUCE_UMIN
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #267 = G_VECREDUCE_UMAX
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #266 = G_VECREDUCE_SMIN
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #265 = G_VECREDUCE_SMAX
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #264 = G_VECREDUCE_XOR
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #263 = G_VECREDUCE_OR
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #262 = G_VECREDUCE_AND
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #261 = G_VECREDUCE_MUL
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #260 = G_VECREDUCE_ADD
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #259 = G_VECREDUCE_FMINIMUM
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #258 = G_VECREDUCE_FMAXIMUM
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #257 = G_VECREDUCE_FMIN
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #256 = G_VECREDUCE_FMAX
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #255 = G_VECREDUCE_FMUL
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #254 = G_VECREDUCE_FADD
  { 3, &XtensaDescs.OperandInfo[123] },  // Inst #253 = G_VECREDUCE_SEQ_FMUL
  { 3, &XtensaDescs.OperandInfo[123] },  // Inst #252 = G_VECREDUCE_SEQ_FADD
  { 3, &XtensaDescs.OperandInfo[53] },  // Inst #251 = G_BZERO
  { 4, &XtensaDescs.OperandInfo[132] },  // Inst #250 = G_MEMSET
  { 4, &XtensaDescs.OperandInfo[132] },  // Inst #249 = G_MEMMOVE
  { 3, &XtensaDescs.OperandInfo[123] },  // Inst #248 = G_MEMCPY_INLINE
  { 4, &XtensaDescs.OperandInfo[132] },  // Inst #247 = G_MEMCPY
  { 2, &XtensaDescs.OperandInfo[130] },  // Inst #246 = G_WRITE_REGISTER
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #245 = G_READ_REGISTER
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #244 = G_STRICT_FLDEXP
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #243 = G_STRICT_FSQRT
  { 4, &XtensaDescs.OperandInfo[46] },  // Inst #242 = G_STRICT_FMA
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #241 = G_STRICT_FREM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #240 = G_STRICT_FDIV
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #239 = G_STRICT_FMUL
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #238 = G_STRICT_FSUB
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #237 = G_STRICT_FADD
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #236 = G_STACKRESTORE
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #235 = G_STACKSAVE
  { 3, &XtensaDescs.OperandInfo[64] },  // Inst #234 = G_DYN_STACKALLOC
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #233 = G_JUMP_TABLE
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #232 = G_BLOCK_ADDR
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #231 = G_ADDRSPACE_CAST
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #230 = G_FNEARBYINT
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #229 = G_FRINT
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #228 = G_FFLOOR
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #227 = G_FSQRT
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #226 = G_FSIN
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #225 = G_FCOS
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #224 = G_FCEIL
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #223 = G_BITREVERSE
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #222 = G_BSWAP
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #221 = G_CTPOP
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #220 = G_CTLZ_ZERO_UNDEF
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #219 = G_CTLZ
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #218 = G_CTTZ_ZERO_UNDEF
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #217 = G_CTTZ
  { 4, &XtensaDescs.OperandInfo[126] },  // Inst #216 = G_SHUFFLE_VECTOR
  { 3, &XtensaDescs.OperandInfo[123] },  // Inst #215 = G_EXTRACT_VECTOR_ELT
  { 4, &XtensaDescs.OperandInfo[119] },  // Inst #214 = G_INSERT_VECTOR_ELT
  { 3, &XtensaDescs.OperandInfo[116] },  // Inst #213 = G_BRJT
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #212 = G_BR
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #211 = G_LLROUND
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #210 = G_LROUND
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #209 = G_ABS
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #208 = G_UMAX
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #207 = G_UMIN
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #206 = G_SMAX
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #205 = G_SMIN
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #204 = G_PTRMASK
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #203 = G_PTR_ADD
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #202 = G_RESET_FPMODE
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #201 = G_SET_FPMODE
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #200 = G_GET_FPMODE
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #199 = G_RESET_FPENV
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #198 = G_SET_FPENV
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #197 = G_GET_FPENV
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #196 = G_FMAXIMUM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #195 = G_FMINIMUM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #194 = G_FMAXNUM_IEEE
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #193 = G_FMINNUM_IEEE
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #192 = G_FMAXNUM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #191 = G_FMINNUM
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #190 = G_FCANONICALIZE
  { 3, &XtensaDescs.OperandInfo[93] },  // Inst #189 = G_IS_FPCLASS
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #188 = G_FCOPYSIGN
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #187 = G_FABS
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #186 = G_UITOFP
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #185 = G_SITOFP
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #184 = G_FPTOUI
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #183 = G_FPTOSI
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #182 = G_FPTRUNC
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #181 = G_FPEXT
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #180 = G_FNEG
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #179 = G_FFREXP
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #178 = G_FLDEXP
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #177 = G_FLOG10
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #176 = G_FLOG2
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #175 = G_FLOG
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #174 = G_FEXP10
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #173 = G_FEXP2
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #172 = G_FEXP
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #171 = G_FPOWI
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #170 = G_FPOW
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #169 = G_FREM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #168 = G_FDIV
  { 4, &XtensaDescs.OperandInfo[46] },  // Inst #167 = G_FMAD
  { 4, &XtensaDescs.OperandInfo[46] },  // Inst #166 = G_FMA
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #165 = G_FMUL
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #164 = G_FSUB
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #163 = G_FADD
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #162 = G_UDIVFIXSAT
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #161 = G_SDIVFIXSAT
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #160 = G_UDIVFIX
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #159 = G_SDIVFIX
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #158 = G_UMULFIXSAT
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #157 = G_SMULFIXSAT
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #156 = G_UMULFIX
  { 4, &XtensaDescs.OperandInfo[112] },  // Inst #155 = G_SMULFIX
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #154 = G_SSHLSAT
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #153 = G_USHLSAT
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #152 = G_SSUBSAT
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #151 = G_USUBSAT
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #150 = G_SADDSAT
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #149 = G_UADDSAT
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #148 = G_SMULH
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #147 = G_UMULH
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #146 = G_SMULO
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #145 = G_UMULO
  { 5, &XtensaDescs.OperandInfo[107] },  // Inst #144 = G_SSUBE
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #143 = G_SSUBO
  { 5, &XtensaDescs.OperandInfo[107] },  // Inst #142 = G_SADDE
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #141 = G_SADDO
  { 5, &XtensaDescs.OperandInfo[107] },  // Inst #140 = G_USUBE
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #139 = G_USUBO
  { 5, &XtensaDescs.OperandInfo[107] },  // Inst #138 = G_UADDE
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #137 = G_UADDO
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #136 = G_SELECT
  { 4, &XtensaDescs.OperandInfo[103] },  // Inst #135 = G_FCMP
  { 4, &XtensaDescs.OperandInfo[103] },  // Inst #134 = G_ICMP
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #133 = G_ROTL
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #132 = G_ROTR
  { 4, &XtensaDescs.OperandInfo[99] },  // Inst #131 = G_FSHR
  { 4, &XtensaDescs.OperandInfo[99] },  // Inst #130 = G_FSHL
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #129 = G_ASHR
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #128 = G_LSHR
  { 3, &XtensaDescs.OperandInfo[96] },  // Inst #127 = G_SHL
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #126 = G_ZEXT
  { 3, &XtensaDescs.OperandInfo[40] },  // Inst #125 = G_SEXT_INREG
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #124 = G_SEXT
  { 3, &XtensaDescs.OperandInfo[93] },  // Inst #123 = G_VAARG
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #122 = G_VASTART
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #121 = G_FCONSTANT
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #120 = G_CONSTANT
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #119 = G_TRUNC
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #118 = G_ANYEXT
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #117 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #116 = G_INTRINSIC_CONVERGENT
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #115 = G_INTRINSIC_W_SIDE_EFFECTS
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #114 = G_INTRINSIC
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #113 = G_INVOKE_REGION_START
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #112 = G_BRINDIRECT
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #111 = G_BRCOND
  { 4, &XtensaDescs.OperandInfo[89] },  // Inst #110 = G_PREFETCH
  { 2, &XtensaDescs.OperandInfo[21] },  // Inst #109 = G_FENCE
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #108 = G_ATOMICRMW_UDEC_WRAP
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #107 = G_ATOMICRMW_UINC_WRAP
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #106 = G_ATOMICRMW_FMIN
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #105 = G_ATOMICRMW_FMAX
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #104 = G_ATOMICRMW_FSUB
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #103 = G_ATOMICRMW_FADD
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #102 = G_ATOMICRMW_UMIN
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #101 = G_ATOMICRMW_UMAX
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #100 = G_ATOMICRMW_MIN
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #99 = G_ATOMICRMW_MAX
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #98 = G_ATOMICRMW_XOR
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #97 = G_ATOMICRMW_OR
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #96 = G_ATOMICRMW_NAND
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #95 = G_ATOMICRMW_AND
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #94 = G_ATOMICRMW_SUB
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #93 = G_ATOMICRMW_ADD
  { 3, &XtensaDescs.OperandInfo[86] },  // Inst #92 = G_ATOMICRMW_XCHG
  { 4, &XtensaDescs.OperandInfo[82] },  // Inst #91 = G_ATOMIC_CMPXCHG
  { 5, &XtensaDescs.OperandInfo[77] },  // Inst #90 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
  { 5, &XtensaDescs.OperandInfo[72] },  // Inst #89 = G_INDEXED_STORE
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #88 = G_STORE
  { 5, &XtensaDescs.OperandInfo[67] },  // Inst #87 = G_INDEXED_ZEXTLOAD
  { 5, &XtensaDescs.OperandInfo[67] },  // Inst #86 = G_INDEXED_SEXTLOAD
  { 5, &XtensaDescs.OperandInfo[67] },  // Inst #85 = G_INDEXED_LOAD
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #84 = G_ZEXTLOAD
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #83 = G_SEXTLOAD
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #82 = G_LOAD
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #81 = G_READCYCLECOUNTER
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #80 = G_INTRINSIC_ROUNDEVEN
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #79 = G_INTRINSIC_LRINT
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #78 = G_INTRINSIC_ROUND
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #77 = G_INTRINSIC_TRUNC
  { 3, &XtensaDescs.OperandInfo[64] },  // Inst #76 = G_INTRINSIC_FPTRUNC_ROUND
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #75 = G_CONSTANT_FOLD_BARRIER
  { 2, &XtensaDescs.OperandInfo[62] },  // Inst #74 = G_FREEZE
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #73 = G_BITCAST
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #72 = G_INTTOPTR
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #71 = G_PTRTOINT
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #70 = G_CONCAT_VECTORS
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #69 = G_BUILD_VECTOR_TRUNC
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #68 = G_BUILD_VECTOR
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #67 = G_MERGE_VALUES
  { 4, &XtensaDescs.OperandInfo[58] },  // Inst #66 = G_INSERT
  { 2, &XtensaDescs.OperandInfo[56] },  // Inst #65 = G_UNMERGE_VALUES
  { 3, &XtensaDescs.OperandInfo[53] },  // Inst #64 = G_EXTRACT
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #63 = G_CONSTANT_POOL
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #62 = G_GLOBAL_VALUE
  { 2, &XtensaDescs.OperandInfo[51] },  // Inst #61 = G_FRAME_INDEX
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #60 = G_PHI
  { 1, &XtensaDescs.OperandInfo[50] },  // Inst #59 = G_IMPLICIT_DEF
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #58 = G_XOR
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #57 = G_OR
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #56 = G_AND
  { 4, &XtensaDescs.OperandInfo[46] },  // Inst #55 = G_UDIVREM
  { 4, &XtensaDescs.OperandInfo[46] },  // Inst #54 = G_SDIVREM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #53 = G_UREM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #52 = G_SREM
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #51 = G_UDIV
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #50 = G_SDIV
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #49 = G_MUL
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #48 = G_SUB
  { 3, &XtensaDescs.OperandInfo[43] },  // Inst #47 = G_ADD
  { 3, &XtensaDescs.OperandInfo[40] },  // Inst #46 = G_ASSERT_ALIGN
  { 3, &XtensaDescs.OperandInfo[40] },  // Inst #45 = G_ASSERT_ZEXT
  { 3, &XtensaDescs.OperandInfo[40] },  // Inst #44 = G_ASSERT_SEXT
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #43 = JUMP_TABLE_DEBUG_INFO
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #42 = MEMBARRIER
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #41 = ICALL_BRANCH_FUNNEL
  { 3, &XtensaDescs.OperandInfo[37] },  // Inst #40 = PATCHABLE_TYPED_EVENT_CALL
  { 2, &XtensaDescs.OperandInfo[35] },  // Inst #39 = PATCHABLE_EVENT_CALL
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #38 = PATCHABLE_TAIL_CALL
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #37 = PATCHABLE_FUNCTION_EXIT
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #36 = PATCHABLE_RET
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #35 = PATCHABLE_FUNCTION_ENTER
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #34 = PATCHABLE_OP
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #33 = FAULTING_OP
  { 2, &XtensaDescs.OperandInfo[33] },  // Inst #32 = LOCAL_ESCAPE
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #31 = STATEPOINT
  { 3, &XtensaDescs.OperandInfo[30] },  // Inst #30 = PREALLOCATED_ARG
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #29 = PREALLOCATED_SETUP
  { 1, &XtensaDescs.OperandInfo[29] },  // Inst #28 = LOAD_STACK_GUARD
  { 6, &XtensaDescs.OperandInfo[23] },  // Inst #27 = PATCHPOINT
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #26 = FENTRY_CALL
  { 2, &XtensaDescs.OperandInfo[21] },  // Inst #25 = STACKMAP
  { 2, &XtensaDescs.OperandInfo[19] },  // Inst #24 = ARITH_FENCE
  { 4, &XtensaDescs.OperandInfo[15] },  // Inst #23 = PSEUDO_PROBE
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #22 = LIFETIME_END
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #21 = LIFETIME_START
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #20 = BUNDLE
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #19 = COPY
  { 2, &XtensaDescs.OperandInfo[13] },  // Inst #18 = REG_SEQUENCE
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #17 = DBG_LABEL
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #16 = DBG_PHI
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #15 = DBG_INSTR_REF
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #14 = DBG_VALUE_LIST
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #13 = DBG_VALUE
  { 3, &XtensaDescs.OperandInfo[2] },  // Inst #12 = COPY_TO_REGCLASS
  { 4, &XtensaDescs.OperandInfo[9] },  // Inst #11 = SUBREG_TO_REG
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #10 = IMPLICIT_DEF
  { 4, &XtensaDescs.OperandInfo[5] },  // Inst #9 = INSERT_SUBREG
  { 3, &XtensaDescs.OperandInfo[2] },  // Inst #8 = EXTRACT_SUBREG
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #7 = KILL
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #6 = ANNOTATION_LABEL
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #5 = GC_LABEL
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #4 = EH_LABEL
  { 1, &XtensaDescs.OperandInfo[1] },  // Inst #3 = CFI_INSTRUCTION
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #2 = INLINEASM_BR
  { 0, &XtensaDescs.OperandInfo[1] },  // Inst #1 = INLINEASM
  { 1, &XtensaDescs.OperandInfo[0] },  // Inst #0 = PHI
  }, {
    /* 0 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 1 */
    /* 1 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 2 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 5 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 9 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 13 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 15 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 19 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, CONSTRAINT_MCOI_TIED_TO(0) },
    /* 21 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 23 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 29 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 },
    /* 30 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 33 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 35 */ { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 37 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI_LookupPtrRegClass), MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 40 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
    /* 43 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 46 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 50 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 51 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 53 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
    /* 56 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 58 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
    /* 62 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 64 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 67 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 72 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 77 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 82 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 86 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 89 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 93 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 96 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 99 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 103 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 107 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 112 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
    /* 116 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 119 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 },
    /* 123 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 },
    /* 126 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 130 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 },
    /* 132 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_IMM_0, 0 },
    /* 136 */ { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 },
    /* 140 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 144 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 147 */ { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 151 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 153 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 156 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 158 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 164 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 168 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 176 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 184 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 191 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 199 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 204 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 209 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 212 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 218 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 224 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 228 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 232 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 234 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 236 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 241 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 244 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 248 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 251 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 256 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 261 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 264 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 271 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 275 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 279 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 282 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 285 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 288 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_MEMORY, 0 }, { -1, 0, MCOI_OPERAND_MEMORY, 0 },
    /* 291 */ { Xtensa_BR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 293 */ { Xtensa_BR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 297 */ { Xtensa_BR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 299 */ { Xtensa_BR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 303 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 305 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 309 */ { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 313 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_MEMORY, 0 }, { -1, 0, MCOI_OPERAND_MEMORY, 0 },
    /* 316 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 322 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 328 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 334 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 },
    /* 340 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 341 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 343 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 346 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 349 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 351 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 354 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 356 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 358 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 361 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 364 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 367 */ { Xtensa_BR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 370 */ { Xtensa_BR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 373 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 376 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 379 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 383 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 386 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 390 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
    /* 393 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
    /* 396 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) },
    /* 401 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 403 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 406 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 408 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BR4RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 412 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BR2RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 416 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 420 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 422 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 426 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 432 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 436 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 443 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 448 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 452 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 456 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 460 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
    /* 463 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
    /* 467 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
    /* 472 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 475 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
    /* 477 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 481 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 485 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 488 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 491 */ { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_AE_DRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 495 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 498 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 502 */ { Xtensa_AE_VALIGNRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 503 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 505 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 508 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 511 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 513 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 516 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 518 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 522 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 525 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
    /* 528 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 532 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 539 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 546 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 555 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 565 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 573 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 582 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 587 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 593 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 597 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(4) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 604 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(4) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 611 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 616 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 621 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 624 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 627 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 632 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 636 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 640 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 643 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 646 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 647 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 649 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 654 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 661 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) },
    /* 665 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 672 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 679 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 683 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 690 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 697 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 702 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 707 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 713 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 719 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 721 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) },
    /* 725 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 731 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 740 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 746 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 755 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 760 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(2) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 768 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 772 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 776 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 779 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 785 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 789 */ { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_QRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
    /* 793 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 797 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 800 */ { Xtensa_MRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
    /* 803 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_MEMORY, 0 }, { -1, 0, MCOI_OPERAND_MEMORY, 0 },
    /* 806 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 810 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 813 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 817 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 821 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 825 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 829 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 833 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_MR23RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 835 */ { Xtensa_MR01RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 837 */ { Xtensa_MRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_MR01RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 842 */ { Xtensa_MRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_MRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 847 */ { Xtensa_MR01RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_MR23RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 849 */ { Xtensa_MRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) }, { Xtensa_MR01RegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_MR23RegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 854 */ { Xtensa_BRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 857 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 859 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_SRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 861 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_URRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 863 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_MEMORY, 0 }, { -1, 0, MCOI_OPERAND_MEMORY, 0 },
    /* 867 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 },
    /* 871 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_EARLY_CLOBBER }, { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 875 */ { Xtensa_FPRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 877 */ { Xtensa_SRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 879 */ { Xtensa_URRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 },
    /* 881 */ { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_SRRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Xtensa_ARRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Xtensa_SRRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(1) },
  }, {
    /* 0 */
    /* 0 */ Xtensa_SP, Xtensa_SP,
    /* 2 */ Xtensa_BREG,
    /* 3 */ Xtensa_A0,
    /* 4 */ Xtensa_SP,
    /* 5 */ Xtensa_M1, Xtensa_M2, Xtensa_ACCLO, Xtensa_ACCHI,
    /* 9 */ Xtensa_ACCLO, Xtensa_ACCHI, Xtensa_M1, Xtensa_M2, Xtensa_ACCLO, Xtensa_ACCHI,
    /* 15 */ Xtensa_SCOMPARE1,
    /* 16 */ Xtensa_SAR,
    /* 17 */ Xtensa_FCR,
    /* 18 */ Xtensa_FSR,
  }
};

#endif // GET_INSTRINFO_MC_DESC

#ifdef GET_COMPUTE_FEATURES
#undef GET_COMPUTE_FEATURES

#endif // GET_COMPUTE_FEATURES

#ifdef GET_AVAILABLE_OPCODE_CHECKER
#undef GET_AVAILABLE_OPCODE_CHECKER

#endif // GET_AVAILABLE_OPCODE_CHECKER