From 1c5659b79ad7b6b415f5fdd475654e396d3407ef Mon Sep 17 00:00:00 2001 From: iris Date: Tue, 25 Aug 2026 12:35:58 +0200 Subject: [PATCH] name change --- Cargo.lock | 79 +++++++++++++++++++++++ Cargo.toml | 3 +- backend/Cargo.toml | 7 +++ backend/src/cpu/cpu.rs | 4 ++ backend/src/cpu/mod.rs | 5 ++ backend/src/cpu/registers.rs | 117 +++++++++++++++++++++++++++++++++++ backend/src/lib.rs | 36 +++++++++++ src/main.rs | 2 + 8 files changed, 252 insertions(+), 1 deletion(-) create mode 100644 Cargo.lock create mode 100644 backend/Cargo.toml create mode 100644 backend/src/cpu/cpu.rs create mode 100644 backend/src/cpu/mod.rs create mode 100644 backend/src/cpu/registers.rs create mode 100644 backend/src/lib.rs diff --git a/Cargo.lock b/Cargo.lock new file mode 100644 index 0000000..7924999 --- /dev/null +++ b/Cargo.lock @@ -0,0 +1,79 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 4 + +[[package]] +name = "backend" +version = "0.1.0" +dependencies = [ + "proc-bitfield", +] + +[[package]] +name = "proc-bitfield" +version = "0.5.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cb5041a3f8b230c2078ab917516d352f40625245d4c953472eacbe075051c4b7" +dependencies = [ + "proc-bitfield-macros", + "static_assertions", +] + +[[package]] +name = "proc-bitfield-macros" +version = "0.5.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9b34b74711e53c2ff9c879e7a22c6c8dbac847ef2b11c2d69296a890e12a243a" +dependencies = [ + "proc-macro2", + "quote", + "syn", +] + +[[package]] +name = "proc-macro2" +version = "1.0.107" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "985e7ec9bb745e6ce6535b544d84d6cd6f7ad8bd711c398938ae983b91a766d9" +dependencies = [ + "unicode-ident", +] + +[[package]] +name = "quote" +version = "1.0.47" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1fbf4db142a473a8d80c26bbf18454ed458bf8d26c8219c331daecfdbd079001" +dependencies = [ + "proc-macro2", +] + +[[package]] +name = "sixtyfou-rs" +version = "0.1.0" +dependencies = [ + "backend", +] + +[[package]] +name = "static_assertions" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" + +[[package]] +name = "syn" +version = "2.0.119" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "872831b642d1a07999a962a351ed35b955ea2cfc8f3862091e2a240a84f17297" +dependencies = [ + "proc-macro2", + "quote", + "unicode-ident", +] + +[[package]] +name = "unicode-ident" +version = "1.0.24" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e6e4313cd5fcd3dad5cafa179702e2b244f760991f45397d14d4ebf38247da75" diff --git a/Cargo.toml b/Cargo.toml index 6463587..833ac8f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,6 +1,7 @@ [package] -name = "rs64" +name = "sixtyfou-rs" version = "0.1.0" edition = "2024" [dependencies] +"backend" = {path = "backend/"} diff --git a/backend/Cargo.toml b/backend/Cargo.toml new file mode 100644 index 0000000..31e8ba8 --- /dev/null +++ b/backend/Cargo.toml @@ -0,0 +1,7 @@ +[package] +name = "backend" +version = "0.1.0" +edition = "2024" + +[dependencies] +proc-bitfield = "0.5.3" diff --git a/backend/src/cpu/cpu.rs b/backend/src/cpu/cpu.rs new file mode 100644 index 0000000..9610126 --- /dev/null +++ b/backend/src/cpu/cpu.rs @@ -0,0 +1,4 @@ +pub trait Cpu { + fn new() -> Self; + fn run(&mut self) -> Option; +} diff --git a/backend/src/cpu/mod.rs b/backend/src/cpu/mod.rs new file mode 100644 index 0000000..9f7734b --- /dev/null +++ b/backend/src/cpu/mod.rs @@ -0,0 +1,5 @@ +pub mod cpu; +pub mod registers; + +pub use cpu::*; +pub use registers::*; diff --git a/backend/src/cpu/registers.rs b/backend/src/cpu/registers.rs new file mode 100644 index 0000000..4b9b6a9 --- /dev/null +++ b/backend/src/cpu/registers.rs @@ -0,0 +1,117 @@ +pub struct Registers { + delay_slot: bool, + prev_delay_slot: bool, + pc: i64, + next_pc: i64, + old_pc: i64, + hi: i64, + lo: i64, + constant_regs: u64, + gpr: [i64; 32], +} + +impl Registers { + pub fn new() -> Self { + Self { + delay_slot: false, + prev_delay_slot: false, + pc: 0, + next_pc: 0, + old_pc: 0, + hi: 0, + lo: 0, + constant_regs: 1, + gpr: [0; 32], + } + } + + pub fn set_pc64(&mut self, val: i64) { + self.old_pc = self.pc; + self.pc = val; + self.next_pc = self.pc + 4; + } + + pub fn set_pc32(&mut self, val: i32) { + self.old_pc = self.pc; + self.pc = val as i64; + self.next_pc = self.pc + 4; + } + + pub fn read_u8(&self, idx: usize) -> u8 { + self.gpr[idx] as u8 + } + + pub fn read_i8(&self, idx: usize) -> i8 { + self.gpr[idx] as i8 + } + + pub fn read_u16(&self, idx: usize) -> u16 { + self.gpr[idx] as u16 + } + + pub fn read_u32(&self, idx: usize) -> u32 { + self.gpr[idx] as u32 + } + + pub fn read_i16(&self, idx: usize) -> i16 { + self.gpr[idx] as i16 + } + + pub fn read_i32(&self, idx: usize) -> i32 { + self.gpr[idx] as i32 + } + + pub fn write_u8(&mut self, idx: usize, val: u8) { + if idx == 0 { + return; + } + + self.constant_regs |= 1 << idx; + self.gpr[idx] = val as i64; + } + + pub fn write_i8(&mut self, idx: usize, val: i8) { + if idx == 0 { + return; + } + + self.constant_regs |= 1 << idx; + self.gpr[idx] = val as i64; + } + + pub fn write_u16(&mut self, idx: usize, val: u16) { + if idx == 0 { + return; + } + + self.constant_regs |= 1 << idx; + self.gpr[idx] = val as i64; + } + + pub fn write_u32(&mut self, idx: usize, val: u32) { + if idx == 0 { + return; + } + + self.constant_regs |= 1 << idx; + self.gpr[idx] = val as i64; + } + + pub fn write_i16(&mut self, idx: usize, val: i16) { + if idx == 0 { + return; + } + + self.constant_regs |= 1 << idx; + self.gpr[idx] = val as i64; + } + + pub fn write_i32(&mut self, idx: usize, val: i32) { + if idx == 0 { + return; + } + + self.constant_regs |= 1 << idx; + self.gpr[idx] = val as i64; + } +} diff --git a/backend/src/lib.rs b/backend/src/lib.rs new file mode 100644 index 0000000..4acd557 --- /dev/null +++ b/backend/src/lib.rs @@ -0,0 +1,36 @@ +use proc_bitfield::bitfield; + +bitfield! { + pub struct ImmediateType(pub u32) { + pub opcode: u8 @ 26..32, + pub rs: usize @ 21..26, + pub rt: usize @ 16..21, + pub imm: u16 @ 0..16 + } +} + +bitfield! { + pub struct JumpType(pub u32) { + pub opcode: u8 @ 26..32, + pub target: u32 @ 0..26 + } +} + +bitfield! { + pub struct RegisterType(pub u32) { + pub opcode: u8 @ 26..32, + pub rs: usize @ 21..26, + pub rt: usize @ 16..21, + pub rd: usize @ 11..16, + pub sa: u8 @ 6..11, + pub funct: u8 @ 0..6, + } +} + +pub enum Instruction { + IType(ImmediateType), + JType(JumpType), + RType(RegisterType), +} + +pub mod cpu; diff --git a/src/main.rs b/src/main.rs index e7a11a9..08c2b1d 100644 --- a/src/main.rs +++ b/src/main.rs @@ -1,3 +1,5 @@ +use backend::*; + fn main() { println!("Hello, world!"); }