test_cases:
  -
    input:
      bytes: [ 0x57, 0x05, 0x94, 0x04 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vandn.vv v10, v9, v8, v0.t"

  -
    input:
      bytes: [ 0x57, 0x45, 0x95, 0x04 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vandn.vx v10, v9, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x25, 0x94, 0x48 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vbrev8.v v10, v9, v0.t"

  -
    input:
      bytes: [ 0x57, 0xa5, 0x94, 0x48 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vrev8.v v10, v9, v0.t"

  -
    input:
      bytes: [ 0x57, 0x05, 0x94, 0x54 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vrol.vv v10, v9, v8, v0.t"

  -
    input:
      bytes: [ 0x57, 0x45, 0x95, 0x54 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vrol.vx v10, v9, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x05, 0x94, 0x50 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vror.vv v10, v9, v8, v0.t"

  -
    input:
      bytes: [ 0x57, 0x45, 0x95, 0x50 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vror.vx v10, v9, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0xb5, 0x90, 0x54 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV32", "zve32x", "zvkb" ]
    expected:
      insns:
        -
          asm_text: "vror.vi v10, v9, 33, v0.t"
