test_cases:
  -
    input:
      bytes: [ 0x00, 0x00, 0x40, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"

  -
    input:
      bytes: [ 0x45, 0x55, 0x55, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"

  -
    input:
      bytes: [ 0xa7, 0x6d, 0x48, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"

  -
    input:
      bytes: [ 0xef, 0x7f, 0x5f, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1h.h[w15, 7]}, p7/z, [sp]"

  -
    input:
      bytes: [ 0x25, 0x0e, 0x50, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0x04, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"

  -
    input:
      bytes: [ 0x68, 0x56, 0x54, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1h.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"

  -
    input:
      bytes: [ 0x80, 0x19, 0x42, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0x48, 0x5a, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"

  -
    input:
      bytes: [ 0xcd, 0x0a, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1h.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"

  -
    input:
      bytes: [ 0x22, 0x75, 0x41, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"

  -
    input:
      bytes: [ 0x87, 0x29, 0x4b, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"

  -
    input:
      bytes: [ 0x00, 0x00, 0x40, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"

  -
    input:
      bytes: [ 0x45, 0x55, 0x55, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"

  -
    input:
      bytes: [ 0xa7, 0x6d, 0x48, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"

  -
    input:
      bytes: [ 0xef, 0x7f, 0x5f, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1h.h[w15, 7]}, p7/z, [sp]"

  -
    input:
      bytes: [ 0x25, 0x0e, 0x50, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0x04, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"

  -
    input:
      bytes: [ 0x68, 0x56, 0x54, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1h.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"

  -
    input:
      bytes: [ 0x80, 0x19, 0x42, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0x48, 0x5a, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"

  -
    input:
      bytes: [ 0xcd, 0x0a, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1h.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"

  -
    input:
      bytes: [ 0x22, 0x75, 0x41, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"

  -
    input:
      bytes: [ 0x87, 0x29, 0x4b, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0h.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"

  -
    input:
      bytes: [ 0x00, 0x80, 0x40, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"

  -
    input:
      bytes: [ 0x45, 0xd5, 0x55, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"

  -
    input:
      bytes: [ 0xa7, 0xed, 0x48, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"

  -
    input:
      bytes: [ 0xef, 0xff, 0x5f, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1v.h[w15, 7]}, p7/z, [sp]"

  -
    input:
      bytes: [ 0x25, 0x8e, 0x50, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0x84, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"

  -
    input:
      bytes: [ 0x68, 0xd6, 0x54, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1v.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"

  -
    input:
      bytes: [ 0x80, 0x99, 0x42, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0xc8, 0x5a, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"

  -
    input:
      bytes: [ 0xcd, 0x8a, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1v.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"

  -
    input:
      bytes: [ 0x22, 0xf5, 0x41, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"

  -
    input:
      bytes: [ 0x87, 0xa9, 0x4b, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"

  -
    input:
      bytes: [ 0x00, 0x80, 0x40, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 0]}, p0/z, [x0, x0, lsl #1]"

  -
    input:
      bytes: [ 0x45, 0xd5, 0x55, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w14, 5]}, p5/z, [x10, x21, lsl #1]"

  -
    input:
      bytes: [ 0xa7, 0xed, 0x48, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w15, 7]}, p3/z, [x13, x8, lsl #1]"

  -
    input:
      bytes: [ 0xef, 0xff, 0x5f, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1v.h[w15, 7]}, p7/z, [sp]"

  -
    input:
      bytes: [ 0x25, 0x8e, 0x50, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 5]}, p3/z, [x17, x16, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0x84, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 1]}, p1/z, [x1, x30, lsl #1]"

  -
    input:
      bytes: [ 0x68, 0xd6, 0x54, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1v.h[w14, 0]}, p5/z, [x19, x20, lsl #1]"

  -
    input:
      bytes: [ 0x80, 0x99, 0x42, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w12, 0]}, p6/z, [x12, x2, lsl #1]"

  -
    input:
      bytes: [ 0x21, 0xc8, 0x5a, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w14, 1]}, p2/z, [x1, x26, lsl #1]"

  -
    input:
      bytes: [ 0xcd, 0x8a, 0x5e, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za1v.h[w12, 5]}, p2/z, [x22, x30, lsl #1]"

  -
    input:
      bytes: [ 0x22, 0xf5, 0x41, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w15, 2]}, p5/z, [x9, x1, lsl #1]"

  -
    input:
      bytes: [ 0x87, 0xa9, 0x4b, 0xe0 ]
      arch: "CS_ARCH_AARCH64"
      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
    expected:
      insns:
        -
          asm_text: "ld1h {za0v.h[w13, 7]}, p2/z, [x12, x11, lsl #1]"
