test_cases:
  -
    input:
      bytes: [ 0x81, 0x43, 0xe0, 0x0f ]
      arch: "CS_ARCH_SPARC"
      options: [ "CS_MODE_BIG_ENDIAN", "CS_MODE_V9" ]
    expected:
      insns:
        -
          asm_text: "membar #LoadLoad | #StoreLoad | #LoadStore | #StoreStore"
  -
    input:
      bytes: [ 0x81, 0x43, 0xc0, 0x00 ]
      arch: "CS_ARCH_SPARC"
      options: [ "CS_MODE_BIG_ENDIAN", "CS_MODE_V9" ]
    expected:
      insns:
        -
          asm_text: "stbar"
  -
    input:
      bytes: [ 0xd4, 0x7e, 0x00, 0x16 ]
      arch: "CS_ARCH_SPARC"
      options: [ "CS_MODE_BIG_ENDIAN", "CS_MODE_V9" ]
    expected:
      insns:
        -
          asm_text: "swap [%i0+%l6], %o2"
  -
    input:
      bytes: [ 0xd4, 0x7e, 0x20, 0x20 ]
      arch: "CS_ARCH_SPARC"
      options: [ "CS_MODE_BIG_ENDIAN", "CS_MODE_V9" ]
    expected:
      insns:
        -
          asm_text: "swap [%i0+32], %o2"
  -
    input:
      bytes: [ 0xd5, 0xe6, 0x10, 0x16 ]
      arch: "CS_ARCH_SPARC"
      options: [ "CS_MODE_BIG_ENDIAN", "CS_MODE_V9" ]
    expected:
      insns:
        -
          asm_text: "cas [%i0], %l6, %o2"
  -
    input:
      bytes: [ 0xd5, 0xf6, 0x10, 0x16 ]
      arch: "CS_ARCH_SPARC"
      options: [ "CS_MODE_BIG_ENDIAN", "CS_MODE_V9" ]
    expected:
      insns:
        -
          asm_text: "casx [%i0], %l6, %o2"
