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i should implement DSP DMA...

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This commit is contained in:
iris
2026-05-20 17:55:07 +02:00
parent f9ab690ccd
commit 35f20a16b8
15 changed files with 500 additions and 25 deletions
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core/broadway/mmio/ai.cpp
+5 -5
View File
@@ -3,29 +3,29 @@
#include <ircolib/log.hpp>
namespace weee::core {
ai::ai(mem &mem) {
audio_interface::audio_interface(mem &mem) {
mem.register_read32_handler(0x0c006c00, 0x0c006c1f, [&](ircolib::u32 addr) { return read32(addr); });
mem.register_write32_handler(0x0c006c00, 0x0c006c1f,
[&](ircolib::u32 addr, ircolib::u32 value) { return write32(addr, value); });
}
ircolib::u32 ai::read32(ircolib::u32 addr) {
ircolib::u32 audio_interface::read32(ircolib::u32 addr) {
switch (addr) {
case 0:
return ctrl.raw;
default:
ircolib::panic("ai::read32 from unimplemented addr 0x{:08X}", addr);
ircolib::panic("audio_interface::read32 from unimplemented addr 0x{:08X}", addr);
return 0;
}
}
void ai::write32(ircolib::u32 addr, ircolib::u32 value) {
void audio_interface::write32(ircolib::u32 addr, ircolib::u32 value) {
switch (addr) {
case 0:
ctrl.raw = value;
break;
default:
ircolib::panic("ai::write32 to unimplemented addr 0x{:08X} with value 0x{:08X}", addr, value);
ircolib::panic("audio_interface::write32 to unimplemented addr 0x{:08X} with value 0x{:08X}", addr, value);
}
}
} // namespace weee::core
core/broadway/mmio/ai.hpp
+2 -2
View File
@@ -3,8 +3,8 @@
namespace weee::core {
struct mem;
struct ai {
ai(mem &);
struct audio_interface {
audio_interface(mem &);
ircolib::u32 read32(ircolib::u32);
void write32(ircolib::u32, ircolib::u32);
core/broadway/mmio/dsp.cpp
+123 -2
View File
@@ -7,12 +7,77 @@ dsp::dsp(mem &mem) {
mem.register_read16_handler(0x0c005000, 0x0c0051ff, [&](ircolib::u32 addr) { return read16(addr); });
mem.register_write16_handler(0x0c005000, 0x0c0051ff,
[&](ircolib::u32 addr, ircolib::u16 value) { return write16(addr, value); });
mem.register_read32_handler(0x0c005000, 0x0c0051ff, [&](ircolib::u32 addr) { return read32(addr); });
mem.register_write32_handler(0x0c005000, 0x0c0051ff,
[&](ircolib::u32 addr, ircolib::u32 value) { return write32(addr, value); });
}
ircolib::u32 dsp::read32(ircolib::u32 addr) {
switch (addr) {
case 0x20:
return ar_dma_mmaddr.whole;
case 0x24:
return ar_dma_araddr.whole;
case 0x28:
return ar_dma_cnt.whole;
case 0x30:
return dma_start_addr.whole;
default:
ircolib::panic("dsp::read32 from unimplemented addr 0x{:08X}", addr);
return 0;
}
}
void dsp::write32(ircolib::u32 addr, ircolib::u32 value) {
switch (addr) {
case 0x20:
ar_dma_mmaddr.whole = value;
break;
case 0x24:
ar_dma_araddr.whole = value;
break;
case 0x28:
ar_dma_cnt.whole = value;
break;
case 0x30:
dma_start_addr.whole = value;
break;
default:
ircolib::panic("dsp::write32 to unimplemented addr 0x{:08X} with value 0x{:08X}", addr, value);
}
}
ircolib::u16 dsp::read16(ircolib::u32 addr) {
switch (addr) {
case 0x00:
return dsp_mail_hi;
case 0x02:
return dsp_mail_lo;
case 0x04:
return cpu_mail_hi;
case 0x06:
return cpu_mail_lo;
case 0x0a:
return csr.raw;
case 0x12:
return ar_size;
case 0x20:
return ar_dma_mmaddr.hi;
case 0x22:
return ar_dma_mmaddr.lo;
case 0x24:
return ar_dma_araddr.hi;
case 0x26:
return ar_dma_araddr.lo;
case 0x28:
return ar_dma_cnt.hi;
case 0x2a:
return ar_dma_cnt.lo;
case 0x30:
return dma_start_addr.hi;
case 0x32:
return dma_start_addr.lo;
default:
ircolib::panic("dsp::read16 from unimplemented addr 0x{:08X}", addr);
return 0;
@@ -21,11 +86,67 @@ ircolib::u16 dsp::read16(ircolib::u32 addr) {
void dsp::write16(ircolib::u32 addr, ircolib::u16 value) {
switch (addr) {
case 0x00:
dsp_mail_hi = value;
break;
case 0x02:
dsp_mail_lo = value;
break;
case 0x0a:
csr.raw = value;
{
Csr ccsr = {.raw = value};
Csr ocsr = csr;
csr = ccsr;
if (csr.res || (ocsr.boot_mode != ccsr.boot_mode && ccsr.boot_mode)) {
cpu_mail_hi = 0;
cpu_mail_lo = 0;
dsp_mail_hi = 0;
dsp_mail_lo = 0;
}
if (csr.piint)
csr.piint = false;
if (csr.aidint)
csr.aidint = false;
if (csr.arint)
csr.arint = false;
if (csr.dspint)
csr.dspint = false;
}
break;
case 0x12:
ar_size = value;
break;
case 0x20:
ar_dma_mmaddr.hi = value;
break;
case 0x22:
ar_dma_mmaddr.lo = value;
break;
case 0x24:
ar_dma_araddr.hi = value;
break;
case 0x26:
ar_dma_araddr.lo = value;
break;
case 0x28:
ar_dma_cnt.hi = value;
break;
case 0x2a:
ar_dma_cnt.lo = value;
csr.arint = true;
break;
case 0x30:
dma_start_addr.hi = value;
break;
case 0x32:
dma_start_addr.lo = value;
break;
default:
ircolib::panic("dsp::read16 from unimplemented addr 0x{:08X}", addr);
ircolib::panic("dsp::write16 from unimplemented addr 0x{:08X} with value 0x{:04X}", addr, value);
}
}
} // namespace weee::core
core/broadway/mmio/dsp.hpp
+15 -2
View File
@@ -7,8 +7,10 @@ struct dsp {
dsp(mem &);
ircolib::u16 read16(ircolib::u32);
void write16(ircolib::u32, ircolib::u16);
ircolib::u32 read32(ircolib::u32);
void write32(ircolib::u32, ircolib::u32);
union {
union Csr {
struct {
unsigned res : 1;
unsigned piint : 1;
@@ -21,10 +23,21 @@ struct dsp {
unsigned dspint_mask : 1;
unsigned int_status : 1;
unsigned : 1;
unsigned res2 : 1;
unsigned boot_mode : 1;
unsigned : 4;
};
ircolib::u16 raw;
} csr;
union {
struct {
ircolib::u32 lo;
ircolib::u32 hi;
};
ircolib::u64 whole;
} ar_dma_mmaddr, ar_dma_araddr, ar_dma_cnt, dma_start_addr;
ircolib::u16 ar_size;
ircolib::u16 dsp_mail_hi = 0, dsp_mail_lo = 0, cpu_mail_hi = 0, cpu_mail_lo = 0;
};
} // namespace weee::core
core/broadway/mmio/si.cpp
+46
View File
@@ -0,0 +1,46 @@
#include <broadway/mmio/si.hpp>
#include <mem.hpp>
#include <ircolib/log.hpp>
namespace weee::core {
serial_interface::serial_interface(mem &mem) {
mem.register_read32_handler(0x0c006400, 0x0c0064ff, [&](ircolib::u32 addr) { return read32(addr); });
mem.register_write32_handler(0x0c006400, 0x0c0064ff,
[&](ircolib::u32 addr, ircolib::u32 value) { return write32(addr, value); });
}
ircolib::u32 serial_interface::read32(ircolib::u32 addr) {
switch (addr) {
case 0x30:
return sipoll.raw;
case 0x34:
return sicomcsr.raw;
case 0x38:
return sisr.raw;
case 0x3C:
return clock_lk.raw;
default:
ircolib::panic("serial_interface::read32 from unimplemented addr 0x{:08X}", addr);
return 0;
}
}
void serial_interface::write32(ircolib::u32 addr, ircolib::u32 value) {
switch (addr) {
case 0x30:
sipoll.raw = value;
break;
case 0x34:
sicomcsr.raw = value;
break;
case 0x38:
sisr.raw = value;
break;
case 0x3C:
clock_lk.raw = value;
break;
default:
ircolib::panic("serial_interface::write32 to unimplemented addr 0x{:08X} with value 0x{:08X}", addr, value);
}
}
} // namespace weee::core
core/broadway/mmio/si.hpp
+75
View File
@@ -0,0 +1,75 @@
#pragma once
#include <ircolib/types.hpp>
namespace weee::core {
struct mem;
struct serial_interface {
serial_interface(mem &);
ircolib::u32 read32(ircolib::u32);
void write32(ircolib::u32, ircolib::u32);
union {
struct {
unsigned vbcpy : 4;
unsigned en : 4;
unsigned y : 8;
unsigned x : 8;
unsigned : 8;
};
ircolib::u32 raw;
} sipoll;
union {
struct {
unsigned tstart : 1;
unsigned channel : 2;
unsigned cben : 1;
unsigned cmden : 1;
unsigned inlength : 7;
unsigned : 1;
unsigned outlength : 7;
unsigned : 1;
unsigned chen : 1;
unsigned chnum : 2;
unsigned rdstintmsk : 1;
unsigned rdstint : 1;
unsigned comerr : 1;
unsigned tcintmsk : 1;
unsigned tcint : 1;
};
ircolib::u32 raw;
} sicomcsr;
union {
struct {
unsigned : 31;
unsigned lock : 1;
};
ircolib::u32 raw;
} clock_lk;
union {
struct {
unsigned joy3 : 6;
unsigned : 2;
unsigned joy2 : 6;
unsigned : 2;
unsigned joy1 : 6;
unsigned : 2;
unsigned unrun : 1;
unsigned ovrun0 : 1;
unsigned coll0 : 1;
unsigned norep0 : 1;
unsigned wrst0 : 1;
unsigned rdst0 : 1;
unsigned : 1;
unsigned wr : 1;
};
ircolib::u32 raw;
} sisr;
};
} // namespace weee::core
core/broadway/mmio/vi.cpp
+55
View File
@@ -4,12 +4,67 @@
namespace weee::core {
video_interface::video_interface(mem &mem) {
mem.register_read16_handler(0x0c002000, 0x0c0020ff, [&](ircolib::u32 addr) { return read16(addr); });
mem.register_read32_handler(0x0c002000, 0x0c0020ff, [&](ircolib::u32 addr) { return read32(addr); });
mem.register_write16_handler(0x0c002000, 0x0c0020ff,
[&](ircolib::u32 addr, ircolib::u16 value) { write16(addr, value); });
mem.register_write32_handler(0x0c002000, 0x0c0020ff,
[&](ircolib::u32 addr, ircolib::u32 value) { write32(addr, value); });
}
ircolib::u16 video_interface::read16(ircolib::u32 addr) {
switch (addr) {
case 0x00:
return vtr.raw;
case 0x02:
return dcr.raw;
case 0x4a:
return hsr.raw;
case 0x6c:
return viclk & 1;
case 0x70:
return 0x0280;
default:
ircolib::panic("video_interface::read16 from unimplemented addr 0x{:04X}", addr);
return 0;
}
}
ircolib::u32 video_interface::read32(ircolib::u32 addr) {
switch (addr) {
case 0x02:
return dcr.raw;
case 0x04:
return htr0.raw;
case 0x08:
return htr1.raw;
case 0x0c:
return vto.raw;
case 0x10:
return vte.raw;
case 0x14:
return bbei.raw;
case 0x18:
return bboi.raw;
case 0x1c:
return tfbl.raw & 0x1ffffe00;
case 0x24:
return bfbl.raw & 0x10fffe00;
case 0x4c:
case 0x50:
case 0x54:
return fct0[addr - 0x4c].raw;
case 0x58:
case 0x5c:
case 0x60:
case 0x64:
return fct1[addr - 0x58].raw;
default:
ircolib::panic("video_interface::read32 from unimplemented addr 0x{:04X}", addr);
return 0;
}
}
void video_interface::write16(ircolib::u32 addr, ircolib::u16 value) {
switch (addr) {
case 0x00:
core/broadway/mmio/vi.hpp
+4 -1
View File
@@ -8,6 +8,9 @@ struct video_interface {
video_interface(mem &);
void write16(ircolib::u32, ircolib::u16);
void write32(ircolib::u32, ircolib::u32);
ircolib::u16 read16(ircolib::u32);
ircolib::u32 read32(ircolib::u32);
ircolib::u32 xfb_top_addr() {
auto addr = tfbl.fbb;
if (tfbl.page) {
@@ -96,7 +99,7 @@ struct video_interface {
unsigned fbb : 24;
};
ircolib::u32 raw;
} tfbl, bfbl;
} tfbl{}, bfbl{};
union FCT012 {
struct {