Squashed 'external/capstone/' content from commit e46f64fa

git-subtree-dir: external/capstone git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
2026-05-11 11:55:07 +02:00
commit 802798ce3c
3968 changed files with 2967598 additions and 0 deletions
@@ -0,0 +1,110 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0xb3, 0x52, 0x73, 0x60 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "ror t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x12, 0x73, 0x60 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "rol t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0x93, 0x52, 0xf3, 0x61 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "rori t0, t1, 31"
+
+  -
+    input:
+      bytes: [ 0x93, 0x52, 0x03, 0x60 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "rori t0, t1, 0"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x72, 0x73, 0x40 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "andn t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x62, 0x73, 0x40 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "orn t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x42, 0x73, 0x40 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "xnor t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x42, 0x73, 0x08 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "pack t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x42, 0x03, 0x08 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "pack t0, t1, zero"
+
+  -
+    input:
+      bytes: [ 0xb3, 0x72, 0x73, 0x08 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "packh t0, t1, t2"
+
+  -
+    input:
+      bytes: [ 0x93, 0x52, 0x73, 0x68 ]
+      arch: "CS_ARCH_RISCV"
+      options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_ZBKB" ]
+    expected:
+      insns:
+        -
+          asm_text: "brev8 t0, t1"