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git-subtree-dir: external/capstone
git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
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iris
2026-05-11 11:55:07 +02:00
commit 802798ce3c
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tests/MC/RISCV/xsfvcp_riscv32_riscv_v_riscv_xsfvcp.txt.yaml
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test_cases:
-
input:
bytes: [ 0xdb, 0xcf, 0xf5, 0x0e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.x 3, 15, 31, a1"
-
input:
bytes: [ 0xdb, 0xbf, 0xf7, 0x0e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.i 3, 15, 31, 15"
-
input:
bytes: [ 0xdb, 0x8f, 0x20, 0x2e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.vv 3, 31, v2, v1"
-
input:
bytes: [ 0xdb, 0xcf, 0x25, 0x2e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.xv 3, 31, v2, a1"
-
input:
bytes: [ 0xdb, 0xbf, 0x27, 0x2e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.iv 3, 31, v2, 15"
-
input:
bytes: [ 0xdb, 0xdf, 0x25, 0x2e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.fv 1, 31, v2, fa1"
-
input:
bytes: [ 0x5b, 0x80, 0x20, 0xae ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.vvv 3, v0, v2, v1"
-
input:
bytes: [ 0x5b, 0xc0, 0x25, 0xae ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.xvv 3, v0, v2, a1"
-
input:
bytes: [ 0x5b, 0xb0, 0x27, 0xae ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.ivv 3, v0, v2, 15"
-
input:
bytes: [ 0x5b, 0xd0, 0x25, 0xae ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.fvv 1, v0, v2, fa1"
-
input:
bytes: [ 0x5b, 0x80, 0x20, 0xfe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.vvw 3, v0, v2, v1"
-
input:
bytes: [ 0x5b, 0xc0, 0x25, 0xfe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.xvw 3, v0, v2, a1"
-
input:
bytes: [ 0x5b, 0xb0, 0x27, 0xfe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.ivw 3, v0, v2, 15"
-
input:
bytes: [ 0x5b, 0xd0, 0x25, 0xfe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.fvw 1, v0, v2, fa1"
-
input:
bytes: [ 0x5b, 0xc0, 0xf5, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.x 3, 15, v0, a1"
-
input:
bytes: [ 0x5b, 0xb0, 0xf7, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.i 3, 15, v0, 15"
-
input:
bytes: [ 0x5b, 0x80, 0x20, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.vv 3, v0, v2, v1"
-
input:
bytes: [ 0x5b, 0xc0, 0x25, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.xv 3, v0, v2, a1"
-
input:
bytes: [ 0x5b, 0xb0, 0x27, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.iv 3, v0, v2, 15"
-
input:
bytes: [ 0x5b, 0xd0, 0x25, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.fv 1, v0, v2, fa1"
-
input:
bytes: [ 0x5b, 0x80, 0x20, 0xac ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.vvv 3, v0, v2, v1"
-
input:
bytes: [ 0x5b, 0xc0, 0x25, 0xac ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.xvv 3, v0, v2, a1"
-
input:
bytes: [ 0x5b, 0xb0, 0x27, 0xac ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.ivv 3, v0, v2, 15"
-
input:
bytes: [ 0x5b, 0xd0, 0x25, 0xac ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.fvv 1, v0, v2, fa1"
-
input:
bytes: [ 0x5b, 0x80, 0x20, 0xfc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.vvw 3, v0, v2, v1"
-
input:
bytes: [ 0x5b, 0xc0, 0x25, 0xfc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.xvw 3, v0, v2, a1"
-
input:
bytes: [ 0x5b, 0xb0, 0x27, 0xfc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.ivw 3, v0, v2, 15"
-
input:
bytes: [ 0x5b, 0xd0, 0x25, 0xfc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_V", "CS_MODE_RISCV_XSFVCP" ]
expected:
insns:
-
asm_text: "sf.vc.v.fvw 1, v0, v2, fa1"