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Squashed 'external/capstone/' content from commit e46f64fa

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git-subtree-dir: external/capstone
git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
This commit is contained in:
iris
2026-05-11 11:55:07 +02:00
commit 802798ce3c
3968 changed files with 2967598 additions and 0 deletions
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tests/MC/TriCore/ADC_Background_Scan_1_KIT_TC275_LK.s.yaml
+7588
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tests/MC/TriCore/ADC_Queued_Scan_1_KIT_TC397_TFT.s.yaml
+8659
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tests/MC/TriCore/J_Call_Loop.s.yaml
+2521
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tests/MC/TriCore/LoadStore.s.yaml
+2854
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tests/MC/TriCore/csfr.s.yaml
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test_cases:
-
input:
bytes: [ 0xcd, 0x41, 0xe0, 0x0f ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "mtcr #-0x1fc, d1"
-
input:
bytes: [ 0x4d, 0x40, 0xe0, 0x2f ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "mfcr d2, #0xfe04"
tests/MC/TriCore/debug.s.yaml
+10
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test_cases:
-
input:
bytes: [ 0x4b, 0x00, 0x01, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "cmp.f d0, d0, d0"
tests/MC/TriCore/extr_u.s.yaml
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test_cases:
-
input:
bytes: [ 0x17, 0x01, 0x40, 0x02 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "extr d0, d1, e2"
-
input:
bytes: [ 0x17, 0x01, 0x60, 0x02 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "extr.u d0, d1, e2"
tests/MC/TriCore/handwrite.s.yaml
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test_cases:
-
input:
bytes: [ 0x8f, 0xff, 0x83, 0x81 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "xor d8, d15, #0x3f"
tests/MC/TriCore/iLLD_TC375_ADS_Bluetooth_RFCOMM.s.yaml
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tests/MC/TriCore/ldst_br_circ.s.yaml
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test_cases:
-
input:
bytes: [ 0xa9, 0x00, 0x80, 0x03 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cachea.i [p0+r]"
-
input:
bytes: [ 0xa9, 0x00, 0x8a, 0x07 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cachea.i [p0+c]#0xa"
-
input:
bytes: [ 0xa9, 0x00, 0x00, 0x03 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cachea.w [p0+r]"
-
input:
bytes: [ 0xa9, 0x00, 0x0a, 0x07 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cachea.w [p0+c]#0xa"
-
input:
bytes: [ 0xa9, 0x00, 0x40, 0x03 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cachea.wi [p0+r]"
-
input:
bytes: [ 0xa9, 0x00, 0x4a, 0x07 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cachea.wi [p0+c]#0xa"
-
input:
bytes: [ 0x69, 0x02, 0xc0, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cmpswap.w [p0+r], e2"
-
input:
bytes: [ 0x69, 0x02, 0xca, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "cmpswap.w [p0+c]#0xa, e2"
-
input:
bytes: [ 0x29, 0x02, 0x80, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.a a2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x8a, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.a a2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0x00, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.b d2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x0a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.b d2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0x40, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.bu d2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x4a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.bu d2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0x40, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.d e2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x4a, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.d e2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0xc0, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.da p2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0xca, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.da p2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0x80, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.h d2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x8a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.h d2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0xc0, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.hu d2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0xca, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.hu d2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0x00, 0x02 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.q d2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x0a, 0x06 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.q d2, [p0+c]#0xa"
-
input:
bytes: [ 0x29, 0x02, 0x00, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.w d2, [p0+r]"
-
input:
bytes: [ 0x29, 0x02, 0x0a, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ld.w d2, [p0+c]#0xa"
-
input:
bytes: [ 0x69, 0x02, 0x40, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ldmst [p0+r], e2"
-
input:
bytes: [ 0x69, 0x02, 0x4a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "ldmst [p0+c]#0xa, e2"
-
input:
bytes: [ 0xa9, 0x02, 0x80, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.a [p0+r], a2"
-
input:
bytes: [ 0xa9, 0x02, 0x8a, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.a [p0+c]#0xa, a2"
-
input:
bytes: [ 0xa9, 0x02, 0x00, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.b [p0+r], d2"
-
input:
bytes: [ 0xa9, 0x02, 0x0a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.b [p0+c]#0xa, d2"
-
input:
bytes: [ 0xa9, 0x02, 0x40, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.d [p0+r], e2"
-
input:
bytes: [ 0xa9, 0x02, 0x4a, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.d [p0+c]#0xa, e2"
-
input:
bytes: [ 0xa9, 0x02, 0xc0, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.da [p0+r], p2"
-
input:
bytes: [ 0xa9, 0x02, 0xca, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.da [p0+c]#0xa, p2"
-
input:
bytes: [ 0xa9, 0x02, 0x80, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.h [p0+r], d2"
-
input:
bytes: [ 0xa9, 0x02, 0x8a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.h [p0+c]#0xa, d2"
-
input:
bytes: [ 0xa9, 0x02, 0x00, 0x02 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.q [p0+r], d2"
-
input:
bytes: [ 0xa9, 0x02, 0x0a, 0x06 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.q [p0+c]#0xa, d2"
-
input:
bytes: [ 0xa9, 0x02, 0x00, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.w [p0+r], d2"
-
input:
bytes: [ 0xa9, 0x02, 0x0a, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "st.w [p0+c]#0xa, d2"
-
input:
bytes: [ 0x69, 0x02, 0x00, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "swap.w [p0+r], d2"
-
input:
bytes: [ 0x69, 0x02, 0x0a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "swap.w [p0+c]#0xa, d2"
-
input:
bytes: [ 0x69, 0x02, 0x80, 0x00 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "swapmsk.w [p0+r], e2"
-
input:
bytes: [ 0x69, 0x02, 0x8a, 0x04 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_162" ]
expected:
insns:
-
asm_text: "swapmsk.w [p0+c]#0xa, e2"
tests/MC/TriCore/rr_insn.s.yaml
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test_cases:
-
input:
bytes: [ 0x0b, 0x20, 0xc0, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "abs d0, d2"
-
input:
bytes: [ 0x0b, 0x60, 0xc0, 0x05 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "abs.b d0, d6"
-
input:
bytes: [ 0x0b, 0x40, 0xc0, 0x27 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "abs.h d2, d4"
-
input:
bytes: [ 0x0b, 0x10, 0xd0, 0x01 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "abss d0, d1"
-
input:
bytes: [ 0x0b, 0x10, 0xd0, 0x07 ]
arch: "CS_ARCH_TRICORE"
options: [ "CS_MODE_TRICORE_131" ]
expected:
insns:
-
asm_text: "abss.h d0, d1"
tests/MC/TriCore/tc110.s.yaml
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tests/MC/TriCore/tc120.s.yaml
+6832
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tests/MC/TriCore/tc130.s.yaml
+7066
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tests/MC/TriCore/tc131.s.yaml
+7147
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tests/MC/TriCore/tc160.s.yaml
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tests/MC/TriCore/tc161.s.yaml
+7507
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tests/MC/TriCore/tc162.s.yaml
+7579
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tests/MC/TriCore/tc180.s.yaml
+7930
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