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Merge commit '802798ce3c8baa4697120580f87bc1ee377306d3' as 'external/capstone'

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iris
2026-05-11 11:55:07 +02:00
parent ef8e742694 802798ce3c
commit c0de07465b
3968 changed files with 2967598 additions and 0 deletions
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external/capstone/tests/MC/AArch64/SVE/movprfx.s.yaml
Vendored
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View File
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test_cases:
-
input:
bytes: [ 0x20, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z1"
-
input:
bytes: [ 0x20, 0x00, 0x40, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "hlt #0x1"
-
input:
bytes: [ 0x20, 0x20, 0xd0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0.d, p0/z, z1.d"
-
input:
bytes: [ 0x20, 0x00, 0x40, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "hlt #0x1"
-
input:
bytes: [ 0x20, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z1"
-
input:
bytes: [ 0x20, 0x00, 0x20, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "brk #0x1"
-
input:
bytes: [ 0x20, 0x20, 0xd0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0.d, p0/z, z1.d"
-
input:
bytes: [ 0x20, 0x00, 0x20, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "brk #0x1"
-
input:
bytes: [ 0x20, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z1"
-
input:
bytes: [ 0x20, 0x00, 0xc0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "add z0.d, p0/m, z0.d, z1.d"
-
input:
bytes: [ 0x20, 0x00, 0xc0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "add z0.d, p0/m, z0.d, z1.d"
-
input:
bytes: [ 0x20, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z1"
-
input:
bytes: [ 0x20, 0x00, 0x40, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "hlt #0x1"
-
input:
bytes: [ 0x20, 0x20, 0xd0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0.d, p0/z, z1.d"
-
input:
bytes: [ 0x20, 0x00, 0x40, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "hlt #0x1"
-
input:
bytes: [ 0x20, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z1"
-
input:
bytes: [ 0x20, 0x00, 0x20, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "brk #0x1"
-
input:
bytes: [ 0x20, 0x20, 0xd0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0.d, p0/z, z1.d"
-
input:
bytes: [ 0x20, 0x00, 0x20, 0xd4 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "brk #0x1"
-
input:
bytes: [ 0x20, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z1"
-
input:
bytes: [ 0x20, 0x00, 0xc0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "add z0.d, p0/m, z0.d, z1.d"
-
input:
bytes: [ 0x20, 0x00, 0xc0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "add z0.d, p0/m, z0.d, z1.d"