Merge commit '802798ce3c8baa4697120580f87bc1ee377306d3' as 'external/capstone'

2026-05-11 11:55:07 +02:00
parent ef8e742694 802798ce3c
commit c0de07465b
3968 changed files with 2967598 additions and 0 deletions
@@ -0,0 +1,400 @@
+test_cases:
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x00, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.b }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x20, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.h }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x40, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.s }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x60, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.d }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x00, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.b }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x20, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.h }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x40, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.s }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x60, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.d }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x0f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.b }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x05, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.b }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x2f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.h }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x25, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.h }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x4f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.s }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x45, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.s }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x6f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.d }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x65, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.d }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x00, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.b }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x20, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.h }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x40, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.s }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x60, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sve" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.d }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x00, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.b }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x20, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.h }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x40, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.s }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x60, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.d }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x00, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.b }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x20, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.h }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x40, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.s }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0xe0, 0x60, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.d }, p0, [x0]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x0f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.b }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x05, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.b }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x2f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.h }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x25, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.h }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x4f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.s }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x45, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.s }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0xff, 0xff, 0x6f, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z31.d }, p7, [sp, #-1, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x55, 0xf5, 0x65, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z21.d }, p5, [x10, #5, mul vl]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x00, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.b }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x20, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.h }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x40, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.s }, p0, [x0, x0]"
+
+  -
+    input:
+      bytes: [ 0x00, 0x40, 0x60, 0xe4 ]
+      arch: "CS_ARCH_AARCH64"
+      options: [ "CS_OPT_ONLY_OFFSET_BRANCH", "aarch64", "sme" ]
+    expected:
+      insns:
+        -
+          asm_text: "st1b { z0.d }, p0, [x0, x0]"