weeemu/weee
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge commit '802798ce3c8baa4697120580f87bc1ee377306d3' as 'external/capstone'

Browse Source
This commit is contained in:
iris
2026-05-11 11:55:07 +02:00
parent ef8e742694 802798ce3c
commit c0de07465b
3968 changed files with 2967598 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
external/capstone/tests/MC/RISCV/XCVbitmanip_riscv32_riscv_xcvbitmanip.txt.yaml
Vendored
+480
View File
@@ -0,0 +1,480 @@
test_cases:
-
input:
bytes: [ 0xdb, 0x02, 0x13, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extract t0, t1, 0, 1"
-
input:
bytes: [ 0x5b, 0x85, 0x25, 0x23 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extract a0, a1, 17, 18"
-
input:
bytes: [ 0x5b, 0x84, 0xf4, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extract s0, s1, 30, 31"
-
input:
bytes: [ 0xdb, 0x02, 0x13, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractu t0, t1, 0, 1"
-
input:
bytes: [ 0x5b, 0x85, 0x25, 0x63 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractu a0, a1, 17, 18"
-
input:
bytes: [ 0x5b, 0x84, 0xf4, 0x7d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractu s0, s1, 30, 31"
-
input:
bytes: [ 0xdb, 0x02, 0x13, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.insert t0, t1, 0, 1"
-
input:
bytes: [ 0x5b, 0x85, 0x25, 0xa3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.insert a0, a1, 17, 18"
-
input:
bytes: [ 0x5b, 0x84, 0xf4, 0xbd ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.insert s0, s1, 30, 31"
-
input:
bytes: [ 0xdb, 0x12, 0x13, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bclr t0, t1, 0, 1"
-
input:
bytes: [ 0x5b, 0x95, 0x25, 0x23 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bclr a0, a1, 17, 18"
-
input:
bytes: [ 0x5b, 0x94, 0xf4, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bclr s0, s1, 30, 31"
-
input:
bytes: [ 0xdb, 0x12, 0x13, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bset t0, t1, 0, 1"
-
input:
bytes: [ 0x5b, 0x95, 0x25, 0x63 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bset a0, a1, 17, 18"
-
input:
bytes: [ 0x5b, 0x94, 0xf4, 0x7d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bset s0, s1, 30, 31"
-
input:
bytes: [ 0xdb, 0x12, 0x13, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bitrev t0, t1, 0, 1"
-
input:
bytes: [ 0x5b, 0x95, 0x25, 0xc3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bitrev a0, a1, 1, 18"
-
input:
bytes: [ 0x5b, 0x94, 0xf4, 0xc5 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bitrev s0, s1, 2, 31"
-
input:
bytes: [ 0xab, 0x32, 0x73, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractr t0, t1, t2"
-
input:
bytes: [ 0x2b, 0xb5, 0xc5, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractr a0, a1, a2"
-
input:
bytes: [ 0x2b, 0xb4, 0x24, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractr s0, s1, s2"
-
input:
bytes: [ 0xab, 0x32, 0x73, 0x32 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractur t0, t1, t2"
-
input:
bytes: [ 0x2b, 0xb5, 0xc5, 0x32 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractur a0, a1, a2"
-
input:
bytes: [ 0x2b, 0xb4, 0x24, 0x33 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.extractur s0, s1, s2"
-
input:
bytes: [ 0xab, 0x32, 0x73, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.insertr t0, t1, t2"
-
input:
bytes: [ 0x2b, 0xb5, 0xc5, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.insertr a0, a1, a2"
-
input:
bytes: [ 0x2b, 0xb4, 0x24, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.insertr s0, s1, s2"
-
input:
bytes: [ 0xab, 0x32, 0x73, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bclrr t0, t1, t2"
-
input:
bytes: [ 0x2b, 0xb5, 0xc5, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bclrr a0, a1, a2"
-
input:
bytes: [ 0x2b, 0xb4, 0x24, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bclrr s0, s1, s2"
-
input:
bytes: [ 0xab, 0x32, 0x73, 0x3a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bsetr t0, t1, t2"
-
input:
bytes: [ 0x2b, 0xb5, 0xc5, 0x3a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bsetr a0, a1, a2"
-
input:
bytes: [ 0x2b, 0xb4, 0x24, 0x3b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.bsetr s0, s1, s2"
-
input:
bytes: [ 0xab, 0x32, 0x73, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.ror t0, t1, t2"
-
input:
bytes: [ 0x2b, 0xb5, 0xc5, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.ror a0, a1, a2"
-
input:
bytes: [ 0x2b, 0xb4, 0x24, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.ror s0, s1, s2"
-
input:
bytes: [ 0xab, 0x32, 0x03, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.ff1 t0, t1"
-
input:
bytes: [ 0x2b, 0xb5, 0x05, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.ff1 a0, a1"
-
input:
bytes: [ 0x2b, 0xb4, 0x04, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.ff1 s0, s1"
-
input:
bytes: [ 0xab, 0x32, 0x03, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.fl1 t0, t1"
-
input:
bytes: [ 0x2b, 0xb5, 0x05, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.fl1 a0, a1"
-
input:
bytes: [ 0x2b, 0xb4, 0x04, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.fl1 s0, s1"
-
input:
bytes: [ 0xab, 0x32, 0x03, 0x46 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.clb t0, t1"
-
input:
bytes: [ 0x2b, 0xb5, 0x05, 0x46 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.clb a0, a1"
-
input:
bytes: [ 0x2b, 0xb4, 0x04, 0x46 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.clb s0, s1"
-
input:
bytes: [ 0xab, 0x32, 0x03, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.cnt t0, t1"
-
input:
bytes: [ 0x2b, 0xb5, 0x05, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.cnt a0, a1"
-
input:
bytes: [ 0x2b, 0xb4, 0x04, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVBITMANIP" ]
expected:
insns:
-
asm_text: "cv.cnt s0, s1"