test_cases:
  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x10 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vminu.vv v8, v4, v20, v0.t"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x12 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vminu.vv v8, v4, v20"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x10 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vminu.vx v8, v4, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x12 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vminu.vx v8, v4, a0"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x14 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmin.vv v8, v4, v20, v0.t"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x16 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmin.vv v8, v4, v20"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x14 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmin.vx v8, v4, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x16 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmin.vx v8, v4, a0"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x18 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmaxu.vv v8, v4, v20, v0.t"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x1a ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmaxu.vv v8, v4, v20"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x18 ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmaxu.vx v8, v4, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x1a ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmaxu.vx v8, v4, a0"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x1c ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmax.vv v8, v4, v20, v0.t"

  -
    input:
      bytes: [ 0x57, 0x04, 0x4a, 0x1e ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmax.vv v8, v4, v20"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x1c ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmax.vx v8, v4, a0, v0.t"

  -
    input:
      bytes: [ 0x57, 0x44, 0x45, 0x1e ]
      arch: "CS_ARCH_RISCV"
      options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
    expected:
      insns:
        -
          asm_text: "vmax.vx v8, v4, a0"