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weee/tests/MC/RISCV/fmacc_riscv64_riscv_v_riscv_f.txt.yaml
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iris 802798ce3c Squashed 'external/capstone/' content from commit e46f64fa 
git-subtree-dir: external/capstone
git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
2026-05-11 11:55:07 +02:00

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test_cases:
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xb0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmacc.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xb2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmacc.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xb0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmacc.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xb2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmacc.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xb4 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmacc.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xb6 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmacc.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xb4 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmacc.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xb6 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmacc.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsac.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsac.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsac.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsac.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xbc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsac.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xbe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsac.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xbc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsac.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xbe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsac.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmadd.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xa2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmadd.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmadd.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xa2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmadd.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xa4 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmadd.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xa6 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmadd.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xa4 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmadd.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xa6 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmadd.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsub.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xaa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsub.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsub.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xaa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfmsub.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xac ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsub.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xae ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsub.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xac ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsub.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xae ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfnmsub.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xf0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmacc.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xf2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmacc.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xf0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmacc.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xf2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmacc.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xf4 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmacc.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xf6 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmacc.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xf4 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmacc.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xf6 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmacc.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xf8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmsac.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xfa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmsac.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xf8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmsac.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xfa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwmsac.vf v8, fa0, v4"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xfc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmsac.vv v8, v20, v4, v0.t"
-
input:
bytes: [ 0x57, 0x14, 0x4a, 0xfe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmsac.vv v8, v20, v4"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xfc ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmsac.vf v8, fa0, v4, v0.t"
-
input:
bytes: [ 0x57, 0x54, 0x45, 0xfe ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V", "CS_MODE_RISCV_F" ]
expected:
insns:
-
asm_text: "vfwnmsac.vf v8, fa0, v4"
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