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weee/external/capstone/tests/MC/RISCV/XCVsimd_riscv32_riscv_xcvsimd.txt.yaml
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test_cases:
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x02 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x03 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x00 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x01 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x02 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x03 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x0a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x0b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x08 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x09 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x0a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x0b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x12 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x13 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x10 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x11 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x12 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x13 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avg.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x1a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x1b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x18 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x19 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x1a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x1b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.avgu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x22 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x23 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x20 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x21 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x22 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x23 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.min.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x2a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x2b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x28 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x29 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x2a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x2b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.minu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x32 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x33 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x30 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x31 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x32 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x33 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.max.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x3a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x3b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x38 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x39 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x3a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x3b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.maxu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x41 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.h t3, t4, 0"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0x74, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.h s0, s1, 15"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x40 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.b t3, t4, 0"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0x34, 0x42 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.srl.sci.b s0, s1, 7"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x49 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.h t3, t4, 0"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x4a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0x74, 0x4a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.h s0, s1, 15"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x48 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.b t3, t4, 0"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x4a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0x34, 0x4a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sra.sci.b s0, s1, 7"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x51 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.h t3, t4, 0"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x52 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0x74, 0x52 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.h s0, s1, 15"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x50 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.b t3, t4, 0"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x52 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0x34, 0x52 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sll.sci.b s0, s1, 7"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x5a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x5b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x58 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x59 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x5a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x5b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.or.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x62 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x63 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x60 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x61 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x62 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x63 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.xor.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x6a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x6b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x68 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x69 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x6a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x6b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.and.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x03, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.h t0, t1"
-
input:
bytes: [ 0x7b, 0x8e, 0x0e, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.h t3, t4"
-
input:
bytes: [ 0x7b, 0x85, 0x05, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.h a0, a1"
-
input:
bytes: [ 0x7b, 0x84, 0x04, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.h s0, s1"
-
input:
bytes: [ 0xfb, 0x12, 0x03, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.b t0, t1"
-
input:
bytes: [ 0x7b, 0x9e, 0x0e, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.b t3, t4"
-
input:
bytes: [ 0x7b, 0x95, 0x05, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.b a0, a1"
-
input:
bytes: [ 0x7b, 0x94, 0x04, 0x70 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.abs.b s0, s1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x82 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x83 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x80 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x81 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x82 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x83 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotup.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x8a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x8b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x88 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x89 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x8a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x8b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotusp.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x92 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x93 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x90 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x91 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x92 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x93 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.dotsp.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x9a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x9b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x98 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x99 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x9a ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x9b ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotup.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0xa2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0xa3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0xa0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0xa1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0xa2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0xa3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotusp.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0xaa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0xab ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0xa8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0xa9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0xaa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0xab ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sdotsp.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x03, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0x8e, 0x0e, 0xb9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0x85, 0x35, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0x84, 0xf4, 0xbb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x12, 0x03, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0x9e, 0x0e, 0xb9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0x95, 0x35, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0x94, 0xf4, 0xbb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extract.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x22, 0x03, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xae, 0x0e, 0xb9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xa5, 0x35, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xa4, 0xf4, 0xbb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x32, 0x03, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xbe, 0x0e, 0xb9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xb5, 0x35, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xb4, 0xf4, 0xbb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.extractu.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x42, 0x03, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xce, 0x0e, 0xb9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xc5, 0x35, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xc4, 0xf4, 0xbb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x52, 0x03, 0xb8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xde, 0x0e, 0xb9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xd5, 0x35, 0xba ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xd4, 0xf4, 0xbb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.insert.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0xc1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0xc1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0xc1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0xc1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0xc1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0xc2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0xc3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0xc0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei0.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0xc1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei0.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0xc2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei0.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0xc3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei0.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0xc8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei1.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0xc9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei1.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0xca ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei1.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0xcb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei1.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0xd0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei2.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0xd1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei2.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0xd2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei2.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0xd3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei2.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0xd8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei3.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0xd9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei3.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0xda ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei3.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0xdb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shufflei3.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0xe0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0xe1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0xe0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0xe1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0xe0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0xe1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0xe0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0xe1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.shuffle2.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0xf0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0xf1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0xf0 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0xf1 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0xf2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0xf3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0xf2 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0xf3 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.pack.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0xfa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packhi.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0xfb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packhi.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0xfa ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packhi.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0xfb ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packhi.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0xf8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packlo.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0xf9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packlo.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0xf8 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packlo.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0xf9 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.packlo.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x06 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x07 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x04 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x05 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x06 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x07 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpeq.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x0e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x0f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x0c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x0d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x0e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x0f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpne.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x16 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x17 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x14 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x15 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x16 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x17 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgt.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x1e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x1f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x1c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x1d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x1e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x1f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpge.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x26 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x27 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x24 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x25 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x26 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x27 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmplt.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.h t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x2e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x2f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.h s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x2c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x2d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.b t3, t4, -32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x2e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x2f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmple.sci.b s0, s1, -1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x36 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x37 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x34 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x35 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x36 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x37 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgtu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x3e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x3f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x3c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x3d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x3e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x3f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpgeu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x46 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x47 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x44 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x45 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x46 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x47 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpltu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x12, 0x73, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x9e, 0xee, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x95, 0xc5, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x94, 0x24, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.h t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.h t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.h a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.h s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x52, 0x73, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.b t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xde, 0xee, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.b t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xd5, 0xc5, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.b a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xd4, 0x24, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sc.b s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x03, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.h t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xee, 0x0e, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.h t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xe5, 0x35, 0x4e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.h a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xe4, 0xf4, 0x4f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.h s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x72, 0x03, 0x4c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.b t0, t1, 0"
-
input:
bytes: [ 0x7b, 0xfe, 0x0e, 0x4d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.b t3, t4, 32"
-
input:
bytes: [ 0x7b, 0xf5, 0x35, 0x4e ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.b a0, a1, 7"
-
input:
bytes: [ 0x7b, 0xf4, 0xf4, 0x4f ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cmpleu.sci.b s0, s1, 63"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x22, 0x73, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div2 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xae, 0xee, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div2 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xa5, 0xc5, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div2 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xa4, 0x24, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div2 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x22, 0x73, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div2 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xae, 0xee, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div2 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xa5, 0xc5, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div2 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xa4, 0x24, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div2 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div4 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div4 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div4 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div4 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div4 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div4 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div4 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div4 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x73, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div8 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xee, 0xee, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div8 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xe5, 0xc5, 0x54 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div8 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xe4, 0x24, 0x55 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.r.div8 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x73, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div8 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xee, 0xee, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div8 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xe5, 0xc5, 0x56 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div8 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xe4, 0x24, 0x57 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxmul.i.div8 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x02, 0x03, 0x5c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxconj t0, t1"
-
input:
bytes: [ 0x7b, 0x8e, 0x0e, 0x5c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxconj t3, t4"
-
input:
bytes: [ 0x7b, 0x85, 0x05, 0x5c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxconj a0, a1"
-
input:
bytes: [ 0x7b, 0x84, 0x04, 0x5c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.cplxconj s0, s1"
-
input:
bytes: [ 0xfb, 0x02, 0x73, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj t0, t1, t2"
-
input:
bytes: [ 0x7b, 0x8e, 0xee, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj t3, t4, t5"
-
input:
bytes: [ 0x7b, 0x85, 0xc5, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj a0, a1, a2"
-
input:
bytes: [ 0x7b, 0x84, 0x24, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x22, 0x73, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div2 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xae, 0xee, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div2 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xa5, 0xc5, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div2 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xa4, 0x24, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div2 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div4 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div4 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div4 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div4 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x73, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div8 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xee, 0xee, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div8 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xe5, 0xc5, 0x64 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div8 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xe4, 0x24, 0x65 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.subrotmj.div8 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x22, 0x73, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div2 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xae, 0xee, 0x6d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div2 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xa5, 0xc5, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div2 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xa4, 0x24, 0x6d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div2 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div4 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x6d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div4 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div4 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x6d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div4 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x73, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div8 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xee, 0xee, 0x6d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div8 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xe5, 0xc5, 0x6c ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div8 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xe4, 0x24, 0x6d ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.add.div8 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x22, 0x73, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div2 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xae, 0xee, 0x75 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div2 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xa5, 0xc5, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div2 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xa4, 0x24, 0x75 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div2 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x42, 0x73, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div4 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xce, 0xee, 0x75 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div4 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xc5, 0xc5, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div4 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xc4, 0x24, 0x75 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div4 s0, s1, s2"
-
input:
bytes: [ 0xfb, 0x62, 0x73, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div8 t0, t1, t2"
-
input:
bytes: [ 0x7b, 0xee, 0xee, 0x75 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div8 t3, t4, t5"
-
input:
bytes: [ 0x7b, 0xe5, 0xc5, 0x74 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div8 a0, a1, a2"
-
input:
bytes: [ 0x7b, 0xe4, 0x24, 0x75 ]
arch: "CS_ARCH_RISCV"
options: [ "CS_MODE_RISCV32", "CS_MODE_RISCV_XCVSIMD" ]
expected:
insns:
-
asm_text: "cv.sub.div8 s0, s1, s2"