iris
802798ce3c
git-subtree-dir: external/capstone git-subtree-split: e46f64fadb351e9ecd05264fab26f2772feb0994
85 lines
3.0 KiB
C
85 lines
3.0 KiB
C
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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#ifndef CS_ARM_MAPPING_H
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#define CS_ARM_MAPPING_H
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#include "../../include/capstone/capstone.h"
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#include "../../utils.h"
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#include "../../Mapping.h"
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#include "ARMBaseInfo.h"
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typedef enum {
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#include "ARMGenCSOpGroup.inc"
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} arm_op_group;
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extern const ARMBankedReg_BankedReg *
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ARMBankedReg_lookupBankedRegByEncoding(uint8_t Encoding);
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extern const ARMSysReg_MClassSysReg *
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ARMSysReg_lookupMClassSysRegByEncoding(uint16_t Encoding);
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// return name of register in friendly string
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const char *ARM_reg_name(csh handle, unsigned int reg);
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void ARM_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info);
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// given internal insn id, return public instruction ID
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void ARM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id);
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const char *ARM_insn_name(csh handle, unsigned int id);
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const char *ARM_group_name(csh handle, unsigned int id);
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// check if this insn is relative branch
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bool ARM_rel_branch(cs_struct *h, unsigned int insn_id);
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bool ARM_blx_to_arm_mode(cs_struct *h, unsigned int insn_id);
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void ARM_reg_access(const cs_insn *insn, cs_regs regs_read,
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uint8_t *regs_read_count, cs_regs regs_write,
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uint8_t *regs_write_count);
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const ARMBankedReg_BankedReg *
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ARMBankedReg_lookupBankedRegByEncoding(uint8_t encoding);
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bool ARM_getInstruction(csh handle, const uint8_t *code, size_t code_len,
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MCInst *instr, uint16_t *size, uint64_t address,
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void *info);
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void ARM_set_instr_map_data(MCInst *MI);
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void ARM_init_mri(MCRegisterInfo *MRI);
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// cs_detail related functions
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void ARM_init_cs_detail(MCInst *MI);
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void ARM_add_cs_detail_0(MCInst *MI, int /* arm_op_group */ op_group,
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size_t op_num);
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void ARM_add_cs_detail_1(MCInst *MI, int /* arm_op_group */ op_group,
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size_t op_num, uint64_t templ_arg_0);
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void ARM_add_cs_detail_2(MCInst *MI, int /* arm_op_group */ op_group,
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size_t op_num, uint64_t templ_arg_0,
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uint64_t templ_arg_1);
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void ARM_insert_detail_op_reg_at(MCInst *MI, unsigned index, arm_reg Reg,
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cs_ac_type access);
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void ARM_insert_detail_op_imm_at(MCInst *MI, unsigned index, int64_t Val,
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cs_ac_type access);
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void ARM_set_detail_op_reg(MCInst *MI, unsigned OpNum, arm_reg Reg);
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void ARM_set_detail_op_sysop(MCInst *MI, int SysReg, arm_op_type type,
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bool IsOutReg, uint8_t Mask, uint16_t Sysm);
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void ARM_set_detail_op_imm(MCInst *MI, unsigned OpNum, arm_op_type ImmType,
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int64_t Imm);
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void ARM_set_detail_op_float(MCInst *MI, unsigned OpNum, uint64_t Imm);
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void ARM_set_detail_op_mem(MCInst *MI, unsigned OpNum, bool is_index_reg,
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int scale, uint64_t Val);
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void ARM_set_detail_op_mem_offset(MCInst *MI, unsigned OpNum, uint64_t Val,
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bool subtracted);
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void ARM_set_detail_op_neon_lane(MCInst *MI, unsigned OpNum);
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void ARM_check_updates_flags(MCInst *MI);
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void ARM_setup_op(cs_arm_op *op);
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void ARM_add_vector_data(MCInst *MI, arm_vectordata_type data_type);
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void ARM_add_vector_size(MCInst *MI, unsigned size);
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#endif // CS_ARM_MAPPING_H
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