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Squashed 'external/ircolib/' changes from ce3cd726c..de6e324bd

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de6e324bd separate emu thread
10d3daf86 Roms List improvements
95d202f37 Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.
fc306967f Wow the ROM Header was just completely busted. Game list view works now
bad1691ee fuck this shit
2b59e5f46 game list in progress
d26417b83 remappable inputs in progress
ac4af8106 input
e72abc240 update readme
430139dc9 Qt6 frontend
3080d4d45 Fix this small bug too
08cd13b85 Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.
61bb4fb44 make idle loop detection a little more specific with where the load goes
b037de4c3 SAZDFsdff
12e81e73e need to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)
204f0e13b idle skipping seems to work!
cb8bb634a sdkfjlasdf
58e5c89c1 Fix compilation issue on my machine (no idea)
24fb2898e attempting more serious idle skipping
214719577 Place rsp.Step inside cached interpreter. Gains about 3 more fps
bb97dcc23 mmmmm
920b77d38 wjkhasdfjhkasdf
430ccdab4 it's a start...
4f42a673a Cached interpreter plays Mario 64. Start looking into RSP as well
c9a030787 idle skipping works!
5fbda03ce new idea
366637aba Idle skipping... maybe?
609fa2fb0 Cache instructions implemented but broken lmao. Commented out for now
e140a6d12 - Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work
68e613057 prep cache impl
811b4d809 fix clang format
fda755f7d idk
d5024ebbf small MI refactor in preparation of (eventually) implementing the RDRAM interface properly
694b45341 Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'
206dcdedf Squashed 'external/SDL/' content from commit 4d17b99d0a
4d16e1cb4 need to update sdl
848b19920 Fix compilation error
db61b5299 Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'
e94a94559 Squashed 'external/imgui/' content from commit 02e9b8cac
52edb3757 need to update imgui
c1a705e86 Emulate weird JALR behaviour
4b4c32f4b Fix exception for "unusable COP1" in 4 instructions i missed accidentally (again)
df5828142 Bug putting 0s in the log everywhere
f8b580048 Make isviewer a sink to file
8241e9735 Fix exception for "unusable COP1" in 4 instructions i missed accidentally
b29715f20 small changes
d9a620bc1 make use of my new small utility library
0d1aa938e Add 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'
e64eb40b3 Fuck git

git-subtree-dir: external/ircolib
git-subtree-split: de6e324bde
This commit is contained in:
iris
2026-06-15 11:56:38 +02:00
parent ce3cd726c8
commit 00cc9309cb
4479 changed files with 2943227 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
external/capstone/suite/MC/AArch64/armv9-sysreg128.txt.cs
Vendored
+89
View File
@@ -0,0 +1,89 @@
# CS_ARCH_AARCH64, 0, None
0x00,0x20,0x78,0xd5 = mrrs x0, x1, TTBR0_EL1
0x20,0x20,0x78,0xd5 = mrrs x0, x1, TTBR1_EL1
0x00,0x74,0x78,0xd5 = mrrs x0, x1, PAR_EL1
0x60,0xd0,0x78,0xd5 = mrrs x0, x1, RCWSMASK_EL1
0xc0,0xd0,0x78,0xd5 = mrrs x0, x1, RCWMASK_EL1
0x00,0x20,0x7c,0xd5 = mrrs x0, x1, TTBR0_EL2
0x20,0x20,0x7c,0xd5 = mrrs x0, x1, TTBR1_EL2
0x00,0x21,0x7c,0xd5 = mrrs x0, x1, VTTBR_EL2
0x00,0x21,0x7c,0xd5 = mrrs x0, x1, VTTBR_EL2
0x02,0x21,0x7c,0xd5 = mrrs x2, x3, VTTBR_EL2
0x04,0x21,0x7c,0xd5 = mrrs x4, x5, VTTBR_EL2
0x06,0x21,0x7c,0xd5 = mrrs x6, x7, VTTBR_EL2
0x08,0x21,0x7c,0xd5 = mrrs x8, x9, VTTBR_EL2
0x0a,0x21,0x7c,0xd5 = mrrs x10, x11, VTTBR_EL2
0x0c,0x21,0x7c,0xd5 = mrrs x12, x13, VTTBR_EL2
0x0e,0x21,0x7c,0xd5 = mrrs x14, x15, VTTBR_EL2
0x10,0x21,0x7c,0xd5 = mrrs x16, x17, VTTBR_EL2
0x12,0x21,0x7c,0xd5 = mrrs x18, x19, VTTBR_EL2
0x14,0x21,0x7c,0xd5 = mrrs x20, x21, VTTBR_EL2
0x16,0x21,0x7c,0xd5 = mrrs x22, x23, VTTBR_EL2
0x18,0x21,0x7c,0xd5 = mrrs x24, x25, VTTBR_EL2
0x1a,0x21,0x7c,0xd5 = mrrs x26, x27, VTTBR_EL2
0x00,0x20,0x78,0xd5 = mrrs x0, x1, TTBR0_EL1
0x20,0x20,0x78,0xd5 = mrrs x0, x1, TTBR1_EL1
0x00,0x74,0x78,0xd5 = mrrs x0, x1, PAR_EL1
0x60,0xd0,0x78,0xd5 = mrrs x0, x1, RCWSMASK_EL1
0xc0,0xd0,0x78,0xd5 = mrrs x0, x1, RCWMASK_EL1
0x00,0x20,0x7c,0xd5 = mrrs x0, x1, TTBR0_EL2
0x20,0x20,0x7c,0xd5 = mrrs x0, x1, TTBR1_EL2
0x00,0x21,0x7c,0xd5 = mrrs x0, x1, VTTBR_EL2
0x00,0x21,0x7c,0xd5 = mrrs x0, x1, VTTBR_EL2
0x02,0x21,0x7c,0xd5 = mrrs x2, x3, VTTBR_EL2
0x04,0x21,0x7c,0xd5 = mrrs x4, x5, VTTBR_EL2
0x06,0x21,0x7c,0xd5 = mrrs x6, x7, VTTBR_EL2
0x08,0x21,0x7c,0xd5 = mrrs x8, x9, VTTBR_EL2
0x0a,0x21,0x7c,0xd5 = mrrs x10, x11, VTTBR_EL2
0x0c,0x21,0x7c,0xd5 = mrrs x12, x13, VTTBR_EL2
0x0e,0x21,0x7c,0xd5 = mrrs x14, x15, VTTBR_EL2
0x10,0x21,0x7c,0xd5 = mrrs x16, x17, VTTBR_EL2
0x12,0x21,0x7c,0xd5 = mrrs x18, x19, VTTBR_EL2
0x14,0x21,0x7c,0xd5 = mrrs x20, x21, VTTBR_EL2
0x16,0x21,0x7c,0xd5 = mrrs x22, x23, VTTBR_EL2
0x18,0x21,0x7c,0xd5 = mrrs x24, x25, VTTBR_EL2
0x1a,0x21,0x7c,0xd5 = mrrs x26, x27, VTTBR_EL2
0x00,0x20,0x58,0xd5 = msrr TTBR0_EL1, x0, x1
0x20,0x20,0x58,0xd5 = msrr TTBR1_EL1, x0, x1
0x00,0x74,0x58,0xd5 = msrr PAR_EL1, x0, x1
0x60,0xd0,0x58,0xd5 = msrr RCWSMASK_EL1, x0, x1
0xc0,0xd0,0x58,0xd5 = msrr RCWMASK_EL1, x0, x1
0x00,0x20,0x5c,0xd5 = msrr TTBR0_EL2, x0, x1
0x20,0x20,0x5c,0xd5 = msrr TTBR1_EL2, x0, x1
0x00,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x0, x1
0x00,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x0, x1
0x02,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x2, x3
0x04,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x4, x5
0x06,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x6, x7
0x08,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x8, x9
0x0a,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x10, x11
0x0c,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x12, x13
0x0e,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x14, x15
0x10,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x16, x17
0x12,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x18, x19
0x14,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x20, x21
0x16,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x22, x23
0x18,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x24, x25
0x1a,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x26, x27
0x00,0x20,0x58,0xd5 = msrr TTBR0_EL1, x0, x1
0x20,0x20,0x58,0xd5 = msrr TTBR1_EL1, x0, x1
0x00,0x74,0x58,0xd5 = msrr PAR_EL1, x0, x1
0x60,0xd0,0x58,0xd5 = msrr RCWSMASK_EL1, x0, x1
0xc0,0xd0,0x58,0xd5 = msrr RCWMASK_EL1, x0, x1
0x00,0x20,0x5c,0xd5 = msrr TTBR0_EL2, x0, x1
0x20,0x20,0x5c,0xd5 = msrr TTBR1_EL2, x0, x1
0x00,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x0, x1
0x00,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x0, x1
0x02,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x2, x3
0x04,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x4, x5
0x06,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x6, x7
0x08,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x8, x9
0x0a,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x10, x11
0x0c,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x12, x13
0x0e,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x14, x15
0x10,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x16, x17
0x12,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x18, x19
0x14,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x20, x21
0x16,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x22, x23
0x18,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x24, x25
0x1a,0x21,0x5c,0xd5 = msrr VTTBR_EL2, x26, x27