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Squashed 'external/ircolib/' changes from ce3cd726c..de6e324bd

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de6e324bd separate emu thread
10d3daf86 Roms List improvements
95d202f37 Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.
fc306967f Wow the ROM Header was just completely busted. Game list view works now
bad1691ee fuck this shit
2b59e5f46 game list in progress
d26417b83 remappable inputs in progress
ac4af8106 input
e72abc240 update readme
430139dc9 Qt6 frontend
3080d4d45 Fix this small bug too
08cd13b85 Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.
61bb4fb44 make idle loop detection a little more specific with where the load goes
b037de4c3 SAZDFsdff
12e81e73e need to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)
204f0e13b idle skipping seems to work!
cb8bb634a sdkfjlasdf
58e5c89c1 Fix compilation issue on my machine (no idea)
24fb2898e attempting more serious idle skipping
214719577 Place rsp.Step inside cached interpreter. Gains about 3 more fps
bb97dcc23 mmmmm
920b77d38 wjkhasdfjhkasdf
430ccdab4 it's a start...
4f42a673a Cached interpreter plays Mario 64. Start looking into RSP as well
c9a030787 idle skipping works!
5fbda03ce new idea
366637aba Idle skipping... maybe?
609fa2fb0 Cache instructions implemented but broken lmao. Commented out for now
e140a6d12 - Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work
68e613057 prep cache impl
811b4d809 fix clang format
fda755f7d idk
d5024ebbf small MI refactor in preparation of (eventually) implementing the RDRAM interface properly
694b45341 Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'
206dcdedf Squashed 'external/SDL/' content from commit 4d17b99d0a
4d16e1cb4 need to update sdl
848b19920 Fix compilation error
db61b5299 Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'
e94a94559 Squashed 'external/imgui/' content from commit 02e9b8cac
52edb3757 need to update imgui
c1a705e86 Emulate weird JALR behaviour
4b4c32f4b Fix exception for "unusable COP1" in 4 instructions i missed accidentally (again)
df5828142 Bug putting 0s in the log everywhere
f8b580048 Make isviewer a sink to file
8241e9735 Fix exception for "unusable COP1" in 4 instructions i missed accidentally
b29715f20 small changes
d9a620bc1 make use of my new small utility library
0d1aa938e Add 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'
e64eb40b3 Fuck git

git-subtree-dir: external/ircolib
git-subtree-split: de6e324bde
This commit is contained in:
iris
2026-06-15 11:56:38 +02:00
parent ce3cd726c8
commit 00cc9309cb
4479 changed files with 2943227 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
external/capstone/suite/auto-sync/inc_patches/ARM/01_LDM_reg_lists_write_attribute.patch
Vendored
+378
View File
@@ -0,0 +1,378 @@
# The reglist operands are immediates. These immediates are technically read.
# But for Capstone we want every register in the least to be written (for load instructions).
# Hence, we patch it here.
diff --git a/arch/ARM/ARMGenCSMappingInsnOp.inc b/arch/ARM/ARMGenCSMappingInsnOp.inc
index cc10dad8..8a1ede35 100644
--- a/arch/ARM/ARMGenCSMappingInsnOp.inc
+++ b/arch/ARM/ARMGenCSMappingInsnOp.inc
@@ -4925,32 +4925,32 @@
{ /* ARM_FLDMXDB_UPD (851) - ARM_INS_FLDMDBX - fldmdbx${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_FLDMXIA (852) - ARM_INS_FLDMIAX - fldmiax${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_FLDMXIA_UPD (853) - ARM_INS_FLDMIAX - fldmiax${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_FMSTAT (854) - ARM_INS_VMRS - vmrs${p} APSR_nzcv, fpscr */
{
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
@@ -5210,80 +5210,80 @@
}},
{ /* ARM_LDMDA (885) - ARM_INS_LDMDA - ldmda${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMDA_UPD (886) - ARM_INS_LDMDA - ldmda${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMDB (887) - ARM_INS_LDMDB - ldmdb${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMDB_UPD (888) - ARM_INS_LDMDB - ldmdb${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMIA (889) - ARM_INS_LDM - ldm${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMIA_UPD (890) - ARM_INS_LDM - ldm${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMIB (891) - ARM_INS_LDMIB - ldmib${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDMIB_UPD (892) - ARM_INS_LDMIB - ldmib${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_LDRBT_POST_IMM (893) - ARM_INS_LDRBT - ldrbt${p} $Rt, $addr, $offset */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rt */
@@ -23132,64 +23132,64 @@
{ /* ARM_VLDMDDB_UPD (2838) - ARM_INS_VLDMDB - vldmdb${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VLDMDIA (2839) - ARM_INS_VLDMIA - vldmia${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VLDMDIA_UPD (2840) - ARM_INS_VLDMIA - vldmia${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{{{ /* ARM_VLDMQIA (2841) - ARM_INS_INVALID - */
0
}}},
{ /* ARM_VLDMSDB_UPD (2842) - ARM_INS_VLDMDB - vldmdb${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VLDMSIA (2843) - ARM_INS_VLDMIA - vldmia${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VLDMSIA_UPD (2844) - ARM_INS_VLDMIA - vldmia${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VLDRD (2845) - ARM_INS_VLDR - vldr${p} $Dd, $addr */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_v8i8, CS_DATA_TYPE_v4i16, CS_DATA_TYPE_v2i32, CS_DATA_TYPE_v1i64, CS_DATA_TYPE_v2f32, CS_DATA_TYPE_v4f16, CS_DATA_TYPE_v4bf16, CS_DATA_TYPE_LAST } }, /* Dd */
@@ -28522,21 +28522,21 @@
{ 0 }
}},
{ /* ARM_VSCCLRMD (3449) - ARM_INS_VSCCLRM - vscclrm{$p} $regs */
{
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VSCCLRMS (3450) - ARM_INS_VSCCLRM - vscclrm{$p} $regs */
{
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_VSDOTD (3451) - ARM_INS_VSDOT - vsdot.s8 $Vd, $Vn, $Vm */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_v8i8, CS_DATA_TYPE_v4i16, CS_DATA_TYPE_v2i32, CS_DATA_TYPE_v1i64, CS_DATA_TYPE_v2f32, CS_DATA_TYPE_v4f16, CS_DATA_TYPE_v4bf16, CS_DATA_TYPE_LAST } }, /* dst */
@@ -32683,80 +32683,80 @@
}},
{ /* ARM_sysLDMDA (3964) - ARM_INS_LDMDA - ldmda${p} $Rn, $regs ^ */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMDA_UPD (3965) - ARM_INS_LDMDA - ldmda${p} $Rn!, $regs ^ */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMDB (3966) - ARM_INS_LDMDB - ldmdb${p} $Rn, $regs ^ */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMDB_UPD (3967) - ARM_INS_LDMDB - ldmdb${p} $Rn!, $regs ^ */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMIA (3968) - ARM_INS_LDM - ldm${p} $Rn, $regs ^ */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMIA_UPD (3969) - ARM_INS_LDM - ldm${p} $Rn!, $regs ^ */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMIB (3970) - ARM_INS_LDMIB - ldmib${p} $Rn, $regs ^ */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysLDMIB_UPD (3971) - ARM_INS_LDMIB - ldmib${p} $Rn!, $regs ^ */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_sysSTMDA (3972) - ARM_INS_STMDA - stmda${p} $Rn, $regs ^ */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
@@ -33633,42 +33633,42 @@
}},
{ /* ARM_t2LDMDB (4075) - ARM_INS_LDMDB - ldmdb${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_t2LDMDB_UPD (4076) - ARM_INS_LDMDB - ldmdb${p} $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_t2LDMIA (4077) - ARM_INS_LDM - ldm${p}.w $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_t2LDMIA_UPD (4078) - ARM_INS_LDM - ldm${p}.w $Rn!, $regs */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* wb */
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_t2LDRBT (4079) - ARM_INS_LDRBT - ldrbt${p} $Rt, $addr */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rt */
@@ -36683,13 +36683,13 @@
}}},
{ /* ARM_tLDMIA (4413) - ARM_INS_LDM - ldm${p} $Rn, $regs */
{
{ CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rn */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},
{ /* ARM_tLDRBi (4414) - ARM_INS_LDRB - ldrb${p} $Rt, $addr */
{
{ CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* Rt */
external/capstone/suite/auto-sync/inc_patches/ARM/02_vector_data_types.patch
Vendored
+345
View File
@@ -0,0 +1,345 @@
diff --git a/arch/ARM/ARMGenAsmWriter.inc b/arch/ARM/ARMGenAsmWriter.inc
index b8b7182d..59d4e510 100644
--- a/arch/ARM/ARMGenAsmWriter.inc
+++ b/arch/ARM/ARMGenAsmWriter.inc
@@ -10011,18 +10011,15 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 14:
// FCONSTD, VABSD, VADDD, VCMPD, VCMPED, VCMPEZD, VCMPZD, VDIVD, VFMAD, V...
SStream_concat0(O, ".f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64);
printOperand(MI, 0, O);
break;
case 15:
// FCONSTH, MVE_VABDf16, MVE_VABSf16, MVE_VADD_qr_f16, MVE_VADDf16, MVE_V...
SStream_concat0(O, ".f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16);
break;
case 16:
// FCONSTS, MVE_VABDf32, MVE_VABSf32, MVE_VADD_qr_f32, MVE_VADDf32, MVE_V...
SStream_concat0(O, ".f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32);
break;
case 17:
// FMSTAT
@@ -10047,47 +10044,38 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 21:
// MVE_VABAVs16, MVE_VABDs16, MVE_VABSs16, MVE_VADDVs16acc, MVE_VADDVs16n...
SStream_concat0(O, ".s16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S16);
break;
case 22:
// MVE_VABAVs32, MVE_VABDs32, MVE_VABSs32, MVE_VADDLVs32acc, MVE_VADDLVs3...
SStream_concat0(O, ".s32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S32);
break;
case 23:
// MVE_VABAVs8, MVE_VABDs8, MVE_VABSs8, MVE_VADDVs8acc, MVE_VADDVs8no_acc...
SStream_concat0(O, ".s8\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S8);
break;
case 24:
// MVE_VABAVu16, MVE_VABDu16, MVE_VADDVu16acc, MVE_VADDVu16no_acc, MVE_VC...
SStream_concat0(O, ".u16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U16);
break;
case 25:
// MVE_VABAVu32, MVE_VABDu32, MVE_VADDLVu32acc, MVE_VADDLVu32no_acc, MVE_...
SStream_concat0(O, ".u32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U32);
break;
case 26:
// MVE_VABAVu8, MVE_VABDu8, MVE_VADDVu8acc, MVE_VADDVu8no_acc, MVE_VCMPu8...
SStream_concat0(O, ".u8\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U8);
break;
case 27:
// MVE_VADC, MVE_VADCI, MVE_VADD_qr_i32, MVE_VADDi32, MVE_VBICimmi32, MVE...
SStream_concat0(O, ".i32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_I32);
break;
case 28:
// MVE_VADD_qr_i16, MVE_VADDi16, MVE_VBICimmi16, MVE_VCADDi16, MVE_VCLZs1...
SStream_concat0(O, ".i16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_I16);
break;
case 29:
// MVE_VADD_qr_i8, MVE_VADDi8, MVE_VCADDi8, MVE_VCLZs8, MVE_VCMPi8, MVE_V...
SStream_concat0(O, ".i8\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_I8);
break;
case 30:
// MVE_VCTP64, MVE_VSTRD64_qi, MVE_VSTRD64_qi_pre, MVE_VSTRD64_rq, MVE_VS...
@@ -10097,14 +10085,12 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 31:
// MVE_VCVTf16f32bh, MVE_VCVTf16f32th, VCVTBSH, VCVTTSH, VCVTf2h
SStream_concat0(O, ".f16.f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
break;
case 32:
// MVE_VCVTf16s16_fix, MVE_VCVTf16s16n, VCVTs2hd, VCVTs2hq, VCVTxs2hd, VC...
SStream_concat0(O, ".f16.s16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16S16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10112,7 +10098,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 33:
// MVE_VCVTf16u16_fix, MVE_VCVTf16u16n, VCVTu2hd, VCVTu2hq, VCVTxu2hd, VC...
SStream_concat0(O, ".f16.u16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16U16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10120,7 +10105,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 34:
// MVE_VCVTf32f16bh, MVE_VCVTf32f16th, VCVTBHS, VCVTTHS, VCVTh2f
SStream_concat0(O, ".f32.f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32F16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10129,7 +10113,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 35:
// MVE_VCVTf32s32_fix, MVE_VCVTf32s32n, VCVTs2fd, VCVTs2fq, VCVTxs2fd, VC...
SStream_concat0(O, ".f32.s32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32S32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10137,7 +10120,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 36:
// MVE_VCVTf32u32_fix, MVE_VCVTf32u32n, VCVTu2fd, VCVTu2fq, VCVTxu2fd, VC...
SStream_concat0(O, ".f32.u32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32U32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10145,7 +10127,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 37:
// MVE_VCVTs16f16_fix, MVE_VCVTs16f16a, MVE_VCVTs16f16m, MVE_VCVTs16f16n,...
SStream_concat0(O, ".s16.f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S16F16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10153,7 +10134,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 38:
// MVE_VCVTs32f32_fix, MVE_VCVTs32f32a, MVE_VCVTs32f32m, MVE_VCVTs32f32n,...
SStream_concat0(O, ".s32.f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S32F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10161,7 +10141,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 39:
// MVE_VCVTu16f16_fix, MVE_VCVTu16f16a, MVE_VCVTu16f16m, MVE_VCVTu16f16n,...
SStream_concat0(O, ".u16.f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U16F16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10169,7 +10148,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 40:
// MVE_VCVTu32f32_fix, MVE_VCVTu32f32a, MVE_VCVTu32f32m, MVE_VCVTu32f32n,...
SStream_concat0(O, ".u32.f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U32F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10188,19 +10166,16 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 43:
// MVE_VLDRDU64_qi, MVE_VLDRDU64_qi_pre, MVE_VLDRDU64_rq, MVE_VLDRDU64_rq...
SStream_concat0(O, ".u64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U64);
break;
case 44:
// MVE_VMOVimmi64, VADDHNv2i32, VADDv1i64, VADDv2i64, VMOVNv2i32, VMOVv1i...
SStream_concat0(O, ".i64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_I64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
break;
case 45:
// MVE_VMULLBp16, MVE_VMULLTp16
SStream_concat0(O, ".p16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_P16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10211,7 +10186,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 46:
// MVE_VMULLBp8, MVE_VMULLTp8, VMULLp8, VMULpd, VMULpq
SStream_concat0(O, ".p8\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_P8);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10232,7 +10206,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 49:
// VCVTBDH, VCVTTDH
SStream_concat0(O, ".f16.f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 2, O);
@@ -10241,7 +10214,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 50:
// VCVTBHD, VCVTTHD
SStream_concat0(O, ".f64.f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64F16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10250,7 +10222,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 51:
// VCVTDS
SStream_concat0(O, ".f64.f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10259,7 +10230,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 52:
// VCVTSD
SStream_concat0(O, ".f32.f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10268,7 +10238,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 53:
// VJCVT, VTOSIRD, VTOSIZD, VTOSLD
SStream_concat0(O, ".s32.f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S32F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10339,14 +10308,12 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 67:
// VQADDsv1i64, VQADDsv2i64, VQMOVNsuv2i32, VQMOVNsv2i32, VQRSHLsv1i64, V...
SStream_concat0(O, ".s64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
break;
case 68:
// VSHTOD
SStream_concat0(O, ".f64.s16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64S16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10357,7 +10324,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 69:
// VSHTOS
SStream_concat0(O, ".f32.s16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32S16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10368,7 +10334,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 70:
// VSITOD, VSLTOD
SStream_concat0(O, ".f64.s32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64S32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10376,7 +10341,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 71:
// VSITOH, VSLTOH
SStream_concat0(O, ".f16.s32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16S32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10384,7 +10348,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 72:
// VTOSHD
SStream_concat0(O, ".s16.f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S16F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10395,7 +10358,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 73:
// VTOSHS
SStream_concat0(O, ".s16.f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S16F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10406,7 +10368,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 74:
// VTOSIRH, VTOSIZH, VTOSLH
SStream_concat0(O, ".s32.f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_S32F16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10414,7 +10375,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 75:
// VTOUHD
SStream_concat0(O, ".u16.f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U16F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10425,7 +10385,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 76:
// VTOUHS
SStream_concat0(O, ".u16.f32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U16F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10436,7 +10395,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 77:
// VTOUIRD, VTOUIZD, VTOULD
SStream_concat0(O, ".u32.f64\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U32F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10444,7 +10402,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 78:
// VTOUIRH, VTOUIZH, VTOULH
SStream_concat0(O, ".u32.f16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_U32F16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10452,7 +10409,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 79:
// VUHTOD
SStream_concat0(O, ".f64.u16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64U16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10463,7 +10419,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 80:
// VUHTOS
SStream_concat0(O, ".f32.u16\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F32U16);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10474,7 +10429,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 81:
// VUITOD, VULTOD
SStream_concat0(O, ".f64.u32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F64U32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
@@ -10482,7 +10436,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
case 82:
// VUITOH, VULTOH
SStream_concat0(O, ".f16.u32\t");
+ ARM_add_vector_data(MI, ARM_VECTORDATA_F16U32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
external/capstone/suite/auto-sync/inc_patches/ARM/03_vector_size.patch
Vendored
+90
View File
@@ -0,0 +1,90 @@
diff --git a/arch/ARM/ARMGenAsmWriter.inc b/arch/ARM/ARMGenAsmWriter.inc
index 33fa7815..b8b7182d 100644
--- a/arch/ARM/ARMGenAsmWriter.inc
+++ b/arch/ARM/ARMGenAsmWriter.inc
@@ -9939,28 +9939,31 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
// Fragment 1 encoded into 7 bits for 89 unique commands.
switch ((Bits >> 19) & 127) {
default: CS_ASSERT_RET(0 && "Invalid command number.");
case 0:
// ASRi, ASRr, ITasm, LDRBT_POST, LDRConstPool, LDRHTii, LDRSBTii, LDRSHT...
SStream_concat1(O, ' ');
break;
case 1:
// VLD1LNdAsm_16, VLD1LNdWB_fixed_Asm_16, VLD1LNdWB_register_Asm_16, VLD2...
SStream_concat0(O, ".16\t");
+ ARM_add_vector_size(MI, 16);
break;
case 2:
// VLD1LNdAsm_32, VLD1LNdWB_fixed_Asm_32, VLD1LNdWB_register_Asm_32, VLD2...
SStream_concat0(O, ".32\t");
+ ARM_add_vector_size(MI, 32);
break;
case 3:
// VLD1LNdAsm_8, VLD1LNdWB_fixed_Asm_8, VLD1LNdWB_register_Asm_8, VLD2LNd...
SStream_concat0(O, ".8\t");
+ ARM_add_vector_size(MI, 8);
break;
case 4:
// t2LDRB_OFFSET_imm, t2LDRB_POST_imm, t2LDRB_PRE_imm, t2LDRH_OFFSET_imm,...
SStream_concat0(O, ".w ");
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
break;
case 5:
// ADCri, ADCrr, ADCrsi, ADDri, ADDrr, ADDrsi, ADR, ANDri, ANDrr, ANDrsi,...
SStream_concat0(O, "\t");
@@ -10082,20 +10085,21 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
ARM_add_vector_data(MI, ARM_VECTORDATA_I16);
break;
case 29:
// MVE_VADD_qr_i8, MVE_VADDi8, MVE_VCADDi8, MVE_VCLZs8, MVE_VCMPi8, MVE_V...
SStream_concat0(O, ".i8\t");
ARM_add_vector_data(MI, ARM_VECTORDATA_I8);
break;
case 30:
// MVE_VCTP64, MVE_VSTRD64_qi, MVE_VSTRD64_qi_pre, MVE_VSTRD64_rq, MVE_VS...
SStream_concat0(O, ".64\t");
+ ARM_add_vector_size(MI, 64);
break;
case 31:
// MVE_VCVTf16f32bh, MVE_VCVTf16f32th, VCVTBSH, VCVTTSH, VCVTf2h
SStream_concat0(O, ".f16.f32\t");
ARM_add_vector_data(MI, ARM_VECTORDATA_F16F32);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
break;
case 32:
// MVE_VCVTf16s16_fix, MVE_VCVTf16s16n, VCVTs2hd, VCVTs2hq, VCVTxs2hd, VC...
@@ -10265,28 +10269,31 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
// VJCVT, VTOSIRD, VTOSIZD, VTOSLD
SStream_concat0(O, ".s32.f64\t");
ARM_add_vector_data(MI, ARM_VECTORDATA_S32F64);
printOperand(MI, 0, O);
SStream_concat0(O, ", ");
printOperand(MI, 1, O);
break;
case 54:
// VLD1LNd16, VLD1LNd16_UPD, VLD2LNd16, VLD2LNd16_UPD, VLD2LNq16, VLD2LNq...
SStream_concat0(O, ".16\t{");
+ ARM_add_vector_size(MI, 16);
break;
case 55:
// VLD1LNd32, VLD1LNd32_UPD, VLD2LNd32, VLD2LNd32_UPD, VLD2LNq32, VLD2LNq...
SStream_concat0(O, ".32\t{");
+ ARM_add_vector_size(MI, 32);
break;
case 56:
// VLD1LNd8, VLD1LNd8_UPD, VLD2LNd8, VLD2LNd8_UPD, VLD3DUPd8, VLD3DUPd8_U...
SStream_concat0(O, ".8\t{");
+ ARM_add_vector_size(MI, 8);
break;
case 57:
// VLDR_FPCXTNS_off, VLDR_FPCXTNS_post, VLDR_FPCXTNS_pre, VMSR_FPCXTNS, V...
SStream_concat0(O, "\tfpcxtns, ");
break;
case 58:
// VLDR_FPCXTS_off, VLDR_FPCXTS_post, VLDR_FPCXTS_pre, VMSR_FPCXTS, VSTR_...
SStream_concat0(O, "\tfpcxts, ");
break;
case 59:
external/capstone/suite/auto-sync/inc_patches/ARM/04_tPOP_reg_lists_write_attribute.patch
Vendored
+13
View File
@@ -0,0 +1,13 @@
diff --git a/arch/ARM/ARMGenCSMappingInsnOp.inc b/arch/ARM/ARMGenCSMappingInsnOp.inc
index 749cdb85..4abfd4b8 100644
--- a/arch/ARM/ARMGenCSMappingInsnOp.inc
+++ b/arch/ARM/ARMGenCSMappingInsnOp.inc
@@ -36878,7 +36878,7 @@
{
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
{ CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* p - i32imm */
- { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
+ { CS_OP_IMM, CS_AC_WRITE, { CS_DATA_TYPE_i32, CS_DATA_TYPE_LAST } }, /* regs */
{ CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_LAST } }, /* */
{ 0 }
}},