Mem and Regs not part of cpu anymore.

This commit is contained in:
SimoZ64
2025-08-01 21:05:11 +02:00
parent 812b905bdf
commit 010bb5e0bb
35 changed files with 246 additions and 250 deletions

View File

@@ -88,8 +88,8 @@ auto RSP::Read(const u32 addr) -> u32 {
}
void RSP::WriteStatus(const u32 value) {
Mem& mem = Core::GetInstance().cpu->GetMem();
Registers& regs = Core::GetInstance().cpu->GetRegs();
Mem& mem = Core::GetMem();
Registers& regs = Core::GetRegs();
MI &mi = mem.mmio.mi;
const auto write = SPStatusWrite{.raw = value};
if (write.clearHalt && !write.setHalt) {
@@ -130,7 +130,7 @@ void RSP::WriteStatus(const u32 value) {
template <>
void RSP::DMA<true>() {
Mem& mem = Core::GetInstance().cpu->GetMem();
Mem& mem = Core::GetMem();
u32 length = spDMALen.len + 1;
length = (length + 0x7) & ~0x7;
@@ -163,7 +163,7 @@ void RSP::DMA<true>() {
template <>
void RSP::DMA<false>() {
Mem& mem = Core::GetInstance().cpu->GetMem();
Mem& mem = Core::GetMem();
u32 length = spDMALen.len + 1;
length = (length + 0x7) & ~0x7;