These should be throwing

This commit is contained in:
SimoneN64
2023-11-13 16:50:17 +01:00
parent 22fe515459
commit 091557478a

View File

@@ -145,12 +145,14 @@ FORCE_INLINE void SetCauseByArgWCVT(Registers& regs, T f) {
case FP_INFINITE: case FP_INFINITE:
case FP_SUBNORMAL: case FP_SUBNORMAL:
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
break; break;
case FP_NORMAL: case FP_NORMAL:
// Check overflow // Check overflow
if (f >= 2147483648.0f || f < -2147483648.0f) { if (f >= 2147483648.0f || f < -2147483648.0f) {
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
} }
break; break;
@@ -166,12 +168,14 @@ FORCE_INLINE void SetCauseByArgLCVT(Registers& regs, T f) {
case FP_INFINITE: case FP_INFINITE:
case FP_SUBNORMAL: case FP_SUBNORMAL:
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
break; break;
case FP_NORMAL: case FP_NORMAL:
// Check overflow // Check overflow
if (f >= 9007199254740992.000000 || f <= -9007199254740992.000000) { if (f >= 9007199254740992.000000 || f <= -9007199254740992.000000) {
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
} }
break; break;
@@ -248,12 +252,15 @@ FORCE_INLINE void SetCauseByArg(Registers& regs, T f) {
case FP_NAN: case FP_NAN:
if(isqnan(f)) { if(isqnan(f)) {
regs.cop1.SetCauseInvalid(regs); regs.cop1.SetCauseInvalid(regs);
CheckFPUException();
} else { } else {
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
} }
break; break;
case FP_SUBNORMAL: case FP_SUBNORMAL:
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
break; break;
case FP_INFINITE: case FP_INFINITE:
case FP_ZERO: case FP_ZERO:
@@ -287,6 +294,7 @@ FORCE_INLINE void SetCauseOnResult(Registers& regs, T& d) {
case FP_SUBNORMAL: case FP_SUBNORMAL:
if (!cop1.fcr31.fs || cop1.fcr31.enable_underflow || cop1.fcr31.enable_inexact_operation) { if (!cop1.fcr31.fs || cop1.fcr31.enable_underflow || cop1.fcr31.enable_inexact_operation) {
regs.cop1.SetCauseUnimplemented(regs); regs.cop1.SetCauseUnimplemented(regs);
CheckFPUException();
} else { } else {
// Since the if statement checks for the corresponding enable bits, it's safe to turn these cause bits on here. // Since the if statement checks for the corresponding enable bits, it's safe to turn these cause bits on here.
regs.cop1.SetCauseUnderflow(regs); regs.cop1.SetCauseUnderflow(regs);