Share registers between both cores
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@@ -25,7 +25,7 @@ CartInfo Core::LoadROM(const std::string& rom_) {
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romLoaded = true;
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CartInfo cartInfo = mem.LoadROM(rom);
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DoPIFHLE(mem, CpuGetRegs(), cartInfo);
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DoPIFHLE(mem, regs, cartInfo);
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return cartInfo;
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}
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@@ -33,7 +33,6 @@ CartInfo Core::LoadROM(const std::string& rom_) {
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void Core::Run(Window& window, float volumeL, float volumeR) {
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MMIO& mmio = mem.mmio;
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Controller& controller = mmio.si.controller;
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Registers& regs = CpuGetRegs();
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for(int field = 0; field < mmio.vi.numFields; field++) {
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int frameCycles = 0;
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@@ -46,7 +45,7 @@ void Core::Run(Window& window, float volumeL, float volumeR) {
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}
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for(;cycles <= mmio.vi.cyclesPerHalfline; cycles++, frameCycles++) {
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CpuStep(mem);
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CpuStep();
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if(!mmio.rsp.spStatus.halt) {
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regs.steps++;
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if(regs.steps > 2) {
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@@ -74,7 +73,7 @@ void Core::Run(Window& window, float volumeL, float volumeR) {
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UpdateScreenParallelRdp(*this, window, GetVI());
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int missedCycles = N64_CYCLES_PER_FRAME - frameCycles;
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mmio.ai.Step(mem, CpuGetRegs(), missedCycles, volumeL, volumeR);
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mmio.ai.Step(mem, regs, missedCycles, volumeL, volumeR);
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} else if(pause && romLoaded) {
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UpdateScreenParallelRdp(*this, window, GetVI());
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} else if(pause && !romLoaded) {
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