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Share registers between both cores

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This commit is contained in:
CocoSimone
2022-12-25 00:01:31 +01:00
parent 20115595be
commit 138c3f6a98
10 changed files with 335 additions and 352 deletions
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18
src/backend/Core.hpp
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@@ -24,22 +24,15 @@ struct Core {
void CpuReset() {
switch(cpuType) {
case CpuType::Dynarec: cpuDynarec.Reset(); break;
case CpuType::Interpreter: cpuInterp.Reset(); break;
case CpuType::Dynarec: break;
case CpuType::Interpreter: break;
}
}
void CpuStep(Mem& mem) {
void CpuStep() {
switch(cpuType) {
case CpuType::Dynarec: cpuDynarec.Step(mem); break;
case CpuType::Interpreter: cpuInterp.Step(mem); break;
}
}
Registers& CpuGetRegs() {
switch(cpuType) {
case CpuType::Dynarec: return cpuDynarec.regs;
case CpuType::Interpreter: return cpuInterp.regs;
case CpuType::Dynarec: cpuDynarec.Step(mem, regs); break;
case CpuType::Interpreter: cpuInterp.Step(regs, mem); break;
}
}
@@ -56,5 +49,6 @@ struct Core {
CpuType cpuType = CpuType::Dynarec;
Interpreter cpuInterp;
Dynarec cpuDynarec;
Registers regs;
};
}