Initial work for comment detail in debugger
This commit is contained in:
@@ -1,99 +1,9 @@
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#include <Disassembler.hpp>
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#include <Core.hpp>
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#include <optional>
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Disassembler::DisassemblyResult Disassembler::DisassembleSimple(const u32 address, const u32 instruction) const {
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cs_insn *insn;
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const auto bytes = Util::IntegralToBuffer(std::byteswap(instruction));
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const auto count = cs_disasm(handle, bytes.data(), bytes.size(), address, 0, &insn);
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if (count <= 0)
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return {};
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DisassemblyResult result{true, std::format("0x{:016X}:\t{}\t{}", insn[0].address, insn[0].mnemonic, insn[0].op_str)};
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cs_free(insn, count);
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return result;
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}
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[[nodiscard]] Disassembler::DisassemblyResult Disassembler::Disassemble(const u32 address) const {
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n64::Core& core = n64::Core::GetInstance();
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n64::Mem& mem = core.cpu->GetMem();
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u32 paddr;
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if(!core.cpu->GetRegs().cop0.MapVAddr(n64::Cop0::TLBAccessType::LOAD, address, paddr))
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return DisassemblyResult{false, ""};
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u32 instruction = mem.Read<u32>(paddr);
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return details ? DisassembleDetailed(address, instruction) : DisassembleSimple(address, instruction);
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}
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Disassembler::DisassemblyResult Disassembler::DisassembleDetailed(const u32 address, const u32 instruction) const {
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cs_insn *insn;
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const auto bytes = Util::IntegralToBuffer(std::byteswap(instruction));
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const auto count = cs_disasm(handle, bytes.data(), bytes.size(), address, 0, &insn);
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if (count <= 0)
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return {};
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DisassemblyResult result{true};
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result.address = insn[0].address;
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result.mnemonic = insn[0].mnemonic;
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result.full += std::format("0x{:016X}", result.address) + ":\t";
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result.full += result.mnemonic + "\t";
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result.comment = "// ";
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const cs_detail *details = insn[0].detail;
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auto formatOperand = [&](const cs_mips_op &operand) {
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switch (operand.type) {
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case MIPS_OP_IMM:
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return DisassemblyResult::Operand{
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0xffcbf1ae,
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std::format("#{:X}", operand.is_unsigned ? operand.uimm : operand.imm)
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};
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case MIPS_OP_MEM:
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return DisassemblyResult::Operand{
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0xffaef1c3,
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std::format("{}(0x{:X})", cs_reg_name(handle, operand.mem.base), operand.mem.disp)
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};
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case MIPS_OP_REG:
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return DisassemblyResult::Operand{
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0xffaef1eb,
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std::format("{}", cs_reg_name(handle, operand.reg))
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};
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default:
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return DisassemblyResult::Operand { 0xff808080, "" };
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}
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};
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auto formatComment = [&](const cs_mips_op &operand) -> std::string {
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switch (operand.type) {
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case MIPS_OP_IMM:
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return std::format("#{:X}", operand.is_unsigned ? operand.uimm : operand.imm);
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case MIPS_OP_MEM:
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return std::format("{}(0x{:X})", CapstoneToRegValue(operand.mem.base), operand.mem.disp);
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case MIPS_OP_REG:
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return std::format("{}", CapstoneToRegValue(operand.reg));
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default:
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return "! Unknown !";
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}
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};
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for (u8 i = 0; i < details->mips.op_count && i < 3; i++) {
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result.ops[i] = formatOperand(details->mips.operands[i]);
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result.comment += formatComment(details->mips.operands[i]) + " ";
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result.full += result.ops[i].str + "\t";
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}
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result.full += result.comment;
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cs_free(insn, count);
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return result;
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}
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std::string Disassembler::CapstoneToRegValue(mips_reg reg) const {
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template <>
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std::optional<u64> Disassembler::CapstoneToRegValue(mips_reg reg) const {
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n64::Registers& regs = n64::Core::GetInstance().cpu->GetRegs();
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u64 val = 0;
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switch(reg) {
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@@ -191,8 +101,109 @@ std::string Disassembler::CapstoneToRegValue(mips_reg reg) const {
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val = regs.Read<u64>(31);
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break;
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default:
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return "! Unknown !";
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return {};
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}
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return std::format("{} (= 0x{:016X})", cs_reg_name(handle, reg), val);
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return val;
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}
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template <>
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std::string Disassembler::CapstoneToRegValue(mips_reg reg) const {
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n64::Registers& regs = n64::Core::GetInstance().cpu->GetRegs();
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auto val = CapstoneToRegValue<std::optional<u64>>(reg);
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return std::format("{}", val.has_value() ? std::format("{} (= 0x{:016X})", cs_reg_name(handle, reg), val.value()) : "! Unknown !");
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}
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Disassembler::DisassemblyResult Disassembler::DisassembleSimple(const u32 address, const u32 instruction) const {
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cs_insn *insn;
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const auto bytes = Util::IntegralToBuffer(std::byteswap(instruction));
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const auto count = cs_disasm(handle, bytes.data(), bytes.size(), address, 0, &insn);
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if (count <= 0)
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return {};
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DisassemblyResult result{true, std::format("0x{:016X}:\t{}\t{}", insn[0].address, insn[0].mnemonic, insn[0].op_str)};
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cs_free(insn, count);
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return result;
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}
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[[nodiscard]] Disassembler::DisassemblyResult Disassembler::Disassemble(const u32 address) const {
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n64::Core& core = n64::Core::GetInstance();
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n64::Mem& mem = core.cpu->GetMem();
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u32 paddr;
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if(!core.cpu->GetRegs().cop0.MapVAddr(n64::Cop0::TLBAccessType::LOAD, address, paddr))
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return DisassemblyResult{false, ""};
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u32 instruction = mem.Read<u32>(paddr);
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return details ? DisassembleDetailed(address, instruction) : DisassembleSimple(address, instruction);
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}
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Disassembler::DisassemblyResult Disassembler::DisassembleDetailed(const u32 address, const u32 instruction) const {
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n64::Core& core = n64::Core::GetInstance();
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cs_insn *insn;
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const auto bytes = Util::IntegralToBuffer(std::byteswap(instruction));
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const auto count = cs_disasm(handle, bytes.data(), bytes.size(), address, 0, &insn);
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if (count <= 0)
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return {};
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DisassemblyResult result{true};
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result.address = insn[0].address;
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result.mnemonic = insn[0].mnemonic;
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result.full += std::format("0x{:016X}", result.address) + ":\t";
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result.full += result.mnemonic + "\t";
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const cs_detail *details = insn[0].detail;
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auto formatOperand = [&](const cs_mips_op &operand) {
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switch (operand.type) {
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case MIPS_OP_IMM:
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return DisassemblyResult::Operand{
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0xffcbf1ae,
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std::format("#{:X}", operand.is_unsigned ? operand.uimm : operand.imm)
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};
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case MIPS_OP_MEM:
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return DisassemblyResult::Operand{
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0xffaef1c3,
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std::format("{}(0x{:X})", cs_reg_name(handle, operand.mem.base), operand.mem.disp)
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};
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case MIPS_OP_REG:
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return DisassemblyResult::Operand{
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0xffaef1eb,
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std::format("{}", cs_reg_name(handle, operand.reg))
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};
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default:
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return DisassemblyResult::Operand { 0xff808080, "" };
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}
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};
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auto formatComment = [&](const cs_mips_op &operand) -> CommentPart {
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switch (operand.type) {
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case MIPS_OP_IMM:
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return {std::format("#{:X}, ", operand.is_unsigned ? operand.uimm : operand.imm)};
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case MIPS_OP_MEM:
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return {
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std::format("{}(0x{:X}), ", CapstoneToRegValue<std::string>(operand.mem.base), operand.mem.disp),
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CapstoneToRegValue<std::optional<u64>>(operand.mem.base).value() + (s16)operand.mem.disp,
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};
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case MIPS_OP_REG:
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return {std::format("{}, ", CapstoneToRegValue<std::string>(operand.reg))};
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default:
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return {"! Unknown !"};
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}
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};
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for (u8 i = 0; i < details->mips.op_count && i < 3; i++) {
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result.ops[i] = formatOperand(details->mips.operands[i]);
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result.comment[i] = formatComment(details->mips.operands[i]);
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result.full += result.ops[i].str + "\t";
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}
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cs_free(insn, count);
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return result;
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}
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@@ -5,6 +5,11 @@
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#include <array>
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struct Disassembler {
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struct CommentPart {
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std::string str;
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u64 resolvedAddr = 0xFFFF'FFFF'FFFF'FFFFull;
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};
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struct DisassemblyResult {
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bool success = false;
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std::string full;
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@@ -15,7 +20,23 @@ struct Disassembler {
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std::string str;
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};
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std::array<Operand, 3> ops{};
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std::string comment;
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std::array<CommentPart, 3> comment{};
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std::string GetFormattedComment() {
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std::string res{};
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for(auto& [str, _] : comment) {
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res += str;
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}
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return res;
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}
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u64 GetResolvedAddressFromComment() {
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auto it = std::ranges::find_if(comment, [](auto& part) {
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return part.resolvedAddr != 0xFFFF'FFFF'FFFF'FFFFull;
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});
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if(it == comment.end()) return 0xFFFF'FFFF'FFFF'FFFFull;
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return it->resolvedAddr;
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}
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};
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~Disassembler() { cs_close(&handle); }
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@@ -24,13 +45,13 @@ struct Disassembler {
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static Disassembler ret(rsp);
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return ret;
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}
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[[nodiscard]] DisassemblyResult Disassemble(const u32 address) const;
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[[nodiscard]] DisassemblyResult DisassembleDetailed(u32 address, u32 instruction) const;
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[[nodiscard]] DisassemblyResult DisassembleSimple(u32 address, u32 instruction) const;
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private:
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std::string CapstoneToRegValue(mips_reg reg) const;
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template <typename T>
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T CapstoneToRegValue(mips_reg reg) const;
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explicit Disassembler(const bool rsp) : rsp(rsp) {
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if (cs_open(CS_ARCH_MIPS, static_cast<cs_mode>((rsp ? CS_MODE_32 : CS_MODE_64) | CS_MODE_BIG_ENDIAN), &handle) !=
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CS_ERR_OK) {
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