unmap cartridge and imem/dmem from fastmem (checks outweighed the performance) + support for PAL framerate
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@@ -1,6 +1,5 @@
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#include <core/Interpreter.hpp>
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#define se_imm(x) ((s16)((x) & 0xFFFF))
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#define check_address_error(mask, vaddr) (((!regs.cop0.is_64bit_addressing) && (s32)(vaddr) != (vaddr)) || (((vaddr) & (mask)) != 0))
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#define check_signed_overflow(op1, op2, res) (((~((op1) ^ (op2)) & ((op1) ^ (res))) >> ((sizeof(res) * 8) - 1)) & 1)
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#define check_signed_underflow(op1, op2, res) (((((op1) ^ (op2)) & ((op1) ^ (res))) >> ((sizeof(res) * 8) - 1)) & 1)
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@@ -161,27 +160,31 @@ void Interpreter::branch_likely(bool cond, s64 address) {
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}
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void Interpreter::b(u32 instr, bool cond) {
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s64 offset = (s64)se_imm(instr) << 2;
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s16 imm = instr;
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s64 offset = (s64)imm << 2;
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s64 address = regs.pc + offset;
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branch(cond, address);
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}
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void Interpreter::blink(u32 instr, bool cond) {
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regs.gpr[31] = regs.nextPC;
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s64 offset = (s64)se_imm(instr) << 2;
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s16 imm = instr;
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s64 offset = (s64)imm << 2;
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s64 address = regs.pc + offset;
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branch(cond, address);
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}
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void Interpreter::bl(u32 instr, bool cond) {
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s64 offset = (s64)se_imm(instr) << 2;
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s16 imm = instr;
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s64 offset = (s64)imm << 2;
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s64 address = regs.pc + offset;
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branch_likely(cond, address);
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}
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void Interpreter::bllink(u32 instr, bool cond) {
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regs.gpr[31] = regs.nextPC;
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s64 offset = (s64)se_imm(instr) << 2;
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s16 imm = instr;
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s64 offset = (s64)imm << 2;
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s64 address = regs.pc + offset;
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branch_likely(cond, address);
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}
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@@ -605,11 +608,13 @@ void Interpreter::jalr(u32 instr) {
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}
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void Interpreter::slti(u32 instr) {
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regs.gpr[RT(instr)] = regs.gpr[RS(instr)] < se_imm(instr);
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s16 imm = instr;
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regs.gpr[RT(instr)] = regs.gpr[RS(instr)] < imm;
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}
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void Interpreter::sltiu(u32 instr) {
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regs.gpr[RT(instr)] = (u64)regs.gpr[RS(instr)] < se_imm(instr);
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s16 imm = instr;
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regs.gpr[RT(instr)] = (u64)regs.gpr[RS(instr)] < imm;
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}
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void Interpreter::slt(u32 instr) {
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