Lay down initial PI bus latch implementation
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@@ -1,6 +1,7 @@
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#pragma once
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#include <queue>
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#include <array>
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#include <functional>
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#include <log.hpp>
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namespace n64 {
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@@ -8,9 +9,17 @@ struct Mem;
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struct Registers;
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}
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enum EventType {
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NONE,
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PI_BUS_WRITE_COMPLETE,
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PI_DMA_COMPLETE,
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SI_DMA,
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IMPOSSIBLE
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};
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struct Event {
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u64 time = 0;
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void(*handler)(n64::Mem&, n64::Registers&) = nullptr;
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u64 time;
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EventType type;
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friend bool operator<(const Event& rhs, const Event& lhs) {
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return rhs.time < lhs.time;
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@@ -27,26 +36,14 @@ struct Event {
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struct Scheduler {
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Scheduler() {
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enqueueAbsolute(Event{std::numeric_limits<u64>::max(), [](n64::Mem&, n64::Registers&) {
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Util::panic("How the fuck did we get here?!");
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}});
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enqueueAbsolute(std::numeric_limits<u64>::max(), IMPOSSIBLE);
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}
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FORCE_INLINE void enqueueRelative(const Event& event) {
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enqueueAbsolute({event.time + ticks, event.handler});
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}
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FORCE_INLINE void enqueueAbsolute(const Event& e) {
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events.push(e);
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}
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FORCE_INLINE void tick(u64 t, n64::Mem& mem, n64::Registers& regs) {
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ticks += t;
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while(ticks >= events.top().time) {
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events.top().handler(mem, regs);
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events.pop();
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}
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}
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void enqueueRelative(u64, const EventType);
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void enqueueAbsolute(u64, const EventType);
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u64 remove(const EventType);
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void tick(u64 t, n64::Mem&, n64::Registers&);
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std::priority_queue<Event, std::vector<Event>, std::greater<>> events;
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u64 ticks = 0;
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u8 index = 0;
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