iris/kaizen
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Lay down initial PI bus latch implementation

Browse Source
This commit is contained in:
SimoneN64
2023-11-06 14:34:17 +01:00
parent e75ea2beb7
commit 4331981d34
12 changed files with 252 additions and 113 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
src/backend/core/mmio/PI.hpp
View File

@@ -12,15 +12,18 @@ struct PI {
void Reset();
auto Read(MI&, u32) const -> u32;
void Write(Mem&, Registers&, u32, u32);
auto BusRead8(Mem&, u32) const -> u8;
auto BusRead8(Mem&, u32) -> u8;
void BusWrite8(Mem&, u32, u32);
auto BusRead16(Mem&, u32) const -> u16;
auto BusRead16(Mem&, u32) -> u16;
void BusWrite16(Mem&, u32, u16);
auto BusRead32(Mem&, u32) const -> u32;
auto BusRead32(Mem&, u32) -> u32;
void BusWrite32(Mem&, u32, u32);
auto BusRead64(Mem&, u32) const -> u64;
auto BusRead64(Mem&, u32) -> u64;
void BusWrite64(Mem&, u32, u64);
bool dmaBusy{}, ioBusy{};
bool ReadLatch();
bool WriteLatch(u32 val);
bool dmaBusy{}, ioBusy{}, toCart{};
u32 latch;
u32 dramAddr{}, cartAddr{}, dramAddrInternal{}, cartAddrInternal{};
u32 rdLen{}, wrLen{};
u32 pi_bsd_dom1_lat{}, pi_bsd_dom2_lat{};