Restructure
This commit is contained in:
277
src/backend/core/mmio/PIF.cpp
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277
src/backend/core/mmio/PIF.cpp
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#include <core/mmio/PIF.hpp>
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#include <core/Mem.hpp>
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#include <core/registers/Registers.hpp>
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#include <log.hpp>
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#include <MupenMovie.hpp>
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namespace n64 {
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static int channel = 0;
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void ProcessPIFCommands(u8* pifRam, Controller& controller, Mem& mem) {
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u8 control = pifRam[63];
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if(control & 1) {
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channel = 0;
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for(int i = 0; i < 63;) {
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u8* cmd = &pifRam[i++];
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u8 t = cmd[0] & 0x3f;
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if(t == 0 || t == 0x3D) {
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channel++;
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} else if (t == 0x3E) {
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break;
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} else if (t == 0x3F) {
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continue;
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} else {
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u8 r = pifRam[i++];
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r |= (1 << 7);
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if(r == 0xFE) {
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break;
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}
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u8 rlen = r & 0x3F;
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u8* res = &pifRam[i + t];
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switch(cmd[2]) {
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case 0xff:
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res[0] = 0x05;
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res[1] = 0x00;
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res[2] = 0x01;
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channel++;
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break;
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case 0:
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res[0] = 0x05;
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res[1] = 0x00;
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res[2] = 0x01;
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break;
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case 1:
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if(tas_movie_loaded()) {
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controller = tas_next_inputs();
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}
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res[0] = controller.byte1;
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res[1] = controller.byte2;
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res[2] = controller.joy_x;
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res[3] = controller.joy_y;
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break;
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case 2: case 3: res[0] = 0; break;
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default: util::panic("Unimplemented PIF command {}", cmd[2]);
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}
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i += t + rlen;
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}
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}
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}
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if(control & 8) {
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pifRam[63] &= ~8;
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}
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if (control & 0x30) {
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pifRam[63] = 0x80;
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}
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}
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void DoPIFHLE(Mem& mem, Registers& regs, CartInfo cartInfo) {
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u32 cicType = cartInfo.cicType;
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bool pal = cartInfo.isPAL;
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mem.Write32<false>(regs, 0x1FC007E4, cicSeeds[cicType], regs.pc);
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switch(cicType) {
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case CIC_NUS_6101:
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mem.Write32<false>(regs, 0x318, RDRAM_SIZE, regs.pc);
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regs.gpr[2] = (s64)0xFFFFFFFFDF6445CC;
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regs.gpr[3] = (s64)0xFFFFFFFFDF6445CC;
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regs.gpr[4] = 0x45CC;
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regs.gpr[5] = 0x73EE317A;
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regs.gpr[6] = (s64)0xFFFFFFFFA4001F0C;
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regs.gpr[7] = (s64)0xFFFFFFFFA4001F08;
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regs.gpr[8] = 0xC0;
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regs.gpr[10] = 0x40;
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regs.gpr[11] = (s64)0xFFFFFFFFA4000040;
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regs.gpr[12] = (s64)0xFFFFFFFFC7601FAC;
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regs.gpr[13] = (s64)0xFFFFFFFFC7601FAC;
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regs.gpr[14] = (s64)0xFFFFFFFFB48E2ED6;
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regs.gpr[15] = (s64)0xFFFFFFFFBA1A7D4B;
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regs.gpr[20] = 0x0000000000000001;
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regs.gpr[22] = 0x000000000000003F;
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regs.gpr[23] = 0x0000000000000001;
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regs.gpr[24] = 0x0000000000000002;
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regs.gpr[25] = (s64)0xFFFFFFFF905F4718;
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regs.gpr[29] = (s64)0xFFFFFFFFA4001FF0;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001550;
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regs.lo = (s64)0xFFFFFFFFBA1A7D4B;
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regs.hi = (s64)0xFFFFFFFF997EC317;
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break;
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case CIC_NUS_7102:
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mem.Write32<false>(regs, 0x318, RDRAM_SIZE, regs.pc);
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regs.gpr[1] = 0x0000000000000001;
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regs.gpr[2] = 0x000000001E324416;
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regs.gpr[3] = 0x000000001E324416;
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regs.gpr[4] = 0x0000000000004416;
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regs.gpr[5] = 0x000000000EC5D9AF;
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regs.gpr[6] = (s64)0xFFFFFFFFA4001F0C;
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regs.gpr[7] = (s64)0xFFFFFFFFA4001F08;
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regs.gpr[8] = 0x00000000000000C0;
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regs.gpr[10] = 0x0000000000000040;
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regs.gpr[11] = (s64)0xFFFFFFFFA4000040;
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regs.gpr[12] = 0x00000000495D3D7B;
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regs.gpr[13] = (s64)0xFFFFFFFF8B3DFA1E;
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regs.gpr[14] = 0x000000004798E4D4;
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regs.gpr[15] = (s64)0xFFFFFFFFF1D30682;
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regs.gpr[22] = 0x000000000000003F;
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regs.gpr[23] = 0x0000000000000007;
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regs.gpr[25] = 0x0000000013D05CAB;
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regs.gpr[29] = (s64)0xFFFFFFFFA4001FF0;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001554;
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regs.lo = (s64)0xFFFFFFFFF1D30682;
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regs.hi = 0x0000000010054A98;
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break;
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case CIC_NUS_6102_7101:
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mem.Write32<false>(regs, 0x318, RDRAM_SIZE, regs.pc);
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regs.gpr[1] = 0x0000000000000001;
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regs.gpr[2] = 0x000000000EBDA536;
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regs.gpr[3] = 0x000000000EBDA536;
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regs.gpr[4] = 0x000000000000A536;
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regs.gpr[5] = (s64)0xFFFFFFFFC0F1D859;
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regs.gpr[6] = (s64)0xFFFFFFFFA4001F0C;
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regs.gpr[7] = (s64)0xFFFFFFFFA4001F08;
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regs.gpr[8] = 0x00000000000000C0;
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regs.gpr[10] = 0x0000000000000040;
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regs.gpr[11] = (s64)0xFFFFFFFFA4000040;
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regs.gpr[12] = (s64)0xFFFFFFFFED10D0B3;
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regs.gpr[13] = 0x000000001402A4CC;
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regs.gpr[14] = 0x000000002DE108EA;
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regs.gpr[15] = 0x000000003103E121;
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regs.gpr[20] = 0x0000000000000001;
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regs.gpr[25] = (s64)0xFFFFFFFF9DEBB54F;
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regs.gpr[29] = (s64)0xFFFFFFFFA4001FF0;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001550;
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regs.hi = 0x000000003FC18657;
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regs.lo = 0x000000003103E121;
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if (pal) {
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regs.gpr[20] = 0x0000000000000000;
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regs.gpr[23] = 0x0000000000000006;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001554;
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}
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break;
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case CIC_NUS_6103_7103:
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mem.Write32<false>(regs, 0x318, RDRAM_SIZE, regs.pc);
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regs.gpr[0] = 0x0000000000000000;
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regs.gpr[1] = 0x0000000000000001;
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regs.gpr[2] = 0x0000000049A5EE96;
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regs.gpr[3] = 0x0000000049A5EE96;
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regs.gpr[4] = 0x000000000000EE96;
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regs.gpr[5] = (s64)0xFFFFFFFFD4646273;
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regs.gpr[6] = (s64)0xFFFFFFFFA4001F0C;
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regs.gpr[7] = (s64)0xFFFFFFFFA4001F08;
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regs.gpr[8] = 0x00000000000000C0;
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regs.gpr[9] = 0x0000000000000000;
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regs.gpr[10] = 0x0000000000000040;
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regs.gpr[11] = (s64)0xFFFFFFFFA4000040;
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regs.gpr[12] = (s64)0xFFFFFFFFCE9DFBF7;
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regs.gpr[13] = (s64)0xFFFFFFFFCE9DFBF7;
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regs.gpr[14] = 0x000000001AF99984;
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regs.gpr[15] = 0x0000000018B63D28;
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regs.gpr[16] = 0x0000000000000000;
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regs.gpr[17] = 0x0000000000000000;
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regs.gpr[18] = 0x0000000000000000;
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regs.gpr[19] = 0x0000000000000000;
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regs.gpr[20] = 0x0000000000000001;
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regs.gpr[21] = 0x0000000000000000;
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regs.gpr[23] = 0x0000000000000000;
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regs.gpr[24] = 0x0000000000000000;
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regs.gpr[25] = (s64)0xFFFFFFFF825B21C9;
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regs.gpr[26] = 0x0000000000000000;
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regs.gpr[27] = 0x0000000000000000;
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regs.gpr[28] = 0x0000000000000000;
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regs.gpr[29] = (s64)0xFFFFFFFFA4001FF0;
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regs.gpr[30] = 0x0000000000000000;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001550;
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regs.lo = 0x0000000018B63D28;
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regs.hi = 0x00000000625C2BBE;
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if (pal) {
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regs.gpr[20] = 0x0000000000000000;
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regs.gpr[23] = 0x0000000000000006;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001554;
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}
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break;
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case CIC_NUS_6105_7105:
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mem.Write32<false>(regs, 0x3F0, RDRAM_SIZE, regs.pc);
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regs.gpr[2] = (s64)0xFFFFFFFFF58B0FBF;
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regs.gpr[3] = (s64)0xFFFFFFFFF58B0FBF;
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regs.gpr[4] = 0x0000000000000FBF;
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regs.gpr[5] = (s64)0xFFFFFFFFDECAAAD1;
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regs.gpr[6] = (s64)0xFFFFFFFFA4001F0C;
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regs.gpr[7] = (s64)0xFFFFFFFFA4001F08;
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regs.gpr[8] = 0x00000000000000C0;
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regs.gpr[10] = 0x0000000000000040;
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regs.gpr[11] = (s64)0xFFFFFFFFA4000040;
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regs.gpr[12] = (s64)0xFFFFFFFF9651F81E;
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regs.gpr[13] = 0x000000002D42AAC5;
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regs.gpr[14] = 0x00000000489B52CF;
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regs.gpr[15] = 0x0000000056584D60;
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regs.gpr[20] = 0x0000000000000001;
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regs.gpr[24] = 0x0000000000000002;
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regs.gpr[25] = (s64)0xFFFFFFFFCDCE565F;
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regs.gpr[29] = (s64)0xFFFFFFFFA4001FF0;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001550;
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regs.lo = 0x0000000056584D60;
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regs.hi = 0x000000004BE35D1F;
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if (pal) {
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regs.gpr[20] = 0x0000000000000000;
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regs.gpr[23] = 0x0000000000000006;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001554;
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}
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mem.Write32<false>(regs, 0x04001000, 0x3C0DBFC0, regs.pc);
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mem.Write32<false>(regs, 0x04001004, 0x8DA807FC, regs.pc);
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mem.Write32<false>(regs, 0x04001008, 0x25AD07C0, regs.pc);
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mem.Write32<false>(regs, 0x0400100C, 0x31080080, regs.pc);
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mem.Write32<false>(regs, 0x04001000, 0x5500FFFC, regs.pc);
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mem.Write32<false>(regs, 0x04001004, 0x3C0DBFC0, regs.pc);
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mem.Write32<false>(regs, 0x04001008, 0x8DA80024, regs.pc);
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mem.Write32<false>(regs, 0x0400100C, 0x3C0BB000, regs.pc);
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break;
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case CIC_NUS_6106_7106:
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regs.gpr[2] = (s64)0xFFFFFFFFA95930A4;
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regs.gpr[3] = (s64)0xFFFFFFFFA95930A4;
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regs.gpr[4] = 0x00000000000030A4;
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regs.gpr[5] = (s64)0xFFFFFFFFB04DC903;
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regs.gpr[6] = (s64)0xFFFFFFFFA4001F0C;
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regs.gpr[7] = (s64)0xFFFFFFFFA4001F08;
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regs.gpr[8] = 0x00000000000000C0;
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regs.gpr[10] = 0x0000000000000040;
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regs.gpr[11] = (s64)0xFFFFFFFFA4000040;
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regs.gpr[12] = (s64)0xFFFFFFFFBCB59510;
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regs.gpr[13] = (s64)0xFFFFFFFFBCB59510;
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regs.gpr[14] = 0x000000000CF85C13;
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regs.gpr[15] = 0x000000007A3C07F4;
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regs.gpr[20] = 0x0000000000000001;
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regs.gpr[24] = 0x0000000000000002;
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regs.gpr[25] = 0x00000000465E3F72;
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regs.gpr[29] = (s64)0xFFFFFFFFA4001FF0;
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regs.gpr[30] = 0x0000000000000000;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001550;
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regs.lo = 0x000000007A3C07F4;
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regs.hi = 0x0000000023953898;
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if (pal) {
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regs.gpr[20] = 0x0000000000000000;
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regs.gpr[23] = 0x0000000000000006;
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regs.gpr[31] = (s64)0xFFFFFFFFA4001554;
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}
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break;
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}
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regs.gpr[22] = (cicSeeds[cicType] >> 8) & 0xFF;
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regs.cop0.Reset();
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}
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}
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