iris/kaizen
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Minor nitpicks and smaller perf improvements (barely noticeable)

Browse Source
This commit is contained in:
SimoneN64
2024-10-14 23:25:09 +02:00
parent d2c37d373e
commit 57fd6a9af8
59 changed files with 1547 additions and 1528 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
src/backend/core/Interpreter.cpp
View File

@@ -3,11 +3,11 @@
namespace n64 {
Interpreter::Interpreter(ParallelRDP &parallel) : mem(regs, parallel) {}
bool Interpreter::ShouldServiceInterrupt() {
bool interrupts_pending = (regs.cop0.status.im & regs.cop0.cause.interruptPending) != 0;
bool interrupts_enabled = regs.cop0.status.ie == 1;
bool currently_handling_exception = regs.cop0.status.exl == 1;
bool currently_handling_error = regs.cop0.status.erl == 1;
bool Interpreter::ShouldServiceInterrupt() const {
const bool interrupts_pending = (regs.cop0.status.im & regs.cop0.cause.interruptPending) != 0;
const bool interrupts_enabled = regs.cop0.status.ie == 1;
const bool currently_handling_exception = regs.cop0.status.exl == 1;
const bool currently_handling_error = regs.cop0.status.erl == 1;
return interrupts_pending && interrupts_enabled && !currently_handling_exception && !currently_handling_error;
}
@@ -15,13 +15,13 @@ bool Interpreter::ShouldServiceInterrupt() {
void Interpreter::CheckCompareInterrupt() {
regs.cop0.count++;
regs.cop0.count &= 0x1FFFFFFFF;
if (regs.cop0.count == (u64)regs.cop0.compare << 1) {
if (regs.cop0.count == static_cast<u64>(regs.cop0.compare) << 1) {
regs.cop0.cause.ip7 = 1;
mem.mmio.mi.UpdateInterrupt();
}
}
Disassembler::DisassemblyResult Interpreter::Disassemble(u32 address, u32 instruction) const {
Disassembler::DisassemblyResult Interpreter::Disassemble(const u32 address, const u32 instruction) const {
return Disassembler::instance().Disassemble(address, instruction);
}
@@ -40,11 +40,11 @@ int Interpreter::Step() {
u32 paddr = 0;
if (!regs.cop0.MapVAddr(Cop0::LOAD, regs.pc, paddr)) {
regs.cop0.HandleTLBException(regs.pc);
regs.cop0.FireException(regs.cop0.GetTLBExceptionCode(regs.cop0.tlbError, Cop0::LOAD), 0, regs.pc);
regs.cop0.FireException(Cop0::GetTLBExceptionCode(regs.cop0.tlbError, Cop0::LOAD), 0, regs.pc);
return 1;
}
u32 instruction = mem.Read<u32>(regs, paddr);
const u32 instruction = mem.Read<u32>(regs, paddr);
if (ShouldServiceInterrupt()) {
regs.cop0.FireException(ExceptionCode::Interrupt, 0, regs.pc);