Minor nitpicks and smaller perf improvements (barely noticeable)
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@@ -4,11 +4,11 @@
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namespace n64 {
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JIT::JIT(ParallelRDP ¶llel) : mem(regs, parallel) {}
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bool JIT::ShouldServiceInterrupt() {
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bool interrupts_pending = (regs.cop0.status.im & regs.cop0.cause.interruptPending) != 0;
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bool interrupts_enabled = regs.cop0.status.ie == 1;
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bool currently_handling_exception = regs.cop0.status.exl == 1;
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bool currently_handling_error = regs.cop0.status.erl == 1;
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bool JIT::ShouldServiceInterrupt() const {
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const bool interrupts_pending = (regs.cop0.status.im & regs.cop0.cause.interruptPending) != 0;
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const bool interrupts_enabled = regs.cop0.status.ie == 1;
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const bool currently_handling_exception = regs.cop0.status.exl == 1;
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const bool currently_handling_error = regs.cop0.status.erl == 1;
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return interrupts_pending && interrupts_enabled && !currently_handling_exception && !currently_handling_error;
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}
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@@ -16,7 +16,7 @@ bool JIT::ShouldServiceInterrupt() {
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void JIT::CheckCompareInterrupt() {
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regs.cop0.count++;
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regs.cop0.count &= 0x1FFFFFFFF;
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if (regs.cop0.count == (u64)regs.cop0.compare << 1) {
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if (regs.cop0.count == static_cast<u64>(regs.cop0.compare) << 1) {
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regs.cop0.cause.ip7 = 1;
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mem.mmio.mi.UpdateInterrupt();
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}
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@@ -41,10 +41,10 @@ int JIT::Step() {
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u32 paddr = 0;
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if (!regs.cop0.MapVAddr(Cop0::LOAD, pc, paddr)) {
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/*regs.cop0.HandleTLBException(pc);
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regs.cop0.FireException(regs.cop0.GetTLBExceptionCode(regs.cop0.tlbError, Cop0::LOAD), 0, pc);
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regs.cop0.FireException(Cop0::GetTLBExceptionCode(regs.cop0.tlbError, Cop0::LOAD), 0, pc);
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return 1;*/
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Util::panic("[JIT]: Unhandled exception TLB exception {} when retrieving PC physical address!",
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static_cast<int>(regs.cop0.GetTLBExceptionCode(regs.cop0.tlbError, Cop0::LOAD)));
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static_cast<int>(Cop0::GetTLBExceptionCode(regs.cop0.tlbError, Cop0::LOAD)));
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}
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instruction = mem.Read<u32>(regs, paddr);
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