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iris
2026-05-21 17:55:11 +02:00
parent 366637aba3
commit 5fbda03ceb
2 changed files with 74 additions and 60 deletions
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src/backend/Scheduler.cpp
+49 -36
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@@ -5,47 +5,60 @@ void Scheduler::EnqueueRelative(const u64 t, const EventType type) { EnqueueAbso
void Scheduler::EnqueueAbsolute(const u64 t, const EventType type) { events.push({t, type}); }
u64 Scheduler::Remove(const EventType eventType) const {
for (auto &[time, type] : events) {
if (type == eventType) {
const u64 ret = time - ticks;
type = NONE;
time = ticks;
return ret;
Event *Scheduler::Find(const EventType eventType) const {
for (auto &event : events) {
if (event.type == eventType) {
const u64 ret = event.time - ticks;
return &event;
}
}
}
return 0;
return nullptr;
}
u64 Scheduler::Remove(const EventType eventType) const {
auto event = Find(eventType);
if (!event)
return 0;
const u64 ret = event->time - ticks;
event->type = NONE;
event->time = ticks;
return ret;
}
void Scheduler::Tick(const u64 t) {
n64::Mem& mem = n64::Core::GetMem();
ticks += t;
n64::MI &mi = mem.mmio.mi;
n64::SI &si = mem.mmio.si;
n64::PI &pi = mem.mmio.pi;
n64::Mem &mem = n64::Core::GetMem();
ticks += t;
n64::MI &mi = mem.mmio.mi;
n64::SI &si = mem.mmio.si;
n64::PI &pi = mem.mmio.pi;
while (ticks >= events.top().time) {
switch (const auto type = events.top().type) {
case SI_DMA:
si.DMA();
break;
case PI_DMA_COMPLETE:
mi.InterruptRaise(n64::MI::Interrupt::PI);
pi.dmaBusy = false;
break;
case PI_BUS_WRITE_COMPLETE:
pi.ioBusy = false;
break;
case NONE:
break;
case IMPOSSIBLE:
Util::Error::GetInstance().Throw({Util::Error::Severity::UNRECOVERABLE}, {Util::Error::Type::ROM_LOAD_ERROR}, {}, {}, "Unrecognized rom endianness");
return;
default:
Util::Error::GetInstance().Throw({Util::Error::Severity::UNRECOVERABLE}, {Util::Error::Type::ROM_LOAD_ERROR}, {}, {}, "Unknown scheduler event type {}", static_cast<int>(type));
return;
while (ticks >= events.top().time) {
switch (const auto type = events.top().type) {
case SI_DMA:
si.DMA();
break;
case PI_DMA_COMPLETE:
mi.InterruptRaise(n64::MI::Interrupt::PI);
pi.dmaBusy = false;
break;
case PI_BUS_WRITE_COMPLETE:
pi.ioBusy = false;
break;
case NONE:
break;
case IMPOSSIBLE:
Util::Error::GetInstance().Throw({Util::Error::Severity::UNRECOVERABLE},
{Util::Error::Type::ROM_LOAD_ERROR}, {}, {},
"Unrecognized rom endianness");
return;
default:
Util::Error::GetInstance().Throw({Util::Error::Severity::UNRECOVERABLE},
{Util::Error::Type::ROM_LOAD_ERROR}, {}, {},
"Unknown scheduler event type {}", static_cast<int>(type));
return;
}
events.pop();
}
events.pop();
}
}