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Allocate only interpreter or dynarec + hopefully fixed some FPU bugs + hopefully it will build in Windows CI 🙏

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This commit is contained in:
CocoSimone
2023-02-10 01:01:12 +01:00
parent ea5e4895ba
commit 6d58728239
24 changed files with 661 additions and 583 deletions
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61
src/backend/core/Dynarec.cpp
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@@ -6,7 +6,8 @@ namespace n64::JIT {
namespace fs = std::filesystem;
Dynarec::~Dynarec() {
std::free(codeCache);
Util::aligned_free(codeCache);
dump.close();
}
Dynarec::Dynarec() : code(CODECACHE_SIZE, codeCache) {
@@ -16,21 +17,47 @@ Dynarec::Dynarec() : code(CODECACHE_SIZE, codeCache) {
CODECACHE_SIZE,
CodeArray::PROTECT_RWE
);
if(fs::exists("jit.dump")) {
fs::remove("jit.dump");
}
dump.open("jit.dump", std::ios::ate | std::ios::binary);
dump.unsetf(std::ios::skipws);
}
void Dynarec::Recompile(Registers& regs, Mem& mem, u32 pc) {
inline bool ShouldServiceInterrupt(Registers& regs) {
bool interrupts_pending = (regs.cop0.status.im & regs.cop0.cause.interruptPending) != 0;
bool interrupts_enabled = regs.cop0.status.ie == 1;
bool currently_handling_exception = regs.cop0.status.exl == 1;
bool currently_handling_error = regs.cop0.status.erl == 1;
return interrupts_pending && interrupts_enabled &&
!currently_handling_exception && !currently_handling_error;
}
inline void CheckCompareInterrupt(MI& mi, Registers& regs) {
regs.cop0.count++;
regs.cop0.count &= 0x1FFFFFFFF;
if(regs.cop0.count == (u64)regs.cop0.compare << 1) {
regs.cop0.cause.ip7 = 1;
UpdateInterrupt(mi, regs);
}
}
void Dynarec::Recompile(Mem& mem, u32 pc) {
bool branch = false, prevBranch = false;
u32 startPC = pc;
u32 loopPC = pc;
Fn block = code.getCurr<Fn>();
if(code.getSize() >= CODECACHE_SIZE) {
Util::print("Code cache overflow!\n");
code.setSize(code.getSize() & (CODECACHE_SIZE - 1));
if(code.getSize() >= CODECACHE_OVERHEAD) {
Util::debug("Code cache overflow!\n");
code.setSize(0);
InvalidateCache();
}
Util::print("Start of block @ PC {:08X}\n", loopPC);
Util::debug("Start of block @ PC {:08X}\n", loopPC);
code.sub(rsp, 8);
while(!prevBranch) {
@@ -38,9 +65,10 @@ void Dynarec::Recompile(Registers& regs, Mem& mem, u32 pc) {
prevBranch = branch;
u32 instr = mem.Read32<false>(regs, loopPC, loopPC);
code.mov(rdi, (u64)&regs);
emitBreakpoint();
code.mov(rdi, (uintptr_t)&regs);
Util::print("\tInstr: {:08X}, PC: {:08X}\n", instr, loopPC);
Util::debug("\tInstr: {:08X}, PC: {:08X}\n", instr, loopPC);
code.mov(r8, qword[rdi + REG_OFFSET(oldPC)]);
code.mov(r9, qword[rdi + REG_OFFSET(pc)]);
code.mov(r10, qword[rdi + REG_OFFSET(nextPC)]);
@@ -53,12 +81,13 @@ void Dynarec::Recompile(Registers& regs, Mem& mem, u32 pc) {
loopPC += 4;
branch = Exec(regs, mem, instr);
branch = Exec(mem, instr);
}
code.add(rsp, 8);
code.ret();
Util::print("End of block @ PC {:08X}, len: {}\n", loopPC, instrInBlock);
Util::debug("End of block @ PC {:08X}, len: {}\n", loopPC, instrInBlock);
dump.write(code.getCode<char*>(), code.getSize());
blockCache[startPC >> 20][startPC & 0xFFF] = block;
blockCache[startPC >> 20][startPC & 0xFFF]();
@@ -68,7 +97,7 @@ void Dynarec::AllocateOuter(u32 pc) {
blockCache[pc >> 20] = (Fn*)bumpAlloc(0x1000 * sizeof(Fn));
}
int Dynarec::Step(Mem &mem, Registers& regs) {
int Dynarec::Step(Mem &mem) {
instrInBlock = 0;
regs.gpr[0] = 0;
regs.prevDelaySlot = regs.delaySlot;
@@ -83,11 +112,17 @@ int Dynarec::Step(Mem &mem, Registers& regs) {
if(blockCache[pc >> 20][pc & 0xfff]) {
blockCache[pc >> 20][pc & 0xfff]();
} else {
Recompile(regs, mem, pc);
Recompile(mem, pc);
}
} else {
AllocateOuter(pc);
Recompile(regs, mem, pc);
Recompile(mem, pc);
}
CheckCompareInterrupt(mem.mmio.mi, regs);
if(ShouldServiceInterrupt(regs)) {
FireException(regs, ExceptionCode::Interrupt, 0, false);
}
return instrInBlock;