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register constant check optimization + disable branch likely's for now

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This commit is contained in:
irisz64
2025-07-07 10:36:16 +02:00
parent dd6c28c9d9
commit 6e69a37a62
3 changed files with 75 additions and 44 deletions
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52
src/backend/core/jit/instructions.cpp
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@@ -310,6 +310,7 @@ void JIT::bgez(const u32 instr) {
}
void JIT::bltzl(const u32 instr) {
Util::panic("Implement branch likely < 0");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
if (regs.IsRegConstant(RS(instr))) {
@@ -323,6 +324,7 @@ void JIT::bltzl(const u32 instr) {
}
void JIT::bgezl(const u32 instr) {
Util::panic("Implement branch likely >= 0");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
if (regs.IsRegConstant(RS(instr))) {
@@ -364,6 +366,7 @@ void JIT::bgezal(const u32 instr) {
}
void JIT::bltzall(const u32 instr) {
Util::panic("Implement branch likely and link < 0");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
regs.Write<s64>(31, blockNextPC);
@@ -378,6 +381,7 @@ void JIT::bltzall(const u32 instr) {
}
void JIT::bgezall(const u32 instr) {
Util::panic("Implement branch likely and link >= 0");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
regs.Write<s64>(31, blockNextPC);
@@ -420,6 +424,7 @@ void JIT::beq(const u32 instr) {
}
void JIT::beql(const u32 instr) {
Util::panic("Implement branch likely ==");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
if (regs.IsRegConstant(RS(instr)) && regs.IsRegConstant(RT(instr))) {
@@ -476,6 +481,7 @@ void JIT::bne(const u32 instr) {
}
void JIT::bnel(const u32 instr) {
Util::panic("Implement branch likely !=");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
if (regs.IsRegConstant(RS(instr)) && regs.IsRegConstant(RT(instr))) {
@@ -517,6 +523,7 @@ void JIT::blez(const u32 instr) {
}
void JIT::blezl(const u32 instr) {
Util::panic("Implement branch likely <= 0");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
if (regs.IsRegConstant(RS(instr))) {
@@ -543,6 +550,7 @@ void JIT::bgtz(const u32 instr) {
}
void JIT::bgtzl(const u32 instr) {
Util::panic("Implement branch likely > 0");
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
if (regs.IsRegConstant(RS(instr))) {
@@ -639,8 +647,8 @@ void JIT::ddiv(u32 instr) {
regs.hi = remainder;
}
regs.loIsConstant = true;
regs.hiIsConstant = true;
regs.SetLOConstant();
regs.SetHIConstant();
} else {
Util::panic("[JIT]: Implement non constant DDIV!");
}
@@ -660,8 +668,8 @@ void JIT::ddivu(u32 instr) {
regs.hi = (s64)remainder;
}
regs.loIsConstant = true;
regs.hiIsConstant = true;
regs.SetLOConstant();
regs.SetHIConstant();
} else {
Util::panic("[JIT]: Implement non constant DDIVU!");
}
@@ -686,8 +694,8 @@ void JIT::div(u32 instr) {
regs.hi = remainder;
}
regs.loIsConstant = true;
regs.hiIsConstant = true;
regs.SetLOConstant();
regs.SetHIConstant();
} else {
Util::panic("[JIT]: Implement non constant DIV!");
}
@@ -707,8 +715,8 @@ void JIT::divu(u32 instr) {
regs.hi = remainder;
}
regs.loIsConstant = true;
regs.hiIsConstant = true;
regs.SetLOConstant();
regs.SetHIConstant();
} else {
Util::panic("[JIT]: Implement non constant DIVU!");
}
@@ -721,8 +729,8 @@ void JIT::dmult(u32 instr) {
s128 result = (s128)rt * (s128)rs;
regs.lo = result & 0xFFFFFFFFFFFFFFFF;
regs.hi = result >> 64;
regs.hiIsConstant = true;
regs.loIsConstant = true;
regs.SetHIConstant();
regs.SetLOConstant();
} else {
Util::panic("[JIT]: Implement non constant DMULT!");
}
@@ -735,8 +743,8 @@ void JIT::dmultu(u32 instr) {
u128 result = (u128)rt * (u128)rs;
regs.lo = s64(result & 0xFFFFFFFFFFFFFFFF);
regs.hi = s64(result >> 64);
regs.hiIsConstant = true;
regs.loIsConstant = true;
regs.SetHIConstant();
regs.SetLOConstant();
} else {
Util::panic("[JIT]: Implement non constant DMULT!");
}
@@ -1135,7 +1143,7 @@ void JIT::lwu(u32) { Util::panic("[JIT]: Implement constant LWU!"); }
void JIT::lwr(u32) { Util::panic("[JIT]: Implement constant LWR!"); }
void JIT::mfhi(u32 instr) {
if (regs.hiIsConstant) {
if (regs.GetHIConstant()) {
regs.Write(RD(instr), regs.hi);
} else {
code.mov(code.rax, REG(qword, hi));
@@ -1144,7 +1152,7 @@ void JIT::mfhi(u32 instr) {
}
void JIT::mflo(u32 instr) {
if (regs.loIsConstant) {
if (regs.GetLOConstant()) {
regs.Write(RD(instr), regs.lo);
} else {
code.mov(code.rax, REG(qword, lo));
@@ -1158,9 +1166,9 @@ void JIT::mult(u32 instr) {
auto rs = regs.Read<s32>(RS(instr));
s64 result = (s64)rt * (s64)rs;
regs.lo = (s64)((s32)result);
regs.loIsConstant = true;
regs.SetLOConstant();
regs.hi = (s64)((s32)(result >> 32));
regs.hiIsConstant = true;
regs.SetHIConstant();
} else {
Util::panic("[JIT]: Implement non constant MULT!");
}
@@ -1172,9 +1180,9 @@ void JIT::multu(u32 instr) {
auto rs = regs.Read<u32>(RS(instr));
u64 result = (u64)rt * (u64)rs;
regs.lo = (s64)((s32)result);
regs.loIsConstant = true;
regs.SetLOConstant();
regs.hi = (s64)((s32)(result >> 32));
regs.hiIsConstant = true;
regs.SetHIConstant();
} else {
Util::panic("[JIT]: Implement non constant MULTU!");
}
@@ -1183,22 +1191,22 @@ void JIT::multu(u32 instr) {
void JIT::mthi(u32 instr) {
if (regs.IsRegConstant(RS(instr))) {
regs.hi = regs.Read<s64>(RS(instr));
regs.hiIsConstant = true;
regs.SetHIConstant();
} else {
regs.Read<s64>(RS(instr), code.rax);
code.mov(REG(qword, hi), code.rax);
regs.hiIsConstant = false;
regs.UnsetHIConstant();
}
}
void JIT::mtlo(u32 instr) {
if (regs.IsRegConstant(RS(instr))) {
regs.lo = regs.Read<s64>(RS(instr));
regs.loIsConstant = true;
regs.SetLOConstant();
} else {
regs.Read<s64>(RS(instr), code.rax);
code.mov(REG(qword, lo), code.rax);
regs.loIsConstant = false;
regs.UnsetLOConstant();
}
}