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small change

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SimoneN64
2023-06-12 10:14:15 +02:00
parent 0b21f16ea6
commit 7a7d7feee2
3 changed files with 15 additions and 7 deletions
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3
src/backend/core/mmio/PI.cpp
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@@ -52,8 +52,7 @@ FORCE_INLINE u8 PIGetDomain(u32 address) {
case CART_REGION_2_2: case CART_REGION_2_2:
return 2; return 2;
default: default:
//Util::panic("Unknown PI domain for address {:08X}!", address); Util::panic("Unknown PI domain for address {:08X}!", address);
return 1;
} }
} }

2
src/backend/core/mmio/VI.cpp
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@@ -69,7 +69,7 @@ void VI::Write(MI& mi, Registers& regs, u32 paddr, u32 val) {
case 0x04400018: { case 0x04400018: {
vsync = val & 0x3FF; vsync = val & 0x3FF;
numHalflines = vsync >> 1; numHalflines = vsync >> 1;
cyclesPerHalfline = N64_CYCLES_PER_FRAME(isPal) / numHalflines; cyclesPerHalfline = GetCyclesPerFrame(isPal) / numHalflines;
} break; } break;
case 0x0440001C: { case 0x0440001C: {
hsync = val & 0x3FF; hsync = val & 0x3FF;

17
src/common.hpp
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@@ -15,8 +15,18 @@ using u128 = __uint128_t;
using s128 = __int128_t; using s128 = __int128_t;
using m128i = __m128i; using m128i = __m128i;
#define N64_CPU_FREQ 93750000 #define FORCE_INLINE inline __attribute__((always_inline))
#define N64_CYCLES_PER_FRAME(pal) ((N64_CPU_FREQ) / (pal ? 50 : 60))
constexpr u32 N64_CPU_FREQ = 93750000;
static FORCE_INLINE constexpr u32 GetCyclesPerFrame(bool pal) {
if (pal) {
return N64_CPU_FREQ / 50;
} else {
return N64_CPU_FREQ / 60;
}
}
#define HALF_ADDRESS(addr) ((addr) ^ 2) #define HALF_ADDRESS(addr) ((addr) ^ 2)
#define BYTE_ADDRESS(addr) ((addr) ^ 3) #define BYTE_ADDRESS(addr) ((addr) ^ 3)
@@ -39,5 +49,4 @@ using m128i = __m128i;
#define BYTE_INDEX(i) (15 - (i)) #define BYTE_INDEX(i) (15 - (i))
#define unlikely(exp) __builtin_expect(exp, 0) #define unlikely(exp) __builtin_expect(exp, 0)
#define likely(exp) __builtin_expect(exp, 1) #define likely(exp) __builtin_expect(exp, 1)
#define FORCE_INLINE inline __attribute__((always_inline))