small changes

src/backend/Core.cpp

@@ -1,6 +1,4 @@
 #include <Core.hpp>
-#include <ParallelRDPWrapper.hpp>
-#include <Window.hpp>
 #include <Scheduler.hpp>
 
 namespace n64 {

src/backend/Scheduler.cpp

@@ -4,12 +4,6 @@
 
 Scheduler scheduler;
 
-Scheduler::Scheduler() {
-  enqueueAbsolute({UINT64_MAX, [](n64::Mem&, n64::Registers&){
-    Util::panic("How the fuck did we get here?!\n");
-  }});
-}
-
 void Scheduler::enqueueRelative(const Event& event) {
   enqueueAbsolute({event.time + ticks, event.handler});
 }

src/backend/Scheduler.hpp

@@ -2,6 +2,7 @@
 #include <common.hpp>
 #include <queue>
 #include <array>
+#include "log.hpp"
 
 namespace n64 {
 struct Mem;
@@ -26,7 +27,11 @@ struct Event {
 };
 
 struct Scheduler {
-  Scheduler();
+  Scheduler() {
+    enqueueAbsolute(Event{std::numeric_limits<u64>::max(), [](n64::Mem&, n64::Registers&) {
+      Util::panic("How the fuck did we get here?!");
+    }});
+  }
   void enqueueRelative(const Event&);
   void enqueueAbsolute(const Event&);
   void tick(u64, n64::Mem&, n64::Registers&);

src/backend/core/interpreter/cop/cop0instructions.cpp

@@ -48,25 +48,25 @@ void Cop0::tlbr() {
   pageMask.raw = entry.pageMask.raw;
 }
 
-void Cop0::tlbw(int index_) {
+void Cop0::tlbw(int index) {
   PageMask page_mask{};
   page_mask = pageMask;
   u32 top = page_mask.mask & 0xAAA;
   page_mask.mask = top | (top >> 1);
 
-  if(index_ >= 32) {
-    Util::panic("TLBWI with TLB index {}", index_);
+  if(index >= 32) {
+    Util::panic("TLBWI with TLB index {}", index);
   }
 
-  tlb[index_].entryHi.raw  = entryHi.raw;
-  tlb[index_].entryHi.vpn2 &= ~page_mask.mask;
+  tlb[index].entryHi.raw  = entryHi.raw;
+  tlb[index].entryHi.vpn2 &= ~page_mask.mask;
 
-  tlb[index_].entryLo0.raw = entryLo0.raw & 0x03FFFFFE;
-  tlb[index_].entryLo1.raw = entryLo1.raw & 0x03FFFFFE;
-  tlb[index_].pageMask.raw = page_mask.raw;
+  tlb[index].entryLo0.raw = entryLo0.raw & 0x03FFFFFE;
+  tlb[index].entryLo1.raw = entryLo1.raw & 0x03FFFFFE;
+  tlb[index].pageMask.raw = page_mask.raw;
 
-  tlb[index_].global = entryLo0.g && entryLo1.g;
-  tlb[index_].initialized = true;
+  tlb[index].global = entryLo0.g && entryLo1.g;
+  tlb[index].initialized = true;
 }
 
 void Cop0::tlbp(Registers& regs) {