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minor refactor

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This commit is contained in:
SimoneN64
2023-11-25 22:00:54 +01:00
parent 535c4655a4
commit aca784eb58
4 changed files with 46 additions and 195 deletions
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8
src/backend/core/Mem.cpp
View File

@@ -528,7 +528,7 @@ void Mem::Write(Registers& regs, u32 paddr, u64 val) {
} }
} }
template <> u32 Mem::BackupRead(u32 addr) { template <> u32 Mem::BackupRead<u32>(u32 addr) {
switch(saveType) { switch(saveType) {
case SAVE_NONE: return 0; case SAVE_NONE: return 0;
case SAVE_EEPROM_4k: case SAVE_EEPROM_16k: case SAVE_EEPROM_4k: case SAVE_EEPROM_16k:
@@ -543,7 +543,7 @@ template <> u32 Mem::BackupRead(u32 addr) {
} }
} }
template <> u8 Mem::BackupRead(u32 addr) { template <> u8 Mem::BackupRead<u8>(u32 addr) {
switch (saveType) { switch (saveType) {
case SAVE_NONE: return 0; case SAVE_NONE: return 0;
case SAVE_EEPROM_4k: case SAVE_EEPROM_16k: case SAVE_EEPROM_4k: case SAVE_EEPROM_16k:
@@ -564,7 +564,7 @@ template <> u8 Mem::BackupRead(u32 addr) {
} }
} }
template <> void Mem::BackupWrite(u32 addr, u32 val) { template <> void Mem::BackupWrite<u32>(u32 addr, u32 val) {
switch(saveType) { switch(saveType) {
case SAVE_NONE: case SAVE_NONE:
Util::panic("Accessing cartridge with save type SAVE_NONE in write word"); Util::panic("Accessing cartridge with save type SAVE_NONE in write word");
@@ -580,7 +580,7 @@ template <> void Mem::BackupWrite(u32 addr, u32 val) {
} }
} }
template <> void Mem::BackupWrite(u32 addr, u8 val) { template <> void Mem::BackupWrite<u8>(u32 addr, u8 val) {
switch(saveType) { switch(saveType) {
case SAVE_NONE: case SAVE_NONE:
Util::panic("Accessing cartridge with save type SAVE_NONE in write word"); Util::panic("Accessing cartridge with save type SAVE_NONE in write word");

8
src/backend/core/mem/Flash.cpp
View File

@@ -136,7 +136,7 @@ void Flash::Deserialize(const std::vector<u8>& data) {
memcpy(writeBuf, data.data() + index, 128); memcpy(writeBuf, data.data() + index, 128);
} }
template <> void Flash::Write(u32 index, u32 val) { template <> void Flash::Write<u32>(u32 index, u32 val) {
if(index > 0) { if(index > 0) {
u8 cmd = val >> 24; u8 cmd = val >> 24;
switch(cmd) { switch(cmd) {
@@ -154,7 +154,7 @@ template <> void Flash::Write(u32 index, u32 val) {
} }
} }
template <> void Flash::Write(u32 index, u8 val) { template <> void Flash::Write<u8>(u32 index, u8 val) {
switch(state) { switch(state) {
case FlashState::Idle: Util::panic("Invalid FlashState::Idle with Write<u8>"); case FlashState::Idle: Util::panic("Invalid FlashState::Idle with Write<u8>");
case FlashState::Status: Util::panic("Invalid FlashState::Status with Write<u8>"); case FlashState::Status: Util::panic("Invalid FlashState::Status with Write<u8>");
@@ -167,7 +167,7 @@ template <> void Flash::Write(u32 index, u8 val) {
} }
} }
template <> u8 Flash::Read(u32 index) const { template <> u8 Flash::Read<u8>(u32 index) const {
switch (state) { switch (state) {
case FlashState::Idle: Util::panic("Flash read byte while in state FLASH_STATE_IDLE"); case FlashState::Idle: Util::panic("Flash read byte while in state FLASH_STATE_IDLE");
case FlashState::Write: Util::panic("Flash read byte while in state FLASH_STATE_WRITE"); case FlashState::Write: Util::panic("Flash read byte while in state FLASH_STATE_WRITE");
@@ -190,7 +190,7 @@ template <> u8 Flash::Read(u32 index) const {
} }
} }
template <> u32 Flash::Read(u32 index) const { template <> u32 Flash::Read<u32>(u32) const {
return status >> 32; return status >> 32;
} }
} }

191
src/backend/core/mmio/PI.cpp
View File

@@ -103,21 +103,16 @@ template<> auto PI::BusRead<u8, false>(Mem& mem, u32 addr) -> u8 {
} }
} }
template<> void PI::BusWrite<u8, false>(Mem& mem, u32 addr, u8 val) { template<> void PI::BusWrite<u8, true>(Mem& mem, u32 addr, u8 val) {
int latch_shift = 24 - (addr & 1) * 8;
if (!WriteLatch(val << latch_shift) && addr != 0x05000020) [[unlikely]] {
return;
}
switch (addr) { switch (addr) {
case REGION_PI_UNKNOWN: case REGION_PI_UNKNOWN:
Util::panic("Writing byte 0x{:02X} to address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", val, addr); Util::panic("Writing byte 0x{:02X} to address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", val, addr);
case REGION_PI_64DD_REG: case REGION_PI_64DD_REG:
if (addr == 0x05000020) { if (addr == 0x05000020) {
fprintf(stderr, "%c", val); fprintf(stderr, "%c", val);
} else { }
Util::panic("Writing byte 0x{:02X} to address 0x{:08X} in region: REGION_PI_64DD_ROM, this is the 64DD, ignoring!", val, addr); else {
Util::warn("Writing byte 0x{:02X} to address 0x{:08X} in region: REGION_PI_64DD_ROM, this is the 64DD, ignoring!", val, addr);
} }
return; return;
case REGION_PI_64DD_ROM: case REGION_PI_64DD_ROM:
@@ -133,29 +128,14 @@ template<> void PI::BusWrite<u8, false>(Mem& mem, u32 addr, u8 val) {
} }
} }
template<> void PI::BusWrite<u8, true>(Mem& mem, u32 addr, u8 val) { template<> void PI::BusWrite<u8, false>(Mem& mem, u32 addr, u8 val) {
switch (addr) { int latch_shift = 24 - (addr & 1) * 8;
case REGION_PI_UNKNOWN:
Util::panic("Writing byte 0x{:02X} to address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", val, addr); if (!WriteLatch(val << latch_shift) && addr != 0x05000020) [[unlikely]] {
case REGION_PI_64DD_REG:
if (addr == 0x05000020) {
fprintf(stderr, "%c", val);
}
else {
Util::panic("Writing byte 0x{:02X} to address 0x{:08X} in region: REGION_PI_64DD_ROM, this is the 64DD, ignoring!", val, addr);
}
return; return;
case REGION_PI_64DD_ROM:
Util::panic("Writing byte 0x{:02X} to address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM", val, addr);
case REGION_PI_SRAM:
mem.BackupWrite<u8>(addr - SREGION_PI_SRAM, val);
return;
case REGION_PI_ROM:
Util::warn("Writing byte 0x{:02X} to address 0x{:08X} in unsupported region: REGION_PI_ROM", val, addr);
return;
default:
Util::panic("Should never end up here! Access to address {:08X} which did not match any PI bus regions!", addr);
} }
BusWrite<u8, true>(mem, addr, val);
} }
template <> auto PI::BusRead<u16, false>(Mem& mem, u32 addr) -> u16 { template <> auto PI::BusRead<u16, false>(Mem& mem, u32 addr) -> u16 {
@@ -186,25 +166,7 @@ template <> auto PI::BusRead<u16, false>(Mem& mem, u32 addr) -> u16 {
} }
template <> auto PI::BusRead<u16, true>(Mem& mem, u32 addr) -> u16 { template <> auto PI::BusRead<u16, true>(Mem& mem, u32 addr) -> u16 {
switch (addr) { return BusRead<u16, false>(mem, addr);
case REGION_PI_UNKNOWN:
Util::panic("Reading half from address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN - This is the N64DD, returning FF because it is not emulated", addr);
case REGION_PI_64DD_REG:
Util::panic("Reading half from address 0x{:08X} in unsupported region: REGION_PI_64DD_REG - This is the N64DD, returning FF because it is not emulated", addr);
case REGION_PI_64DD_ROM:
Util::panic("Reading half from address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM - This is the N64DD, returning FF because it is not emulated", addr);
case REGION_PI_SRAM:
Util::panic("Reading half from address 0x{:08X} in unsupported region: REGION_PI_SRAM", addr);
case REGION_PI_ROM: {
u32 index = HALF_ADDRESS(addr) - SREGION_PI_ROM;
if (index > mem.rom.size - 1) {
Util::panic("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index);
}
return Util::ReadAccess<u16>(mem.rom.cart, index);
}
default:
Util::panic("Should never end up here! Access to address {:08X} which did not match any PI bus regions!", addr);
}
} }
template <> void PI::BusWrite<u16, false>(Mem&, u32 addr, u16 val) { template <> void PI::BusWrite<u16, false>(Mem&, u32 addr, u16 val) {
@@ -229,22 +191,8 @@ template <> void PI::BusWrite<u16, false>(Mem&, u32 addr, u16 val) {
} }
} }
template <> void PI::BusWrite<u16, true>(Mem&, u32 addr, u16 val) { template <> void PI::BusWrite<u16, true>(Mem& mem, u32 addr, u16 val) {
switch (addr) { BusWrite<u16, false>(mem, addr, val);
case REGION_PI_UNKNOWN:
Util::panic("Writing half 0x{:04X} to address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", val, addr);
case REGION_PI_64DD_REG:
Util::panic("Writing half 0x{:04X} to address 0x{:08X} in region: REGION_PI_64DD_ROM, this is the 64DD, ignoring!", val, addr);
case REGION_PI_64DD_ROM:
Util::panic("Writing half 0x{:04X} to address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM", val, addr);
case REGION_PI_SRAM:
Util::panic("Writing half 0x{:04X} to address 0x{:08X} in unsupported region: REGION_PI_SRAM", val, addr);
case REGION_PI_ROM:
Util::warn("Writing half 0x{:04X} to address 0x{:08X} in unsupported region: REGION_PI_ROM", val, addr);
break;
default:
Util::panic("Should never end up here! Access to address {:08X} which did not match any PI bus regions!", addr);
}
} }
template <> auto PI::BusRead<u32, false>(Mem& mem, u32 addr) -> u32 { template <> auto PI::BusRead<u32, false>(Mem& mem, u32 addr) -> u32 {
@@ -272,6 +220,8 @@ template <> auto PI::BusRead<u32, false>(Mem& mem, u32 addr) -> u32 {
return htobe32(Util::ReadAccess<u32>(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER)); return htobe32(Util::ReadAccess<u32>(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER));
case CART_ISVIEWER_FLUSH: case CART_ISVIEWER_FLUSH:
Util::panic("Read from ISViewer flush!"); Util::panic("Read from ISViewer flush!");
default:
Util::panic("Read from unknown address {:08X} in REGION_PI_ROM!", addr);
} }
Util::warn("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index); Util::warn("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index);
return 0; return 0;
@@ -285,37 +235,7 @@ template <> auto PI::BusRead<u32, false>(Mem& mem, u32 addr) -> u32 {
} }
template <> auto PI::BusRead<u32, true>(Mem& mem, u32 addr) -> u32 { template <> auto PI::BusRead<u32, true>(Mem& mem, u32 addr) -> u32 {
switch (addr) { return BusRead<u32, false>(mem, addr);
case REGION_PI_UNKNOWN:
Util::warn("Reading word from address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN - This is the N64DD, returning FF because it is not emulated", addr);
return 0xFF;
case REGION_PI_64DD_REG:
Util::warn("Reading word from address 0x{:08X} in unsupported region: REGION_PI_64DD_REG - This is the N64DD, returning FF because it is not emulated", addr);
return 0xFF;
case REGION_PI_64DD_ROM:
Util::warn("Reading word from address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM - This is the N64DD, returning FF because it is not emulated", addr);
return 0xFF;
case REGION_PI_SRAM:
return mem.BackupRead<u32>(addr);
case REGION_PI_ROM: {
u32 index = addr - SREGION_PI_ROM;
if (index > mem.rom.size - 3) { // -3 because we're reading an entire word
switch (addr) {
case REGION_CART_ISVIEWER_BUFFER:
return htobe32(Util::ReadAccess<u32>(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER));
case CART_ISVIEWER_FLUSH:
Util::panic("Read from ISViewer flush!");
}
Util::warn("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index);
return 0;
}
else {
return Util::ReadAccess<u32>(mem.rom.cart, index);
}
}
default:
Util::panic("Should never end up here! Access to address {:08X} which did not match any PI bus regions!", addr);
}
} }
template <> void PI::BusWrite<u32, false>(Mem& mem, u32 addr, u32 val) { template <> void PI::BusWrite<u32, false>(Mem& mem, u32 addr, u32 val) {
@@ -374,44 +294,7 @@ template <> void PI::BusWrite<u32, false>(Mem& mem, u32 addr, u32 val) {
} }
template <> void PI::BusWrite<u32, true>(Mem& mem, u32 addr, u32 val) { template <> void PI::BusWrite<u32, true>(Mem& mem, u32 addr, u32 val) {
switch (addr) { BusWrite<u32, false>(mem, addr, val);
case REGION_PI_UNKNOWN:
Util::warn("Writing word 0x{:08X} to address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", val, addr);
return;
case REGION_PI_64DD_REG:
Util::warn("Writing word 0x{:08X} to address 0x{:08X} in region: REGION_PI_64DD_ROM, this is the 64DD, ignoring!", val, addr);
return;
case REGION_PI_64DD_ROM:
Util::warn("Writing word 0x{:08X} to address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM", val, addr);
return;
case REGION_PI_SRAM:
mem.BackupWrite<u32>(addr - SREGION_PI_SRAM, val);
return;
case REGION_PI_ROM:
switch (addr) {
case REGION_CART_ISVIEWER_BUFFER:
Util::WriteAccess<u32>(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER, be32toh(val));
break;
case CART_ISVIEWER_FLUSH: {
if (val < CART_ISVIEWER_SIZE) {
char* message = (char*)malloc(val + 1);
memcpy(message, mem.isviewer, val);
message[val] = '\0';
printf("%s", message);
free(message);
}
else {
Util::panic("ISViewer buffer size is emulated at {} bytes, but received a flush command for {} bytes!", CART_ISVIEWER_SIZE, val);
}
break;
}
default:
Util::warn("Writing word 0x{:08X} to address 0x{:08X} in unsupported region: REGION_PI_ROM", val, addr);
}
return;
default:
Util::panic("Should never end up here! Access to address {:08X} which did not match any PI bus regions!", addr);
}
} }
template <> auto PI::BusRead<u64, false>(Mem& mem, u32 addr) -> u64 { template <> auto PI::BusRead<u64, false>(Mem& mem, u32 addr) -> u64 {
@@ -441,28 +324,10 @@ template <> auto PI::BusRead<u64, false>(Mem& mem, u32 addr) -> u64 {
} }
template <> auto PI::BusRead<u64, true>(Mem& mem, u32 addr) -> u64 { template <> auto PI::BusRead<u64, true>(Mem& mem, u32 addr) -> u64 {
switch (addr) { return BusRead<u64, false>(mem, addr);
case REGION_PI_UNKNOWN:
Util::panic("Reading dword from address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", addr);
case REGION_PI_64DD_REG:
Util::panic("Reading dword from address 0x{:08X} in unsupported region: REGION_PI_64DD_REG", addr);
case REGION_PI_64DD_ROM:
Util::panic("Reading dword from address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM", addr);
case REGION_PI_SRAM:
Util::panic("Reading dword from address 0x{:08X} in unsupported region: REGION_PI_SRAM", addr);
case REGION_PI_ROM: {
u32 index = addr - SREGION_PI_ROM;
if (index > mem.rom.size - 7) { // -7 because we're reading an entire dword
Util::panic("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index);
}
return Util::ReadAccess<u64>(mem.rom.cart, index);
}
default:
Util::panic("Should never end up here! Access to address {:08X} which did not match any PI bus regions!", addr);
}
} }
template <> void PI::BusWrite<u64, false>(Mem& mem, u32 addr, u64 val) { template <> void PI::BusWrite<u64, false>(Mem&, u32 addr, u64 val) {
if (!WriteLatch(val >> 32)) [[unlikely]] { if (!WriteLatch(val >> 32)) [[unlikely]] {
return; return;
} }
@@ -485,21 +350,7 @@ template <> void PI::BusWrite<u64, false>(Mem& mem, u32 addr, u64 val) {
} }
template <> void PI::BusWrite<u64, true>(Mem& mem, u32 addr, u64 val) { template <> void PI::BusWrite<u64, true>(Mem& mem, u32 addr, u64 val) {
switch (addr) { BusWrite<u64, false>(mem, addr, val);
case REGION_PI_UNKNOWN:
Util::panic("Writing dword 0x{:016X} to address 0x{:08X} in unsupported region: REGION_PI_UNKNOWN", val, addr);
case REGION_PI_64DD_REG:
Util::panic("Writing dword 0x{:016X} to address 0x{:08X} in unsupported region: REGION_PI_64DD_REG", val, addr);
case REGION_PI_64DD_ROM:
Util::panic("Writing dword 0x{:016X} to address 0x{:08X} in unsupported region: REGION_PI_64DD_ROM", val, addr);
case REGION_PI_SRAM:
Util::panic("Writing dword 0x{:016X} to address 0x{:08X} in unsupported region: REGION_PI_SRAM", val, addr);
case REGION_PI_ROM:
Util::warn("Writing dword 0x{:016X} to address 0x{:08X} in unsupported region: REGION_PI_ROM", val, addr);
break;
default:
Util::panic("Should never end up here! Access to address %08X which did not match any PI bus regions!", addr);
}
} }
auto PI::Read(MI& mi, u32 addr) const -> u32 { auto PI::Read(MI& mi, u32 addr) const -> u32 {
@@ -543,7 +394,7 @@ u8 PI::GetDomain(u32 address) {
} }
} }
u32 PI::AccessTiming(u8 domain, u32 length) { u32 PI::AccessTiming(u8 domain, u32 length) const {
uint32_t cycles = 0; uint32_t cycles = 0;
uint32_t latency = 0; uint32_t latency = 0;
uint32_t pulse_width = 0; uint32_t pulse_width = 0;

2
src/backend/core/mmio/PI.hpp
View File

@@ -20,7 +20,7 @@ struct PI {
bool WriteLatch(u32 val); bool WriteLatch(u32 val);
static u8 GetDomain(u32 address); static u8 GetDomain(u32 address);
u32 AccessTiming(u8 domain, u32 length); u32 AccessTiming(u8 domain, u32 length) const;
bool dmaBusy{}, ioBusy{}, toCart{}; bool dmaBusy{}, ioBusy{}, toCart{};
u32 latch; u32 latch;
u32 dramAddr{}, cartAddr{}, dramAddrInternal{}, cartAddrInternal{}; u32 dramAddr{}, cartAddr{}, dramAddrInternal{}, cartAddrInternal{};