fix a bunch of warnings

CMakeLists.txt

@@ -82,3 +82,4 @@ file(REMOVE
 
 target_link_libraries(kaizen PUBLIC frontend frontend-imgui
   discord-rpc imgui nfd parallel-rdp backend fmt::fmt mio::mio nlohmann_json::nlohmann_json core registers jit interpreter mem unarr mmio rsp SDL2::SDL2main SDL2::SDL2)
+target_compile_options(kaizen PUBLIC -Wextra)

src/backend/Core.hpp

@@ -18,8 +18,7 @@ struct Core {
   void Serialize();
   void Deserialize();
   void TogglePause() { pause = !pause; }
-  void HandleEvents(Event*);
+  [[nodiscard]] VI& GetVI() const { return cpu->mem.mmio.vi; }
-  [[nodiscard]] VI& GetVI() { return cpu->mem.mmio.vi; }
 
   u32 breakpoint = 0;
 
@@ -30,7 +29,7 @@ struct Core {
   std::string rom;
   std::unique_ptr<BaseCPU> cpu;
   std::vector<u8> serialized[10]{};
-  int memSize, cpuSize, verSize;
+  size_t memSize{}, cpuSize{}, verSize{};
   int slot = 0;
 };
 

src/backend/Scheduler.hpp

@@ -38,10 +38,10 @@ struct IterableEvents {
   std::priority_queue<Event, std::vector<Event>, std::greater<>> events;
 public:
   explicit IterableEvents() = default;
-  auto top() { return events.top(); }
+  [[nodiscard]] auto top() const { return events.top(); }
   auto pop() { events.pop(); }
-  auto begin() { return (Event*)(&events.top()); }
+  [[nodiscard]] auto begin() const { return (Event*)(&events.top()); }
-  auto end() { return begin() + events.size(); }
+  [[nodiscard]] auto end() const { return begin() + events.size(); }
   auto push(Event e) { events.push(e); }
 };
 

src/backend/core/Mem.cpp

@@ -12,7 +12,7 @@ Mem::Mem() : flash(saveData) {
   memset(readPages, 0, PAGE_COUNT);
   memset(writePages, 0, PAGE_COUNT);
 
-  for(int i = 0; i < RDRAM_SIZE / PAGE_SIZE; i++) {
+  for(u64 i = 0; i < RDRAM_SIZE / PAGE_SIZE; i++) {
     const auto addr = (i * PAGE_SIZE) & RDRAM_DSIZE;
     const auto pointer = (uintptr_t) &mmio.rdp.rdram[addr];
     readPages[i] = pointer;

src/backend/core/Mem.hpp

@@ -42,7 +42,7 @@ enum class FlashState : u8 {
 };
 
 struct Flash {
-  Flash(mio::mmap_sink&);
+  explicit Flash(mio::mmap_sink&);
   ~Flash() = default;
   void Reset();
   void Load(SaveType, const std::string&);
@@ -148,8 +148,8 @@ private:
   friend struct Core;
   u8 isviewer[ISVIEWER_SIZE]{};
   std::string sramPath{};
-  mio::mmap_sink saveData;
+  mio::mmap_sink saveData{};
-  int mmioSize, flashSize;
+  int mmioSize{}, flashSize{};
 
   FORCE_INLINE bool IsROMPAL() {
     static const char pal_codes[] = {'D', 'F', 'I', 'P', 'S', 'U', 'X', 'Y'};

src/backend/core/RSP.hpp

@@ -374,8 +374,8 @@ struct RSP {
     u32 mem_address = rsp.spDMASPAddr.address & 0xFF8;
     u32 dram_address = rsp.spDMADRAMAddr.address & 0xFFFFF8;
 
-    for (int i = 0; i < len.count + 1; i++) {
+    for (u32 i = 0; i < len.count + 1; i++) {
-      for(int j = 0; j < length; j++) {
+      for(u32 j = 0; j < length; j++) {
         if constexpr (isDRAMdest) {
           dst[dram_address + j] = src[(mem_address + j) & 0xFFF];
         } else {

src/backend/core/mem/Flash.cpp

@@ -48,7 +48,7 @@ void Flash::CommandExecute() {
     case FlashState::Erase:
       if(saveData.is_mapped()) {
         for (int i = 0; i < 128; i++) {
-          saveData[eraseOffs + i] = 0xFF;
+          saveData[eraseOffs + i] = 0xFFi8;
         }
       } else {
         Util::panic("Accessing flash when not mapped!");

src/backend/core/mmio/MI.hpp

@@ -24,7 +24,7 @@ struct MI {
   [[nodiscard]] auto Read(u32) const -> u32;
   void Write(Registers& regs, u32, u32);
 
-  u32 miMode;
+  u32 miMode{};
   MIIntr miIntr{}, miIntrMask{};
 };
 }

src/backend/core/mmio/PI.cpp

@@ -464,7 +464,7 @@ void PI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
         cartAddrInternal = SREGION_PI_SRAM | ((cartAddrInternal & 0xFFFFF) << 1);
       }
 
-      for(int i = 0; i < len; i++) {
+      for(u32 i = 0; i < len; i++) {
         mem.mmio.rdp.rdram[BYTE_ADDRESS(dramAddrInternal + i) & RDRAM_DSIZE] = BusRead<u8, true>(mem, cartAddrInternal + i);
       }
       dmaBusy = true;

src/backend/core/mmio/PI.hpp

@@ -12,17 +12,20 @@ struct PI {
   void Reset();
   auto Read(MI&, u32) const -> u32;
   void Write(Mem&, Registers&, u32, u32);
-  template<typename T, bool isDma>
+
-  auto BusRead(Mem&, u32) -> T;
   template<typename T, bool isDma>
   void BusWrite(Mem&, u32, T);
+
+  template<typename T, bool isDma>
+  auto BusRead(Mem&, u32) -> T;
+
   bool ReadLatch();
   bool WriteLatch(u32 val);
 
   static u8 GetDomain(u32 address);
-  u32 AccessTiming(u8 domain, u32 length) const;
+  [[nodiscard]] u32 AccessTiming(u8 domain, u32 length) const;
   bool dmaBusy{}, ioBusy{}, toCart{};
-  u32 latch;
+  u32 latch{};
   u32 dramAddr{}, cartAddr{}, dramAddrInternal{}, cartAddrInternal{};
   u32 rdLen{}, wrLen{};
   u32 pi_bsd_dom1_lat{}, pi_bsd_dom2_lat{};

src/backend/core/mmio/PIF/Device.cpp

@@ -103,7 +103,7 @@ void PIF::PollController() {
     joybusDevices[channel].controller.c_left = state[SDL_SCANCODE_J];
     joybusDevices[channel].controller.c_right = state[SDL_SCANCODE_L];
 
-    s16 xaxis = 0, yaxis = 0;
+    s8 xaxis = 0, yaxis = 0;
     if (state[SDL_SCANCODE_LEFT]) {
       xaxis = -86;
     } else if (state[SDL_SCANCODE_RIGHT]) {

src/backend/core/mmio/SI.cpp

@@ -32,7 +32,7 @@ auto SI::Read(MI& mi, u32 addr) const -> u32 {
   }
 }
 
-void SI::DMA(Mem& mem, Registers& regs) {
+void SI::DMA(Mem& mem, Registers& regs) const {
   SI& si = mem.mmio.si;
   si.status.dmaBusy = false;
   if (toDram) {

src/backend/core/mmio/SI.hpp

@@ -30,7 +30,7 @@ struct SI {
 
   auto Read(MI&, u32) const -> u32;
   void Write(Mem&, Registers&, u32, u32);
-  void DMA(Mem&, Registers&);
+  void DMA(Mem&, Registers&) const;
   PIF pif;
 };
 

src/backend/core/registers/Cop0.hpp

@@ -214,7 +214,7 @@ struct Cop0 {
   Cop0();
 
   u32 GetReg32(u8);
-  u64 GetReg64(u8) const;
+  [[nodiscard]] u64 GetReg64(u8) const;
 
   void SetReg32(u8, u32);
   void SetReg64(u8, u64);
@@ -249,15 +249,15 @@ struct Cop0 {
   template <class T>
   void decode(T&, u32);
   FORCE_INLINE u32 GetRandom() {
-    int val = rand();
+    u32 val = rand();
-    int wired = GetWired();
+    auto wired_ = GetWired();
-    int lower, upper;
+    u32 lower, upper;
-    if(wired > 31) {
+    if(wired_ > 31) {
       lower = 0;
       upper = 64;
     } else {
-      lower = wired;
+      lower = wired_;
-      upper = 32 - wired;
+      upper = 32 - wired_;
     }
 
     val = (val % upper) + lower;
@@ -276,15 +276,15 @@ struct Cop0 {
       || (user_mode && status.ux);
   }
 private:
-  FORCE_INLINE u32 GetWired() { return wired & 0x3F; }
+  [[nodiscard]] FORCE_INLINE u32 GetWired() const { return wired & 0x3F; }
-  FORCE_INLINE u32 GetCount() { return u32(u64(count >> 1)); }
+  [[nodiscard]] FORCE_INLINE u32 GetCount() const { return u32(u64(count >> 1)); }
 
   void decodeInterp(Registers&, u32);
   void decodeJIT(JIT&, u32);
   void mtc0(Registers&, u32);
   void dmtc0(Registers&, u32);
   void mfc0(Registers&, u32);
-  void dmfc0(Registers&, u32);
+  void dmfc0(Registers&, u32) const;
   void eret(Registers&);
 
   void tlbr();

src/backend/core/registers/Cop1.hpp

@@ -39,7 +39,7 @@ union FCR31 {
     unsigned:14;
   } __attribute__((__packed__));
 
-  u32 read() const {
+  [[nodiscard]] u32 read() const {
     return (fs << 24) | (compare << 23) | (cause << 12) | (enable << 7) | (flag << 2) | rounding_mode;
   }
 
@@ -101,12 +101,12 @@ struct Cop1 {
   friend struct Interpreter;
   friend struct JIT;
 
-  void SetCauseUnimplemented(Registers&);
+  void SetCauseUnimplemented();
-  void SetCauseUnderflow(Registers&);
+  void SetCauseUnderflow();
-  void SetCauseInexact(Registers&);
+  void SetCauseInexact();
-  void SetCauseDivisionByZero(Registers&);
+  void SetCauseDivisionByZero();
-  void SetCauseOverflow(Registers&);
+  void SetCauseOverflow();
-  void SetCauseInvalid(Registers&);
+  void SetCauseInvalid();
 private:
   template <typename T> auto FGR(Cop0Status&, u32) -> T&;
   void decodeInterp(Interpreter&, u32);

src/backend/core/registers/cop/cop0instructions.cpp

@@ -15,7 +15,7 @@ void Cop0::mfc0(Registers& regs, u32 instr) {
   regs.gpr[RT(instr)] = s32(GetReg32(RD(instr)));
 }
 
-void Cop0::dmfc0(Registers& regs, u32 instr) {
+void Cop0::dmfc0(Registers& regs, u32 instr) const {
   regs.gpr[RT(instr)] = s64(GetReg64(RD(instr)));
 }
 

src/backend/core/registers/cop/cop1instructions.cpp

@@ -10,12 +10,12 @@ namespace n64 {
 template<> auto Cop1::FGR<s32>(Cop0Status& status, u32 index) -> s32& {
   if (status.fr) {
     return fgr[index].int32;
-  }
+  } else {
-  else if (index & 1) {
+    if (index & 1) {
-    return fgr[index & ~1].int32h;
+      return fgr[index & ~1].int32h;
-  }
+    } else {
-  else {
+      return fgr[index].int32;
-    return fgr[index].int32;
+    }
   }
 }
 
@@ -26,20 +26,19 @@ template<> auto Cop1::FGR<u32>(Cop0Status& status, u32 index) -> u32& {
 template<> auto Cop1::FGR<float>(Cop0Status& status, u32 index) -> float& {
   if (status.fr) {
     return fgr[index].float32;
-  }
+  } else {
-  else if (index & 1) {
+    if (index & 1) {
-    return fgr[index & ~1].float32h;
+      return fgr[index & ~1].float32h;
-  }
+    } else {
-  else {
+      return fgr[index].float32;
-    return fgr[index & ~1].float32;
+    }
   }
 }
 
 template<> auto Cop1::FGR<s64>(Cop0Status& status, u32 index) -> s64& {
   if (status.fr) {
     return fgr[index].int64;
-  }
+  } else {
-  else {
     return fgr[index & ~1].int64;
   }
 }
@@ -51,8 +50,7 @@ template<> auto Cop1::FGR<u64>(Cop0Status& status, u32 index) -> u64& {
 template<> auto Cop1::FGR<double>(Cop0Status& status, u32 index) -> double& {
   if (status.fr) {
     return fgr[index].float64;
-  }
+  } else {
-  else {
     return fgr[index & ~1].float64;
   }
 }
@@ -82,42 +80,42 @@ FORCE_INLINE int PushRoundingMode(const FCR31& fcr31) {
   return og;
 }
 
-void Cop1::SetCauseUnimplemented(Registers& regs) {
+void Cop1::SetCauseUnimplemented() {
-  regs.cop1.fcr31.cause_unimplemented_operation = true;
+  fcr31.cause_unimplemented_operation = true;
 }
 
-void Cop1::SetCauseUnderflow(Registers& regs) {
+void Cop1::SetCauseUnderflow() {
-  regs.cop1.fcr31.cause_underflow = true;
+  fcr31.cause_underflow = true;
-  if(!regs.cop1.fcr31.enable_underflow) {
+  if(!fcr31.enable_underflow) {
-    regs.cop1.fcr31.flag_underflow = true;
+    fcr31.flag_underflow = true;
   }
 }
 
-void Cop1::SetCauseInexact(Registers& regs) {
+void Cop1::SetCauseInexact() {
-  regs.cop1.fcr31.cause_inexact_operation = true;
+  fcr31.cause_inexact_operation = true;
-  if(!regs.cop1.fcr31.enable_inexact_operation) {
+  if(!fcr31.enable_inexact_operation) {
-    regs.cop1.fcr31.flag_inexact_operation = true;
+    fcr31.flag_inexact_operation = true;
   }
 }
 
-void Cop1::SetCauseDivisionByZero(Registers& regs) {
+void Cop1::SetCauseDivisionByZero() {
-  regs.cop1.fcr31.cause_division_by_zero = true;
+  fcr31.cause_division_by_zero = true;
-  if(!regs.cop1.fcr31.enable_division_by_zero) {
+  if(!fcr31.enable_division_by_zero) {
-    regs.cop1.fcr31.flag_division_by_zero = true;
+    fcr31.flag_division_by_zero = true;
   }
 }
 
-void Cop1::SetCauseOverflow(Registers& regs) {
+void Cop1::SetCauseOverflow() {
-  regs.cop1.fcr31.cause_overflow = true;
+  fcr31.cause_overflow = true;
-  if(!regs.cop1.fcr31.enable_overflow) {
+  if(!fcr31.enable_overflow) {
-    regs.cop1.fcr31.flag_overflow = true;
+    fcr31.flag_overflow = true;
   }
 }
 
-void Cop1::SetCauseInvalid(Registers& regs) {
+void Cop1::SetCauseInvalid() {
-  regs.cop1.fcr31.cause_invalid_operation = true;
+  fcr31.cause_invalid_operation = true;
-  if(!regs.cop1.fcr31.enable_invalid_operation) {
+  if(!fcr31.enable_invalid_operation) {
-    regs.cop1.fcr31.flag_invalid_operation = true;
+    fcr31.flag_invalid_operation = true;
   }
 }
 
@@ -144,14 +142,14 @@ FORCE_INLINE void SetCauseByArgWCVT(Registers& regs, T f) {
     case FP_NAN:
     case FP_INFINITE:
     case FP_SUBNORMAL:
-      regs.cop1.SetCauseUnimplemented(regs);
+      regs.cop1.SetCauseUnimplemented();
       CheckFPUException();
       break;
 
     case FP_NORMAL:
       // Check overflow
       if (f >= 2147483648.0f || f < -2147483648.0f) {
-        regs.cop1.SetCauseUnimplemented(regs);
+        regs.cop1.SetCauseUnimplemented();
         CheckFPUException();
       }
       break;
@@ -167,14 +165,14 @@ FORCE_INLINE void SetCauseByArgLCVT(Registers& regs, T f) {
     case FP_NAN:
     case FP_INFINITE:
     case FP_SUBNORMAL:
-      regs.cop1.SetCauseUnimplemented(regs);
+      regs.cop1.SetCauseUnimplemented();
       CheckFPUException();
       break;
 
     case FP_NORMAL:
       // Check overflow
       if (f >= 9007199254740992.000000 || f <= -9007199254740992.000000) {
-        regs.cop1.SetCauseUnimplemented(regs);
+        regs.cop1.SetCauseUnimplemented();
         CheckFPUException();
       }
       break;
@@ -194,33 +192,33 @@ FORCE_INLINE void SetFPUCauseRaised(Registers& regs, int raised) {
 
   if (raised & FE_UNDERFLOW) {
     if (!regs.cop1.fcr31.fs || regs.cop1.fcr31.enable_underflow || regs.cop1.fcr31.enable_inexact_operation) {
-      regs.cop1.SetCauseUnimplemented(regs);
+      regs.cop1.SetCauseUnimplemented();
       return;
     } else {
-      regs.cop1.SetCauseUnderflow(regs);
+      regs.cop1.SetCauseUnderflow();
     }
   }
 
   if (raised & FE_INEXACT) {
-    regs.cop1.SetCauseInexact(regs);
+    regs.cop1.SetCauseInexact();
   }
 
   if (raised & FE_DIVBYZERO) {
-    regs.cop1.SetCauseDivisionByZero(regs);
+    regs.cop1.SetCauseDivisionByZero();
   }
 
   if (raised & FE_OVERFLOW) {
-    regs.cop1.SetCauseOverflow(regs);
+    regs.cop1.SetCauseOverflow();
   }
 
   if (raised & FE_INVALID) {
-    regs.cop1.SetCauseInvalid(regs);
+    regs.cop1.SetCauseInvalid();
   }
 }
 
 FORCE_INLINE void SetFPUCauseCVTRaised(Registers& regs, int raised) {
   if(raised & FE_INVALID) {
-    regs.cop1.SetCauseUnimplemented(regs);
+    regs.cop1.SetCauseUnimplemented();
     return;
   }
 
@@ -251,15 +249,15 @@ FORCE_INLINE void SetCauseByArg(Registers& regs, T f) {
   switch(c) {
     case FP_NAN:
       if(isqnan(f)) {
-        regs.cop1.SetCauseInvalid(regs);
+        regs.cop1.SetCauseInvalid();
         CheckFPUException();
       } else {
-        regs.cop1.SetCauseUnimplemented(regs);
+        regs.cop1.SetCauseUnimplemented();
         CheckFPUException();
       }
       break;
     case FP_SUBNORMAL:
-      regs.cop1.SetCauseUnimplemented(regs);
+      regs.cop1.SetCauseUnimplemented();
       CheckFPUException();
       break;
     case FP_INFINITE:
@@ -293,12 +291,12 @@ FORCE_INLINE void SetCauseOnResult(Registers& regs, T& d) {
       break;
     case FP_SUBNORMAL:
       if (!cop1.fcr31.fs || cop1.fcr31.enable_underflow || cop1.fcr31.enable_inexact_operation) {
-        regs.cop1.SetCauseUnimplemented(regs);
+        regs.cop1.SetCauseUnimplemented();
         CheckFPUException();
       } else {
         // Since the if statement checks for the corresponding enable bits, it's safe to turn these cause bits on here.
-        regs.cop1.SetCauseUnderflow(regs);
+        regs.cop1.SetCauseUnderflow();
-        regs.cop1.SetCauseInexact(regs);
+        regs.cop1.SetCauseInexact();
         switch (cop1.fcr31.rounding_mode) {
           case 0:
           case 1:
@@ -333,7 +331,7 @@ FORCE_INLINE void SetCauseOnResult(Registers& regs, T& d) {
 #define CheckResult(f) do { SetCauseOnResult(regs, (f)); CheckFPUException(); } while(0)
 
 #define any_unordered(fs, ft) (std::isnan(fs) || std::isnan(ft))
-#define CheckRound(a, b) do { if ((a) != (b)) { SetCauseInexact(regs); } CheckFPUException(); } while(0)
+#define CheckRound(a, b) do { if ((a) != (b)) { SetCauseInexact(); } CheckFPUException(); } while(0)
 
 template <typename T>
 FORCE_INLINE bool is_nan(T f) {
@@ -350,14 +348,14 @@ FORCE_INLINE bool is_nan(T f) {
 
 #define checknanregs(fs, ft) do { \
   if(is_nan(fs) || is_nan(ft)) {                                       \
-    regs.cop1.SetCauseInvalid(regs);                                           \
+    regs.cop1.SetCauseInvalid();                                           \
     CheckFPUException();                                             \
   }                                                                  \
 } while(0)
 
 #define checkqnanregs(fs, ft) do { \
   if(isqnan(fs) || isqnan(ft)) {                                     \
-    regs.cop1.SetCauseInvalid(regs);                                           \
+    regs.cop1.SetCauseInvalid();                                           \
     CheckFPUException();                                             \
   }                                                                  \
 } while(0)
@@ -488,7 +486,7 @@ void Cop1::cvtsl(Registers& regs, u32 instr) {
   CheckFPUUsable();
   auto fs = FGR<s64>(regs.cop0.status, FS(instr));
   if (fs >= s64(0x0080000000000000) || fs < s64(0xff80000000000000)) {
-    SetCauseUnimplemented(regs);
+    SetCauseUnimplemented();
     CheckFPUException();
   }
   float result;
@@ -547,7 +545,7 @@ void Cop1::cvtdl(Registers& regs, u32 instr) {
   auto fs = FGR<s64>(regs.cop0.status, FS(instr));
 
   if (fs >= s64(0x0080000000000000) || fs < s64(0xff80000000000000)) {
-    SetCauseUnimplemented(regs);
+    SetCauseUnimplemented();
     CheckFPUException();
   }
   double result;

src/frontend/imgui/Settings.hpp

@@ -6,7 +6,7 @@ namespace n64 { struct Core; }
 using namespace nlohmann;
 
 struct Settings {
-  Settings(n64::Core& core);
+  explicit Settings(n64::Core& core);
   ~Settings();
 
   [[nodiscard]] FORCE_INLINE float GetVolumeL() const { return volumeL; };

src/utils/MemoryHelpers.hpp

@@ -6,14 +6,14 @@
 
 namespace Util {
 template<typename T>
-static FORCE_INLINE T ReadAccess(u8 *data, u32 index) {
+static FORCE_INLINE T ReadAccess(const u8 *data, u32 index) {
   if constexpr (sizeof(T) == 8) {
-    u32 hi = *reinterpret_cast<u32*>(&data[index + 0]);
+    u32 hi = *reinterpret_cast<const u32*>(&data[index + 0]);
-    u32 lo = *reinterpret_cast<u32*>(&data[index + 4]);
+    u32 lo = *reinterpret_cast<const u32*>(&data[index + 4]);
     T result = ((T)hi << 32) | (T)lo;
     return result;
   } else {
-    return *reinterpret_cast<T*>(&data[index]);
+    return *reinterpret_cast<const T*>(&data[index]);
   }
 }
 
@@ -31,14 +31,14 @@ static FORCE_INLINE void WriteAccess(u8 *data, u32 index, T val) {
 }
 
 FORCE_INLINE void SwapBuffer32(size_t size, u8 *data) {
-  for (int i = 0; i < size; i += 4) {
+  for (size_t i = 0; i < size; i += 4) {
     u32 original = *(u32 *) &data[i];
     *(u32 *) &data[i] = bswap_32(original);
   }
 }
 
 FORCE_INLINE void SwapBuffer16(size_t size, u8 *data) {
-  for (int i = 0; i < size; i += 2) {
+  for (size_t i = 0; i < size; i += 2) {
     u16 original = *(u16 *) &data[i];
     *(u16 *) &data[i] = bswap_16(original);
   }