HUGE performance boost thanks to advice from @fleroviux ❤️

This commit is contained in:
CocoSimone
2023-02-19 19:21:38 +01:00
parent 6b916831b7
commit bead7e55bc
6 changed files with 58 additions and 56 deletions

View File

@@ -47,29 +47,12 @@ void Core::Run(Window& window, float volumeL, float volumeR) {
InterruptRaise(mmio.mi, regs, Interrupt::VI);
}
for(;cycles <= mmio.vi.cyclesPerHalfline; cycles++, frameCycles++) {
int cpuCount = CpuStep(*this);
int oldCpuCount = cpuCount;
while(cpuCount--) {
if (!mmio.rsp.spStatus.halt) {
regs.steps++;
if (regs.steps > 2) {
mmio.rsp.steps += 2;
regs.steps -= 3;
}
frameCycles += cpuCount;
while (mmio.rsp.steps > 0) {
mmio.rsp.steps--;
mmio.rsp.Step(regs, mem);
}
}
}
mmio.ai.Step(mem, regs, oldCpuCount, volumeL, volumeR);
scheduler.tick(1, mem, regs);
}
cycles -= mmio.vi.cyclesPerHalfline;
mmio.rsp.Run(cpuCount, regs, mem);
mmio.ai.Step(mem, regs, cpuCount, volumeL, volumeR);
scheduler.tick(cpuCount, mem, regs);
}
if ((mmio.vi.current & 0x3FE) == mmio.vi.intr) {

View File

@@ -43,14 +43,15 @@ struct Core {
static int CpuStep(Core& core) {
switch(core.cpuType) {
case CpuType::Dynarec: return core.cpuDynarec->Step(core.mem);
case CpuType::Interpreter: core.cpuInterp->Step(core.mem); return 1;
case CpuType::Dynarec:
return core.cpuDynarec->Step(core.mem);
case CpuType::Interpreter:
return core.cpuInterp->Run(core.mem);
case CpuType::NONE: return 0;
}
}
u32 breakpoint = 0;
int cycles = 0;
bool pause = true;
bool isPAL = false;

View File

@@ -21,7 +21,10 @@ inline void CheckCompareInterrupt(MI& mi, Registers& regs) {
}
}
void Interpreter::Step(Mem& mem) {
int Interpreter::Run(Mem& mem) {
MMIO& mmio = mem.mmio;
int count = 0;
for(;count <= mmio.vi.cyclesPerHalfline; count++) {
CheckCompareInterrupt(mem.mmio.mi, regs);
regs.prevDelaySlot = regs.delaySlot;
@@ -31,14 +34,14 @@ void Interpreter::Step(Mem& mem) {
if(!MapVAddr(regs, LOAD, regs.pc, paddr)) {
HandleTLBException(regs, regs.pc);
FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, false);
return;
return count;
}
u32 instruction = mem.Read32(regs, paddr);
if(ShouldServiceInterrupt(regs)) {
FireException(regs, ExceptionCode::Interrupt, 0, false);
return;
return count;
}
regs.oldPC = regs.pc;
@@ -46,5 +49,8 @@ void Interpreter::Step(Mem& mem) {
regs.nextPC += 4;
Exec(mem, instruction);
}
return count;
}
}

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@@ -7,7 +7,7 @@ namespace n64 {
struct Interpreter {
Interpreter() = default;
~Interpreter() = default;
void Step(Mem&);
int Run(Mem&);
void Reset() {
regs.Reset();
}

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@@ -66,7 +66,17 @@ inline void logRSP(const RSP& rsp, const u32 instr) {
}
*/
void RSP::Step(Registers& regs, Mem& mem) {
void RSP::Run(int cpuCount, Registers& regs, Mem& mem) {
while(cpuCount--) {
if (!spStatus.halt) {
regs.steps++;
if (regs.steps > 2) {
steps += 2;
regs.steps -= 3;
}
while (steps > 0) {
steps--;
gpr[0] = 0;
u32 instr = Util::ReadAccess<u32>(imem, pc & IMEM_DSIZE);
oldPC = pc & 0xFFC;
@@ -74,8 +84,10 @@ void RSP::Step(Registers& regs, Mem& mem) {
nextPC += 4;
Exec(regs, mem, instr);
//logRSP(*this, instr);
}
}
}
}
auto RSP::Read(u32 addr) -> u32{

View File

@@ -113,7 +113,7 @@ struct Registers;
struct RSP {
RSP();
void Reset();
void Step(Registers& regs, Mem& mem);
void Run(int, Registers& regs, Mem& mem);
auto Read(u32 addr) -> u32;
void Write(Mem& mem, Registers& regs, u32 addr, u32 value);
void Exec(Registers& regs, Mem& mem, u32 instr);