Dynarec + CMake restructure
This commit is contained in:
@@ -11,7 +11,7 @@ void Interpreter::add(Registers& regs, u32 instr) {
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u32 rt = (s32)regs.gpr[RT(instr)];
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u32 result = rs + rt;
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if(check_signed_overflow(rs, rt, result)) {
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FireException(regs, ExceptionCode::Overflow, 0, regs.oldPC);
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FireException(regs, ExceptionCode::Overflow, 0, true);
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} else {
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regs.gpr[RD(instr)] = s32(result);
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}
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@@ -29,7 +29,7 @@ void Interpreter::addi(Registers& regs, u32 instr) {
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u32 imm = s32(s16(instr));
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u32 result = rs + imm;
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if(check_signed_overflow(rs, imm, result)) {
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FireException(regs, ExceptionCode::Overflow, 0, regs.oldPC);
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FireException(regs, ExceptionCode::Overflow, 0, true);
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} else {
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regs.gpr[RT(instr)] = s32(result);
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}
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@@ -47,7 +47,7 @@ void Interpreter::dadd(Registers& regs, u32 instr) {
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u64 rt = regs.gpr[RT(instr)];
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u64 result = rt + rs;
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if(check_signed_overflow(rs, rt, result)) {
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FireException(regs, ExceptionCode::Overflow, 0, regs.oldPC);
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FireException(regs, ExceptionCode::Overflow, 0, true);
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} else {
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regs.gpr[RD(instr)] = result;
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}
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@@ -64,7 +64,7 @@ void Interpreter::daddi(Registers& regs, u32 instr) {
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u64 rs = regs.gpr[RS(instr)];
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u64 result = imm + rs;
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if(check_signed_overflow(rs, imm, result)) {
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FireException(regs, ExceptionCode::Overflow, 0, regs.oldPC);
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FireException(regs, ExceptionCode::Overflow, 0, true);
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} else {
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regs.gpr[RT(instr)] = result;
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}
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@@ -201,7 +201,7 @@ void Interpreter::lh(Registers& regs, Mem& mem, u32 instr) {
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u64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b1)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, true);
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return;
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}
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@@ -213,14 +213,14 @@ void Interpreter::lw(Registers& regs, Mem& mem, u32 instr) {
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u64 address = regs.gpr[RS(instr)] + offset;
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if (check_address_error(address, 0b11)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, true);
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return;
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}
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u32 physical;
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if (!MapVAddr(regs, LOAD, address, physical)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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regs.gpr[RT(instr)] = (s32)mem.Read32<false>(regs, physical, regs.oldPC);
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}
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@@ -231,7 +231,7 @@ void Interpreter::ll(Registers& regs, Mem& mem, u32 instr) {
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u32 physical;
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if (!MapVAddr(regs, LOAD, address, physical)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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regs.gpr[RT(instr)] = (s32)mem.Read32<false>(regs, physical, regs.oldPC);
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}
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@@ -245,7 +245,7 @@ void Interpreter::lwl(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr = 0;
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if(!MapVAddr(regs, LOAD, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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u32 shift = 8 * ((address ^ 0) & 3);
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u32 mask = 0xFFFFFFFF << shift;
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@@ -260,7 +260,7 @@ void Interpreter::lwr(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr = 0;
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if(!MapVAddr(regs, LOAD, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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u32 shift = 8 * ((address ^ 3) & 3);
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u32 mask = 0xFFFFFFFF >> shift;
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@@ -274,7 +274,7 @@ void Interpreter::ld(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b111)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, true);
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return;
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}
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@@ -287,7 +287,7 @@ void Interpreter::lld(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr;
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if (!MapVAddr(regs, LOAD, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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regs.gpr[RT(instr)] = mem.Read64<false>(regs, paddr, regs.oldPC);
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}
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@@ -301,7 +301,7 @@ void Interpreter::ldl(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr = 0;
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if (!MapVAddr(regs, LOAD, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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s32 shift = 8 * ((address ^ 0) & 7);
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u64 mask = 0xFFFFFFFFFFFFFFFF << shift;
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@@ -316,7 +316,7 @@ void Interpreter::ldr(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr;
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if (!MapVAddr(regs, LOAD, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, LOAD), 0, true);
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} else {
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s32 shift = 8 * ((address ^ 7) & 7);
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u64 mask = 0xFFFFFFFFFFFFFFFF >> shift;
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@@ -336,7 +336,7 @@ void Interpreter::lhu(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b1)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, true);
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return;
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}
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@@ -348,7 +348,7 @@ void Interpreter::lwu(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b11)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorLoad, 0, true);
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return;
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}
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@@ -365,7 +365,7 @@ void Interpreter::sc(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b11)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, true);
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}
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if(regs.cop0.llbit) {
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@@ -380,7 +380,7 @@ void Interpreter::scd(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b111)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, true);
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return;
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}
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@@ -396,14 +396,14 @@ void Interpreter::sh(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b1)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, true);
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return;
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}
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u32 physical;
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if(!MapVAddr(regs, STORE, address, physical)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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mem.Write16<false>(regs, physical, regs.gpr[RT(instr)], regs.oldPC);
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}
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@@ -414,14 +414,14 @@ void Interpreter::sw(Registers& regs, Mem& mem, u32 instr) {
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u64 address = regs.gpr[RS(instr)] + offset;
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if (check_address_error(address, 0b11)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, true);
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return;
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}
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u32 physical;
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if(!MapVAddr(regs, STORE, address, physical)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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mem.Write32<false>(regs, physical, regs.gpr[RT(instr)], regs.oldPC);
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}
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@@ -431,14 +431,14 @@ void Interpreter::sd(Registers& regs, Mem& mem, u32 instr) {
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s64 address = regs.gpr[RS(instr)] + (s16)instr;
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if (check_address_error(address, 0b11)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, regs.oldPC);
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FireException(regs, ExceptionCode::AddressErrorStore, 0, true);
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return;
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}
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u32 physical;
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if(!MapVAddr(regs, STORE, address, physical)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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mem.Write64<false>(regs, physical, regs.gpr[RT(instr)], regs.oldPC);
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}
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@@ -450,7 +450,7 @@ void Interpreter::sdl(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr;
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if (!MapVAddr(regs, STORE, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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s32 shift = 8 * ((address ^ 0) & 7);
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u64 mask = 0xFFFFFFFFFFFFFFFF >> shift;
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@@ -465,7 +465,7 @@ void Interpreter::sdr(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr;
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if (!MapVAddr(regs, STORE, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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s32 shift = 8 * ((address ^ 7) & 7);
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u64 mask = 0xFFFFFFFFFFFFFFFF << shift;
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@@ -480,7 +480,7 @@ void Interpreter::swl(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr;
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if (!MapVAddr(regs, STORE, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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u32 shift = 8 * ((address ^ 0) & 3);
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u32 mask = 0xFFFFFFFF >> shift;
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@@ -495,7 +495,7 @@ void Interpreter::swr(Registers& regs, Mem& mem, u32 instr) {
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u32 paddr;
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if (!MapVAddr(regs, STORE, address, paddr)) {
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HandleTLBException(regs, address);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, regs.oldPC);
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FireException(regs, GetTLBExceptionCode(regs.cop0.tlbError, STORE), 0, true);
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} else {
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u32 shift = 8 * ((address ^ 3) & 3);
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u32 mask = 0xFFFFFFFF << shift;
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@@ -524,7 +524,7 @@ void Interpreter::j(Registers& regs, u32 instr) {
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s64 address = (regs.oldPC & ~0xfffffff) | target;
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if (check_address_error(address, 0b11)) {
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HandleTLBException(regs, address);
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FireException(regs, ExceptionCode::DataBusError, 0, regs.oldPC);
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FireException(regs, ExceptionCode::DataBusError, 0, true);
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}
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branch(regs, true, address);
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