small MI refactor in preparation of (eventually) implementing the RDRAM interface properly

2026-04-03 11:28:51 +02:00
parent 694b45341a
commit d5024ebbf6
5 changed files with 61 additions and 71 deletions
@@ -426,7 +426,7 @@ auto PI::Read(u32 addr) const -> u32 {
      value |= (dmaBusy << 0); // Is PI DMA active? No, because it's instant
      value |= (ioBusy << 1); // Is PI IO busy? No, because it's instant
      value |= (0 << 2); // PI IO error?
-      value |= (mem.mmio.mi.miIntr.pi << 3); // PI interrupt?
+      value |= (mem.mmio.mi.intr.pi << 3); // PI interrupt?
      return value;
    }
  case 0x04600014: